llvm.org GIT mirror llvm / b3235b1
Revert r167620; this can be implemented using an existing CL option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167622 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 7 years ago
3 changed file(s) with 9 addition(s) and 18 deletion(s). Raw diff Collapse all Expand all
4747 UseSoftFloat(false), NoZerosInBSS(false), JITExceptionHandling(false),
4848 JITEmitDebugInfo(false), JITEmitDebugInfoToDisk(false),
4949 GuaranteedTailCallOpt(false), DisableTailCalls(false),
50 StackAlignmentOverride(0), RealignStack(true), StrictAlign(false),
51 EnableFastISel(false), PositionIndependentExecutable(false),
52 EnableSegmentedStacks(false), UseInitArray(false), TrapFuncName(""),
53 FloatABIType(FloatABI::Default), AllowFPOpFusion(FPOpFusion::Standard)
50 StackAlignmentOverride(0), RealignStack(true), EnableFastISel(false),
51 PositionIndependentExecutable(false), EnableSegmentedStacks(false),
52 UseInitArray(false), TrapFuncName(""), FloatABIType(FloatABI::Default),
53 AllowFPOpFusion(FPOpFusion::Standard)
5454 {}
5555
5656 /// PrintMachineCode - This flag is enabled when the -print-machineinstrs
153153 /// RealignStack - This flag indicates whether the stack should be
154154 /// automatically realigned, if needed.
155155 unsigned RealignStack : 1;
156
157 /// StrictAlign - This flag indicates that all memory accesses must be
158 /// aligned. (ARM only)
159 unsigned StrictAlign : 1;
160156
161157 /// SSPBufferSize - The minimum size of buffers that will receive stack
162158 /// smashing protection when -fstack-protection is used.
10271027 RC = &ARM::GPRRegClass;
10281028 break;
10291029 case MVT::i16:
1030 if (Alignment && Alignment < 2 && (!Subtarget->allowsUnalignedMem() ||
1031 TM.Options.StrictAlign))
1030 if (Alignment && Alignment < 2 && !Subtarget->allowsUnalignedMem())
10321031 return false;
10331032
10341033 if (isThumb2) {
10431042 RC = &ARM::GPRRegClass;
10441043 break;
10451044 case MVT::i32:
1046 if (Alignment && Alignment < 4 && (!Subtarget->allowsUnalignedMem() ||
1047 TM.Options.StrictAlign))
1045 if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem())
10481046 return false;
10491047
10501048 if (isThumb2) {
11531151 }
11541152 break;
11551153 case MVT::i16:
1156 if (Alignment && Alignment < 2 && (!Subtarget->allowsUnalignedMem() ||
1157 TM.Options.StrictAlign))
1154 if (Alignment && Alignment < 2 && !Subtarget->allowsUnalignedMem())
11581155 return false;
11591156
11601157 if (isThumb2) {
11681165 }
11691166 break;
11701167 case MVT::i32:
1171 if (Alignment && Alignment < 4 && (!Subtarget->allowsUnalignedMem() ||
1172 TM.Options.StrictAlign))
1168 if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem())
11731169 return false;
11741170
11751171 if (isThumb2) {
91189118
91199119 bool ARMTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
91209120 // The AllowsUnaliged flag models the SCTLR.A setting in ARM cpus
9121 bool AllowsUnaligned = Subtarget->allowsUnalignedMem() &&
9122 !getTargetMachine().Options.StrictAlign;
9121 bool AllowsUnaligned = Subtarget->allowsUnalignedMem();
91239122
91249123 switch (VT.getSimpleVT().SimpleTy) {
91259124 default: