llvm.org GIT mirror llvm / b28b579
[NFC] Added tests for D64285 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365501 91177308-0d34-0410-b5e6-96231b3b80d8 David Bolvansky 2 months ago
1 changed file(s) with 240 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: opt < %s -instcombine -S | FileCheck %s
2
3 define i32 @ashr_lshr_abs(i32 %x, i32 %y) {
4 ; CHECK-LABEL: @ashr_lshr_abs(
5 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
6 ; CHECK-NEXT: ret i32 [[R]]
7 ;
8 %cmp = icmp sge i32 %x, 0
9 %l = lshr i32 %x, %y
10 %r = ashr i32 %x, %y
11 %ret = select i1 %cmp, i32 %l, i32 %r
12 ret i32 %ret
13 }
14
15 define i32 @ashr_lshr_abs_both_exact(i32 %x, i32 %y) {
16 ; CHECK-LABEL: @ashr_lshr_abs(
17 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
18 ; CHECK-NEXT: ret i32 [[R]]
19 ;
20 %cmp = icmp sge i32 %x, 0
21 %l = lshr exact i32 %x, %y
22 %r = ashr exact i32 %x, %y
23 %ret = select i1 %cmp, i32 %l, i32 %r
24 ret i32 %ret
25 }
26
27 define i32 @ashr_lshr_abs2(i32 %x, i32 %y) {
28 ; CHECK-LABEL: @ashr_lshr_abs2(
29 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
30 ; CHECK-NEXT: ret i32 [[R]]
31 ;
32 %cmp = icmp sgt i32 %x, -1
33 %l = lshr i32 %x, %y
34 %r = ashr i32 %x, %y
35 %ret = select i1 %cmp, i32 %l, i32 %r
36 ret i32 %ret
37 }
38
39 define <2 x i32> @ashr_lshr_abs_vec(<2 x i32> %x, <2 x i32> %y) {
40 ; CHECK-LABEL: @ashr_lshr_abs_vec(
41 ; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]]
42 ; CHECK-NEXT: ret <2 x i32> [[R]]
43 ;
44 %cmp = icmp sge <2 x i32> %x, zeroinitializer
45 %l = lshr <2 x i32> %x, %y
46 %r = ashr <2 x i32> %x, %y
47 %ret = select <2 x i1> %cmp, <2 x i32> %l, <2 x i32> %r
48 ret <2 x i32> %ret
49 }
50
51 define i32 @ashr_lshr_nabs2(i32 %x, i32 %y) {
52 ; CHECK-LABEL: @ashr_lshr_nabs2(
53 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
54 ; CHECK-NEXT: ret i32 [[R]]
55 ;
56 %cmp = icmp sle i32 %x, 0
57 %l = lshr i32 %x, %y
58 %r = ashr i32 %x, %y
59 %ret = select i1 %cmp, i32 %r, i32 %l
60 ret i32 %ret
61 }
62
63 define i32 @ashr_lshr_nabs(i32 %x, i32 %y) {
64 ; CHECK-LABEL: @ashr_lshr_nabs(
65 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
66 ; CHECK-NEXT: ret i32 [[R]]
67 ;
68 %cmp = icmp slt i32 %x, 1
69 %l = lshr i32 %x, %y
70 %r = ashr i32 %x, %y
71 %ret = select i1 %cmp, i32 %r, i32 %l
72 ret i32 %ret
73 }
74
75 define <2 x i32> @ashr_lshr_nabs_vec(<2 x i32> %x, <2 x i32> %y) {
76 ; CHECK-LABEL: @ashr_lshr_nabs_vec(
77 ; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]]
78 ; CHECK-NEXT: ret <2 x i32> [[R]]
79 ;
80 %cmp = icmp sle <2 x i32> %x, zeroinitializer
81 %l = lshr <2 x i32> %x, %y
82 %r = ashr <2 x i32> %x, %y
83 %ret = select <2 x i1> %cmp, <2 x i32> %r, <2 x i32> %l
84 ret <2 x i32> %ret
85 }
86
87
88 ; Negative tests
89
90 define i32 @ashr_lshr_wrong_abs(i32 %x, i32 %y) {
91 ; CHECK-LABEL: @ashr_lshr_wrong_abs(
92 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -2
93 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
94 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]]
95 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
96 ; CHECK-NEXT: ret i32 [[RET]]
97 ;
98 %cmp = icmp sge i32 %x, -1
99 %l = lshr i32 %x, %y
100 %r = ashr i32 %x, %y
101 %ret = select i1 %cmp, i32 %l, i32 %r
102 ret i32 %ret
103 }
104
105 define i32 @ashr_lshr_abs_shift_wrong_pred(i32 %x, i32 %y, i32 %z) {
106 ; CHECK-LABEL: @ashr_lshr_abs_shift_wrong_pred(
107 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1
108 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
109 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]]
110 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
111 ; CHECK-NEXT: ret i32 [[RET]]
112 ;
113 %cmp = icmp sle i32 %x, 0
114 %l = lshr i32 %x, %y
115 %r = ashr i32 %x, %y
116 %ret = select i1 %cmp, i32 %l, i32 %r
117 ret i32 %ret
118 }
119
120 define i32 @ashr_lshr_abs_shift_wrong_pred2(i32 %x, i32 %y, i32 %z) {
121 ; CHECK-LABEL: @ashr_lshr_abs_shift_wrong_pred2(
122 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Z:%.*]], -1
123 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
124 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]]
125 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
126 ; CHECK-NEXT: ret i32 [[RET]]
127 ;
128 %cmp = icmp sge i32 %z, 0
129 %l = lshr i32 %x, %y
130 %r = ashr i32 %x, %y
131 %ret = select i1 %cmp, i32 %l, i32 %r
132 ret i32 %ret
133 }
134
135 define i32 @ashr_lshr_abs_wrong_operands(i32 %x, i32 %y) {
136 ; CHECK-LABEL: @ashr_lshr_abs_wrong_operands(
137 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
138 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
139 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]]
140 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]]
141 ; CHECK-NEXT: ret i32 [[RET]]
142 ;
143 %cmp = icmp sge i32 %x, 0
144 %l = lshr i32 %x, %y
145 %r = ashr i32 %x, %y
146 %ret = select i1 %cmp, i32 %r, i32 %l
147 ret i32 %ret
148 }
149
150 define i32 @ashr_lshr_abs_no_ashr(i32 %x, i32 %y) {
151 ; CHECK-LABEL: @ashr_lshr_abs_no_ashr(
152 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
153 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
154 ; CHECK-NEXT: [[R:%.*]] = xor i32 [[X]], [[Y]]
155 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
156 ; CHECK-NEXT: ret i32 [[RET]]
157 ;
158 %cmp = icmp sge i32 %x, 0
159 %l = lshr i32 %x, %y
160 %r = xor i32 %x, %y
161 %ret = select i1 %cmp, i32 %l, i32 %r
162 ret i32 %ret
163 }
164
165 define i32 @ashr_lshr_abs_shift_amt_mismatch(i32 %x, i32 %y, i32 %z) {
166 ; CHECK-LABEL: @ashr_lshr_abs_shift_amt_mismatch(
167 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
168 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
169 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Z:%.*]]
170 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
171 ; CHECK-NEXT: ret i32 [[RET]]
172 ;
173 %cmp = icmp sge i32 %x, 0
174 %l = lshr i32 %x, %y
175 %r = ashr i32 %x, %z
176 %ret = select i1 %cmp, i32 %l, i32 %r
177 ret i32 %ret
178 }
179
180 define i32 @ashr_lshr_abs_shift_base_mismatch(i32 %x, i32 %y, i32 %z) {
181 ; CHECK-LABEL: @ashr_lshr_abs_shift_base_mismatch(
182 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
183 ; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]]
184 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[Z:%.*]], [[Y]]
185 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
186 ; CHECK-NEXT: ret i32 [[RET]]
187 ;
188 %cmp = icmp sge i32 %x, 0
189 %l = lshr i32 %x, %y
190 %r = ashr i32 %z, %y
191 %ret = select i1 %cmp, i32 %l, i32 %r
192 ret i32 %ret
193 }
194
195 define i32 @ashr_lshr_abs_no_lshr(i32 %x, i32 %y) {
196 ; CHECK-LABEL: @ashr_lshr_abs_no_lshr(
197 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
198 ; CHECK-NEXT: [[L:%.*]] = add i32 [[X]], [[Y:%.*]]
199 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]]
200 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]]
201 ; CHECK-NEXT: ret i32 [[RET]]
202 ;
203 %cmp = icmp sge i32 %x, 0
204 %l = add i32 %x, %y
205 %r = ashr i32 %x, %y
206 %ret = select i1 %cmp, i32 %l, i32 %r
207 ret i32 %ret
208 }
209
210 define <2 x i32> @ashr_lshr_abs_vec_wrong_pred(<2 x i32> %x, <2 x i32> %y) {
211 ; CHECK-LABEL: @ashr_lshr_abs_vec_wrong_pred(
212 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]],
213 ; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]]
214 ; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X]], [[Y]]
215 ; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[L]], <2 x i32> [[R]]
216 ; CHECK-NEXT: ret <2 x i32> [[RET]]
217 ;
218 %cmp = icmp sle <2 x i32> %x, zeroinitializer
219 %l = lshr <2 x i32> %x, %y
220 %r = ashr <2 x i32> %x, %y
221 %ret = select <2 x i1> %cmp, <2 x i32> %l, <2 x i32> %r
222 ret <2 x i32> %ret
223 }
224
225 define <2 x i32> @ashr_lshr_nabs_vec_wrong_pred(<2 x i32> %x, <2 x i32> %y) {
226 ; CHECK-LABEL: @ashr_lshr_nabs_vec_wrong_pred(
227 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]],
228 ; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]]
229 ; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X]], [[Y]]
230 ; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[R]], <2 x i32> [[L]]
231 ; CHECK-NEXT: ret <2 x i32> [[RET]]
232 ;
233 %cmp = icmp sge <2 x i32> %x, zeroinitializer
234 %l = lshr <2 x i32> %x, %y
235 %r = ashr <2 x i32> %x, %y
236 %ret = select <2 x i1> %cmp, <2 x i32> %r, <2 x i32> %l
237 ret <2 x i32> %ret
238 }
239