llvm.org GIT mirror llvm / b057851
Change ARMInstPrinter::printPredicateOperand() so it will not abort if it runs into the undefined 15 condition code value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151844 91177308-0d34-0410-b5e6-96231b3b80d8 Kevin Enderby 8 years ago
2 changed file(s) with 22 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
691691 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,
692692 raw_ostream &O) {
693693 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
694 if (CC != ARMCC::AL)
694 // Handle the undefined 15 CC value here for printing so we don't abort().
695 if ((unsigned)CC == 15)
696 O << "";
697 else if (CC != ARMCC::AL)
695698 O << ARMCondCodeToString(CC);
696699 }
697700
0 # RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown |& grep und
1 # rdar://10841671
2
3 0xe3 0xbf
4 0xdf 0xed 0x61 0x3b
5 0x71 0xee 0xe0 0x1b
6 0x72 0xee 0xa3 0x2b
7 0xdf 0xed 0x60 0x0b
8
9 # This is test is dealing with a undefined condition code value of 15 in the
10 # above sequence of junk bytes and not allowing the disassembler to abort on
11 # printing the final instruction in this list.
12 #
13 # ittte al
14 # vldr d19, [pc, #388]
15 # vsub.f64 d17, d17, d16
16 # vadd.f64 d18, d18, d19
17 # vldr d16, [pc, #384]