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AMDGPU: Fix name for v_ashrrev_i16 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289967 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 3 years ago
7 changed file(s) with 15 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
339339 def V_MADMK_F16 : VOP2_Pseudo <"v_madmk_f16", VOP_MADMK_F16>;
340340 defm V_LSHLREV_B16 : VOP2Inst <"v_lshlrev_b16", VOP_I16_I16_I16>;
341341 defm V_LSHRREV_B16 : VOP2Inst <"v_lshrrev_b16", VOP_I16_I16_I16>;
342 defm V_ASHRREV_B16 : VOP2Inst <"v_ashrrev_b16", VOP_I16_I16_I16>;
342 defm V_ASHRREV_I16 : VOP2Inst <"v_ashrrev_i16", VOP_I16_I16_I16>;
343343 defm V_LDEXP_F16 : VOP2Inst <"v_ldexp_f16", VOP_F16_F16_I32, AMDGPUldexp>;
344344
345345 let isCommutable = 1 in {
442442
443443 defm : Bits_OpsRev_i16_Pats;
444444 defm : Bits_OpsRev_i16_Pats;
445 defm : Bits_OpsRev_i16_PatsB16_e32>;
445 defm : Bits_OpsRev_i16_PatsI16_e32>;
446446
447447 def : ZExt_i16_i1_Pat;
448448 def : ZExt_i16_i1_Pat;
688688 defm V_MUL_LO_U16 : VOP2_Real_e32e64_vi <0x29>;
689689 defm V_LSHLREV_B16 : VOP2_Real_e32e64_vi <0x2a>;
690690 defm V_LSHRREV_B16 : VOP2_Real_e32e64_vi <0x2b>;
691 defm V_ASHRREV_B16 : VOP2_Real_e32e64_vi <0x2c>;
691 defm V_ASHRREV_I16 : VOP2_Real_e32e64_vi <0x2c>;
692692 defm V_MAX_F16 : VOP2_Real_e32e64_vi <0x2d>;
693693 defm V_MIN_F16 : VOP2_Real_e32e64_vi <0x2e>;
694694 defm V_MAX_U16 : VOP2_Real_e32e64_vi <0x2f>;
460460 v_lshrrev_b16_e32 v1, v2, v3
461461
462462 // NOSICI: error: instruction not supported on this GPU
463 // NOSICI: v_ashrrev_b16_e32 v1, v2, v3
464 // VI: v_ashrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
465 v_ashrrev_b16_e32 v1, v2, v3
463 // NOSICI: v_ashrrev_i16_e32 v1, v2, v3
464 // VI: v_ashrrev_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
465 v_ashrrev_i16_e32 v1, v2, v3
466466
467467 // NOSICI: error: instruction not supported on this GPU
468468 // NOSICI: v_max_f16_e32 v1, v2, v3
370370 v_lshrrev_b16 v1, v2, v3
371371
372372 // NOSICI: error: instruction not supported on this GPU
373 // NOSICI: v_ashrrev_b16 v1, v2, v3
374 // VI: v_ashrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
375 v_ashrrev_b16 v1, v2, v3
373 // NOSICI: v_ashrrev_i16 v1, v2, v3
374 // VI: v_ashrrev_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
375 v_ashrrev_i16 v1, v2, v3
376376
377377 // NOSICI: error: instruction not supported on this GPU
378378 // NOSICI: v_max_f16 v1, v2, v3
472472 v_lshrrev_b16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0
473473
474474 // NOSICI: error:
475 // VI: v_ashrrev_b16_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 ; encoding: [0xfa,0x06,0x02,0x58,0x02,0x01,0x09,0xa1]
476 v_ashrrev_b16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0
475 // VI: v_ashrrev_i16_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 ; encoding: [0xfa,0x06,0x02,0x58,0x02,0x01,0x09,0xa1]
476 v_ashrrev_i16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0
477477
478478 // NOSICI: error:
479479 // VI: v_max_f16_dpp v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 ; encoding: [0xfa,0x06,0x02,0x5a,0x02,0x01,0x09,0xa1]
480480 v_lshrrev_b16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
481481
482482 // NOSICI: error:
483 // VI: v_ashrrev_b16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x58,0x02,0x06,0x05,0x02]
484 v_ashrrev_b16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
483 // VI: v_ashrrev_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x58,0x02,0x06,0x05,0x02]
484 v_ashrrev_i16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2
485485
486486 // NOSICI: error:
487487 // VI: v_max_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x5a,0x02,0x06,0x05,0x02]
320320 # VI: v_lshrrev_b16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x56,0x02,0x06,0x05,0x02]
321321 0xf9 0x06 0x02 0x56 0x02 0x06 0x05 0x02
322322
323 # VI: v_ashrrev_b16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x58,0x02,0x06,0x05,0x02]
323 # VI: v_ashrrev_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x58,0x02,0x06,0x05,0x02]
324324 0xf9 0x06 0x02 0x58 0x02 0x06 0x05 0x02
325325
326326 # VI: v_max_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x5a,0x02,0x06,0x05,0x02]
230230 # VI: v_lshrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x56]
231231 0x02 0x07 0x02 0x56
232232
233 # VI: v_ashrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
233 # VI: v_ashrrev_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
234234 0x02 0x07 0x02 0x58
235235
236236 # VI: v_max_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5a]