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Prune CRLF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220678 91177308-0d34-0410-b5e6-96231b3b80d8 NAKAMURA Takumi 5 years ago
8 changed file(s) with 146 addition(s) and 146 deletion(s). Raw diff Collapse all Expand all
2828 public:
2929 typedef ValueT key_type;
3030 typedef ValueT value_type;
31 typedef unsigned size_type;
31 typedef unsigned size_type;
3232
3333 explicit DenseSet(unsigned NumInitBuckets = 0) : TheMap(NumInitBuckets) {}
3434
4444 TheMap.clear();
4545 }
4646
47 /// Return 1 if the specified key is in the set, 0 otherwise.
47 /// Return 1 if the specified key is in the set, 0 otherwise.
4848 size_type count(const ValueT &V) const {
4949 return TheMap.count(V);
5050 }
147147 /// ScopeTy - This is a helpful typedef that allows clients to get easy access
148148 /// to the name of the scope for this hash table.
149149 typedef ScopedHashTableScope ScopeTy;
150 typedef unsigned size_type;
150 typedef unsigned size_type;
151151 private:
152152 typedef ScopedHashTableVal ValTy;
153153 DenseMap TopLevelMap;
170170 AllocatorTy &getAllocator() { return Allocator; }
171171 const AllocatorTy &getAllocator() const { return Allocator; }
172172
173 /// Return 1 if the specified key is in the table, 0 otherwise.
173 /// Return 1 if the specified key is in the table, 0 otherwise.
174174 size_type count(const K &Key) const {
175175 return TopLevelMap.count(Key);
176176 }
5353 };
5454
5555 public:
56 typedef unsigned size_type;
56 typedef unsigned size_type;
5757 // Encapsulation of a single bit.
5858 class reference {
5959 SmallBitVector &TheVector;
4444 : public ilist_node > {
4545 public:
4646 typedef unsigned long BitWord;
47 typedef unsigned size_type;
47 typedef unsigned size_type;
4848 enum {
4949 BITWORD_SIZE = sizeof(BitWord) * CHAR_BIT,
5050 BITWORDS_PER_ELEMENT = (ElementSize + BITWORD_SIZE - 1) / BITWORD_SIZE,
184184 typedef const ValueT &const_reference;
185185 typedef ValueT *pointer;
186186 typedef const ValueT *const_pointer;
187 typedef unsigned size_type;
187 typedef unsigned size_type;
188188
189189 SparseMultiSet()
190190 : Sparse(nullptr), Universe(0), FreelistIdx(SMSNode::INVALID), NumFree(0) {}
123123
124124 typedef typename KeyFunctorT::argument_type KeyT;
125125 typedef SmallVector DenseT;
126 typedef unsigned size_type;
126 typedef unsigned size_type;
127127 DenseT Dense;
128128 SparseT *Sparse;
129129 unsigned Universe;
None //===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/HexagonBaseInfo.h"
10 #include "MCTargetDesc/HexagonMCTargetDesc.h"
11
12 #include "llvm/MC/MCContext.h"
13 #include "llvm/MC/MCDisassembler.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCFixedLenDisassembler.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/MC/MCInstrDesc.h"
18 #include "llvm/MC/MCSubtargetInfo.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/LEB128.h"
22 #include "llvm/Support/MemoryObject.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Support/Endian.h"
26
27 #include
28 #include
29
30 using namespace llvm;
31
32 #define DEBUG_TYPE "hexagon-disassembler"
33
34 // Pull DecodeStatus and its enum values into the global namespace.
35 typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
36
37 namespace {
38 /// \brief Hexagon disassembler for all Hexagon platforms.
39 class HexagonDisassembler : public MCDisassembler {
40 public:
41 HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
42 : MCDisassembler(STI, Ctx) {}
43
44 DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
45 MemoryObject const ®ion, uint64_t address,
46 raw_ostream &vStream, raw_ostream &cStream) const override;
47 };
48 }
49
50 static const uint16_t IntRegDecoderTable[] = {
51 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
52 Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9,
53 Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
54 Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
55 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,
56 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
57 Hexagon::R30, Hexagon::R31};
58
59 static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,
60 Hexagon::P2, Hexagon::P3};
61
62 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
63 uint64_t /*Address*/,
64 void const *Decoder) {
65 if (RegNo > 31)
66 return MCDisassembler::Fail;
67
68 unsigned Register = IntRegDecoderTable[RegNo];
69 Inst.addOperand(MCOperand::CreateReg(Register));
70 return MCDisassembler::Success;
71 }
72
73 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
74 uint64_t /*Address*/,
75 void const *Decoder) {
76 if (RegNo > 3)
77 return MCDisassembler::Fail;
78
79 unsigned Register = PredRegDecoderTable[RegNo];
80 Inst.addOperand(MCOperand::CreateReg(Register));
81 return MCDisassembler::Success;
82 }
83
84 #include "HexagonGenDisassemblerTables.inc"
85
86 static MCDisassembler *createHexagonDisassembler(Target const &T,
87 MCSubtargetInfo const &STI,
88 MCContext &Ctx) {
89 return new HexagonDisassembler(STI, Ctx);
90 }
91
92 extern "C" void LLVMInitializeHexagonDisassembler() {
93 TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
94 createHexagonDisassembler);
95 }
96
97 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
98 MemoryObject const &Region,
99 uint64_t Address,
100 raw_ostream &os,
101 raw_ostream &cs) const {
102 std::array Bytes;
103 Size = 4;
104 if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {
105 return MCDisassembler::Fail;
106 }
107 uint32_t insn =
108 llvm::support::endian::read
109 llvm::support::unaligned>(Bytes.data());
110
111 // Remove parse bits.
112 insn &= ~static_cast(HexagonII::InstParseBits::INST_PARSE_MASK);
113 return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);
114 }
0 //===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/HexagonBaseInfo.h"
10 #include "MCTargetDesc/HexagonMCTargetDesc.h"
11
12 #include "llvm/MC/MCContext.h"
13 #include "llvm/MC/MCDisassembler.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCFixedLenDisassembler.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/MC/MCInstrDesc.h"
18 #include "llvm/MC/MCSubtargetInfo.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/LEB128.h"
22 #include "llvm/Support/MemoryObject.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Support/Endian.h"
26
27 #include
28 #include
29
30 using namespace llvm;
31
32 #define DEBUG_TYPE "hexagon-disassembler"
33
34 // Pull DecodeStatus and its enum values into the global namespace.
35 typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
36
37 namespace {
38 /// \brief Hexagon disassembler for all Hexagon platforms.
39 class HexagonDisassembler : public MCDisassembler {
40 public:
41 HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
42 : MCDisassembler(STI, Ctx) {}
43
44 DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
45 MemoryObject const ®ion, uint64_t address,
46 raw_ostream &vStream, raw_ostream &cStream) const override;
47 };
48 }
49
50 static const uint16_t IntRegDecoderTable[] = {
51 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
52 Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9,
53 Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
54 Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
55 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,
56 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
57 Hexagon::R30, Hexagon::R31};
58
59 static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,
60 Hexagon::P2, Hexagon::P3};
61
62 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
63 uint64_t /*Address*/,
64 void const *Decoder) {
65 if (RegNo > 31)
66 return MCDisassembler::Fail;
67
68 unsigned Register = IntRegDecoderTable[RegNo];
69 Inst.addOperand(MCOperand::CreateReg(Register));
70 return MCDisassembler::Success;
71 }
72
73 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
74 uint64_t /*Address*/,
75 void const *Decoder) {
76 if (RegNo > 3)
77 return MCDisassembler::Fail;
78
79 unsigned Register = PredRegDecoderTable[RegNo];
80 Inst.addOperand(MCOperand::CreateReg(Register));
81 return MCDisassembler::Success;
82 }
83
84 #include "HexagonGenDisassemblerTables.inc"
85
86 static MCDisassembler *createHexagonDisassembler(Target const &T,
87 MCSubtargetInfo const &STI,
88 MCContext &Ctx) {
89 return new HexagonDisassembler(STI, Ctx);
90 }
91
92 extern "C" void LLVMInitializeHexagonDisassembler() {
93 TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
94 createHexagonDisassembler);
95 }
96
97 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
98 MemoryObject const &Region,
99 uint64_t Address,
100 raw_ostream &os,
101 raw_ostream &cs) const {
102 std::array Bytes;
103 Size = 4;
104 if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {
105 return MCDisassembler::Fail;
106 }
107 uint32_t insn =
108 llvm::support::endian::read
109 llvm::support::unaligned>(Bytes.data());
110
111 // Remove parse bits.
112 insn &= ~static_cast(HexagonII::InstParseBits::INST_PARSE_MASK);
113 return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);
114 }
1616 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
1717 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
1818
19 #include "HexagonMCTargetDesc.h"
20 #include "llvm/Support/ErrorHandling.h"
21
22 #include
23
24 namespace llvm {
25
26 /// HexagonII - This namespace holds all of the target specific flags that
19 #include "HexagonMCTargetDesc.h"
20 #include "llvm/Support/ErrorHandling.h"
21
22 #include
23
24 namespace llvm {
25
26 /// HexagonII - This namespace holds all of the target specific flags that
2727 /// instruction info tracks.
2828 ///
2929 namespace HexagonII {
187187 MO_LO16, MO_HI16,
188188
189189 // Offset from the base of the SDA.
190 MO_GPREL
191 };
192
193 enum class InstParseBits : uint32_t {
194 INST_PARSE_MASK = 0x0000c000,
195 INST_PARSE_PACKET_END = 0x0000c000,
196 INST_PARSE_LOOP_END = 0x00008000,
197 INST_PARSE_NOT_END = 0x00004000,
198 INST_PARSE_DUPLEX = 0x00000000,
199 INST_PARSE_EXTENDER = 0x00000000
200 };
201
202 } // End namespace HexagonII.
203
204 } // End namespace llvm.
190 MO_GPREL
191 };
192
193 enum class InstParseBits : uint32_t {
194 INST_PARSE_MASK = 0x0000c000,
195 INST_PARSE_PACKET_END = 0x0000c000,
196 INST_PARSE_LOOP_END = 0x00008000,
197 INST_PARSE_NOT_END = 0x00004000,
198 INST_PARSE_DUPLEX = 0x00000000,
199 INST_PARSE_EXTENDER = 0x00000000
200 };
201
202 } // End namespace HexagonII.
203
204 } // End namespace llvm.
205205
206206 #endif