llvm.org GIT mirror llvm / af588b9
[x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199808 91177308-0d34-0410-b5e6-96231b3b80d8 David Woodhouse 6 years ago
6 changed file(s) with 35 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
23442344 }
23452345 }
23462346
2347 // Transform "outs[bwl] %ds:(%esi), %dx" into "out[bwl]"
2348 if (Name.startswith("outs") && Operands.size() == 3 &&
2349 (Name == "outsb" || Name == "outsw" || Name == "outsl")) {
2350 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2351 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2];
2352 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) {
2353 Operands.pop_back();
2354 Operands.pop_back();
2355 delete &Op;
2356 delete &Op2;
2347 // Append default arguments to "outs[bwld]"
2348 if (Name.startswith("outs") && Operands.size() == 1 &&
2349 (Name == "outsb" || Name == "outsw" || Name == "outsl" ||
2350 Name == "outsd" )) {
2351 if (isParsingIntelSyntax()) {
2352 Operands.push_back(DefaultMemSIOperand(NameLoc));
2353 Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
2354 } else {
2355 Operands.push_back(DefaultMemSIOperand(NameLoc));
2356 Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
23572357 }
23582358 }
23592359
17711771 }
17721772
17731773 let SchedRW = [WriteSystem] in {
1774 def OUTSB : I<0x6E, RawFrm, (outs), (ins), "outsb", [], IIC_OUTS>;
1775 def OUTSW : I<0x6F, RawFrm, (outs), (ins), "outsw", [], IIC_OUTS>, OpSize;
1776 def OUTSL : I<0x6F, RawFrm, (outs), (ins), "outs{l|d}", [], IIC_OUTS>, OpSize16;
1774 def OUTSB : I<0x6E, RawFrmSrc, (outs), (ins srcidx8:$src),
1775 "outsb\t{$src, %dx|dx, $src}", [], IIC_OUTS>;
1776 def OUTSW : I<0x6F, RawFrmSrc, (outs), (ins srcidx16:$src),
1777 "outsw\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize;
1778 def OUTSL : I<0x6F, RawFrmSrc, (outs), (ins srcidx32:$src),
1779 "outs{l|d}\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize16;
17771780 }
17781781
17791782 // Flag instructions
128128 // 64: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0x67,0xa5]
129129 // 32: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0xa5]
130130 // 16: movsl %gs:(%esi), %es:(%edi) # encoding: [0x66,0x65,0x67,0xa5]
131
132 outsb
133 // 64: outsb (%rsi), %dx # encoding: [0x6e]
134 // 32: outsb (%esi), %dx # encoding: [0x6e]
135 // 16: outsb (%si), %dx # encoding: [0x6e]
136
137 outsw %fs:(%esi), %dx
138 // 64: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x67,0x6f]
139 // 32: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x6f]
140 // 16: outsw %fs:(%esi), %dx # encoding: [0x64,0x67,0x6f]
788788 // CHECK: encoding: [0xe0,A]
789789 loopnz 0
790790
791 // CHECK: outsb # encoding: [0x6e]
791 // CHECK: outsb (%si), %dx # encoding: [0x6e]
792792 // CHECK: outsb
793793 // CHECK: outsb
794794 outsb
795795 outsb %ds:(%si), %dx
796796 outsb (%si), %dx
797797
798 // CHECK: outsw # encoding: [0x6f]
798 // CHECK: outsw (%si), %dx # encoding: [0x6f]
799799 // CHECK: outsw
800800 // CHECK: outsw
801801 outsw
802802 outsw %ds:(%si), %dx
803803 outsw (%si), %dx
804804
805 // CHECK: outsl # encoding: [0x66,0x6f]
805 // CHECK: outsl (%si), %dx # encoding: [0x66,0x6f]
806806 // CHECK: outsl
807807 outsl
808808 outsl %ds:(%si), %dx
864864 // CHECK: encoding: [0xe0,A]
865865 loopnz 0
866866
867 // CHECK: outsb # encoding: [0x6e]
867 // CHECK: outsb (%esi), %dx # encoding: [0x6e]
868868 // CHECK: outsb
869869 // CHECK: outsb
870870 outsb
871871 outsb %ds:(%esi), %dx
872872 outsb (%esi), %dx
873873
874 // CHECK: outsw # encoding: [0x66,0x6f]
874 // CHECK: outsw (%esi), %dx # encoding: [0x66,0x6f]
875875 // CHECK: outsw
876876 // CHECK: outsw
877877 outsw
878878 outsw %ds:(%esi), %dx
879879 outsw (%esi), %dx
880880
881 // CHECK: outsl # encoding: [0x6f]
881 // CHECK: outsl (%esi), %dx # encoding: [0x6f]
882882 // CHECK: outsl
883883 outsl
884884 outsl %ds:(%esi), %dx
10491049 // CHECK: encoding: [0xe0,A]
10501050 loopnz 0
10511051
1052 // CHECK: outsb # encoding: [0x6e]
1052 // CHECK: outsb (%rsi), %dx # encoding: [0x6e]
10531053 // CHECK: outsb
10541054 // CHECK: outsb
10551055 outsb
10561056 outsb %ds:(%rsi), %dx
10571057 outsb (%rsi), %dx
10581058
1059 // CHECK: outsw # encoding: [0x66,0x6f]
1059 // CHECK: outsw (%rsi), %dx # encoding: [0x66,0x6f]
10601060 // CHECK: outsw
10611061 // CHECK: outsw
10621062 outsw
10631063 outsw %ds:(%rsi), %dx
10641064 outsw (%rsi), %dx
10651065
1066 // CHECK: outsl # encoding: [0x6f]
1066 // CHECK: outsl (%rsi), %dx # encoding: [0x6f]
10671067 // CHECK: outsl
10681068 outsl
10691069 outsl %ds:(%rsi), %dx