llvm.org GIT mirror llvm / af54ec4
[X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR. This is different than the behavior of EVEX.X extending modrm.rm to 5 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333728 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 2 years ago
2 changed file(s) with 22 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
14441444 return 0;
14451445 }
14461446
1447 #define GENERIC_FIXUP_FUNC(name, base, prefix) \
1447 #define GENERIC_FIXUP_FUNC(name, base, prefix, mask) \
14481448 static uint16_t name(struct InternalInstruction *insn, \
14491449 OperandType type, \
14501450 uint8_t index, \
14581458 case TYPE_Rv: \
14591459 return base + index; \
14601460 case TYPE_R8: \
1461 index &= 0xf; \
1461 index &= mask; \
1462 if (index > 0xf) \
1463 *valid = 0; \
14621464 if (insn->rexPrefix && \
14631465 index >= 4 && index <= 7) { \
14641466 return prefix##_SPL + (index - 4); \
14661468 return prefix##_AL + index; \
14671469 } \
14681470 case TYPE_R16: \
1469 return prefix##_AX + (index & 0xf); \
1471 index &= mask; \
1472 if (index > 0xf) \
1473 *valid = 0; \
1474 return prefix##_AX + index; \
14701475 case TYPE_R32: \
1471 return prefix##_EAX + (index & 0xf); \
1476 index &= mask; \
1477 if (index > 0xf) \
1478 *valid = 0; \
1479 return prefix##_EAX + index; \
14721480 case TYPE_R64: \
1473 return prefix##_RAX + (index & 0xf); \
1481 index &= mask; \
1482 if (index > 0xf) \
1483 *valid = 0; \
1484 return prefix##_RAX + index; \
14741485 case TYPE_ZMM: \
14751486 return prefix##_ZMM0 + index; \
14761487 case TYPE_YMM: \
15181529 * field is valid for the register class; 0 if not.
15191530 * @return - The proper value.
15201531 */
1521 GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG)
1522 GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG)
1532 GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG, 0x1f)
1533 GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG, 0xf)
15231534
15241535 /*
15251536 * fixupReg - Consults an operand specifier to determine which of the
0 # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 2>&1 | grep "invalid instruction encoding"
1
2 # This instruction would decode as vcvtsd2usi if the EVEX.R' field weren't 0.
3 0x62 0xe1 0xff 0x08 0x79 0xc0