llvm.org GIT mirror llvm / af4bf77
[AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot Contributed by Dr. Gergő Érdi. Fixes a bug. Raised from (https://github.com/avr-rust/rust/issues/49). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302973 91177308-0d34-0410-b5e6-96231b3b80d8 Dylan McKay 3 years ago
2 changed file(s) with 38 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
16091609 MachineBasicBlock *trueMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16101610 MachineBasicBlock *falseMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16111611
1612 MachineFunction::iterator I = MBB->getParent()->begin();
1613 ++I;
1612 MachineFunction::iterator I;
1613 for (I = MF->begin(); I != MF->end() && &(*I) != MBB; ++I);
1614 if (I != MF->end()) ++I;
16141615 MF->insert(I, trueMBB);
16151616 MF->insert(I, falseMBB);
16161617
0 ; RUN: llc -mcpu=atmega328p < %s -march=avr | FileCheck %s
1
2 ; CHECK-LABEL: loopy
3 define internal fastcc void @loopy() {
4
5 ; In this case, when we expand `Select8`/`Select16`, we should be
6 ; replacing the existing MBB instead of adding a new one.
7 ;
8 ; https://github.com/avr-rust/rust/issues/49
9
10 ; CHECK: LBB0_1:
11 ; CHECK: LBB0_2:
12 ; CHECK-NOT: LBB0_3:
13 start:
14 br label %bb7.preheader
15
16 bb7.preheader: ; preds = %bb10, %start
17 %i = phi i8 [ 0, %start ], [ %j, %bb10 ]
18 %j = phi i8 [ 1, %start ], [ %next, %bb10 ]
19 br label %bb10
20
21 bb4: ; preds = %bb10
22 ret void
23
24 bb10: ; preds = %bb7.preheader
25 tail call fastcc void @observe(i8 %i, i8 1)
26 %0 = icmp ult i8 %j, 20
27 %1 = zext i1 %0 to i8
28 %next = add i8 %j, %1
29 br i1 %0, label %bb7.preheader, label %bb4
30
31 }
32
33 declare void @observe(i8, i8);
34