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Revert "Refactor ARM subarchitecture parsing" This reverts commit 7b4a6882467e7fef4516a0cbc418cbfce0fc6f6d. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212521 91177308-0d34-0410-b5e6-96231b3b80d8 Renato Golin 6 years ago
3 changed file(s) with 82 addition(s) and 123 deletion(s). Raw diff Collapse all Expand all
7777 spir, // SPIR: standard portable IR for OpenCL 32-bit version
7878 spir64 // SPIR: standard portable IR for OpenCL 64-bit version
7979 };
80 enum SubArchType {
81 NoSubArch,
82
83 ARMSubArch_v8,
84 ARMSubArch_v7,
85 ARMSubArch_v7em,
86 ARMSubArch_v7m,
87 ARMSubArch_v7s,
88 ARMSubArch_v6,
89 ARMSubArch_v6m,
90 ARMSubArch_v6t2,
91 ARMSubArch_v5,
92 ARMSubArch_v5te,
93 ARMSubArch_v4t,
94 ARMSubArch_v4
95 };
9680 enum VendorType {
9781 UnknownVendor,
9882
163147 /// The parsed arch type.
164148 ArchType Arch;
165149
166 /// The parsed subarchitecture type.
167 SubArchType SubArch;
168
169150 /// The parsed vendor type.
170151 VendorType Vendor;
171152
207188
208189 /// getArch - Get the parsed architecture type of this triple.
209190 ArchType getArch() const { return Arch; }
210
211 /// getSubArch - get the parsed subarchitecture type for this triple.
212 SubArchType getSubArch() const { return SubArch; }
213191
214192 /// getVendor - Get the parsed vendor type of this triple.
215193 VendorType getVendor() const { return Vendor; }
349349 .Default(Triple::UnknownObjectFormat);
350350 }
351351
352 static Triple::SubArchType parseSubArch(StringRef SubArchName) {
353 return StringSwitch(SubArchName)
354 .EndsWith("v8", Triple::ARMSubArch_v8)
355 .EndsWith("v8a", Triple::ARMSubArch_v8)
356 .EndsWith("v7", Triple::ARMSubArch_v7)
357 .EndsWith("v7a", Triple::ARMSubArch_v7)
358 .EndsWith("v7em", Triple::ARMSubArch_v7em)
359 .EndsWith("v7m", Triple::ARMSubArch_v7m)
360 .EndsWith("v7s", Triple::ARMSubArch_v7s)
361 .EndsWith("v6", Triple::ARMSubArch_v6)
362 .EndsWith("v6m", Triple::ARMSubArch_v6m)
363 .EndsWith("v6t2", Triple::ARMSubArch_v6t2)
364 .EndsWith("v5", Triple::ARMSubArch_v5)
365 .EndsWith("v5t", Triple::ARMSubArch_v5)
366 .EndsWith("v5te", Triple::ARMSubArch_v5te)
367 .EndsWith("v4t", Triple::ARMSubArch_v4t)
368 .EndsWith("v4", Triple::ARMSubArch_v4)
369 .Default(Triple::NoSubArch);
370 }
371
372352 static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) {
373353 switch (Kind) {
374354 case Triple::UnknownObjectFormat: return "";
394374 Triple::Triple(const Twine &Str)
395375 : Data(Str.str()),
396376 Arch(parseArch(getArchName())),
397 SubArch(parseSubArch(getArchName())),
398377 Vendor(parseVendor(getVendorName())),
399378 OS(parseOS(getOSName())),
400379 Environment(parseEnvironment(getEnvironmentName())),
412391 Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr)
413392 : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()),
414393 Arch(parseArch(ArchStr.str())),
415 SubArch(parseSubArch(ArchStr.str())),
416394 Vendor(parseVendor(VendorStr.str())),
417395 OS(parseOS(OSStr.str())),
418396 Environment(), ObjectFormat(Triple::UnknownObjectFormat) {
429407 : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') +
430408 EnvironmentStr).str()),
431409 Arch(parseArch(ArchStr.str())),
432 SubArch(parseSubArch(ArchStr.str())),
433410 Vendor(parseVendor(VendorStr.str())),
434411 OS(parseOS(OSStr.str())),
435412 Environment(parseEnvironment(EnvironmentStr.str())),
8383 std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {
8484 Triple triple(TT);
8585
86 // Set the boolean corresponding to the current target triple, or the default
87 // if one cannot be determined, to true.
88 unsigned Len = TT.size();
89 unsigned Idx = 0;
90
91 // FIXME: Enhance Triple helper class to extract ARM version.
8692 bool isThumb = triple.getArch() == Triple::thumb ||
8793 triple.getArch() == Triple::thumbeb;
94 if (Len >= 5 && TT.substr(0, 4) == "armv")
95 Idx = 4;
96 else if (Len >= 7 && TT.substr(0, 6) == "armebv")
97 Idx = 6;
98 else if (Len >= 7 && TT.substr(0, 6) == "thumbv")
99 Idx = 6;
100 else if (Len >= 9 && TT.substr(0, 8) == "thumbebv")
101 Idx = 8;
88102
89103 bool NoCPU = CPU == "generic" || CPU.empty();
90104 std::string ARMArchFeature;
91 switch (triple.getSubArch()) {
92 case Triple::ARMSubArch_v8:
93 if (NoCPU)
94 // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
95 // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
96 // FeatureT2XtPk, FeatureCrypto, FeatureCRC
97 ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
98 "+trustzone,+t2xtpk,+crypto,+crc";
99 else
100 // Use CPU to figure out the exact features
101 ARMArchFeature = "+v8";
102 break;
103 case Triple::ARMSubArch_v7m:
104 isThumb = true;
105 if (NoCPU)
106 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
107 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
108 else
109 // Use CPU to figure out the exact features.
110 ARMArchFeature = "+v7";
111 break;
112 case Triple::ARMSubArch_v7em:
113 if (NoCPU)
114 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
115 // FeatureT2XtPk, FeatureMClass
116 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
117 else
118 // Use CPU to figure out the exact features.
119 ARMArchFeature = "+v7";
120 break;
121 case Triple::ARMSubArch_v7s:
122 if (NoCPU)
123 // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
124 // Swift
125 ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
126 else
127 // Use CPU to figure out the exact features.
128 ARMArchFeature = "+v7";
129 break;
130 case Triple::ARMSubArch_v7:
131 // v7 CPUs have lots of different feature sets. If no CPU is specified,
132 // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
133 // the "minimum" feature set and use CPU string to figure out the exact
134 // features.
135 if (NoCPU)
136 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
137 ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
138 else
139 // Use CPU to figure out the exact features.
140 ARMArchFeature = "+v7";
141 break;
142 case Triple::ARMSubArch_v6t2:
143 ARMArchFeature = "+v6t2";
144 break;
145 case Triple::ARMSubArch_v6m:
146 isThumb = true;
147 if (NoCPU)
148 // v6m: FeatureNoARM, FeatureMClass
149 ARMArchFeature = "+v6m,+noarm,+mclass";
150 else
151 ARMArchFeature = "+v6";
152 break;
153 case Triple::ARMSubArch_v6:
154 ARMArchFeature = "+v6";
155 break;
156 case Triple::ARMSubArch_v5te:
157 ARMArchFeature = "+v5te";
158 break;
159 case Triple::ARMSubArch_v5:
160 ARMArchFeature = "+v5t";
161 break;
162 case Triple::ARMSubArch_v4t:
163 ARMArchFeature = "+v4t";
164 break;
165 case Triple::NoSubArch:
166 case Triple::ARMSubArch_v4:
167 ARMArchFeature = "+v4";
168 break;
105 if (Idx) {
106 unsigned SubVer = TT[Idx];
107 if (SubVer == '8') {
108 if (NoCPU)
109 // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
110 // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
111 // FeatureT2XtPk, FeatureCrypto, FeatureCRC
112 ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
113 "+trustzone,+t2xtpk,+crypto,+crc";
114 else
115 // Use CPU to figure out the exact features
116 ARMArchFeature = "+v8";
117 } else if (SubVer == '7') {
118 if (Len >= Idx+2 && TT[Idx+1] == 'm') {
119 isThumb = true;
120 if (NoCPU)
121 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
122 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
123 else
124 // Use CPU to figure out the exact features.
125 ARMArchFeature = "+v7";
126 } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') {
127 if (NoCPU)
128 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
129 // FeatureT2XtPk, FeatureMClass
130 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
131 else
132 // Use CPU to figure out the exact features.
133 ARMArchFeature = "+v7";
134 } else if (Len >= Idx+2 && TT[Idx+1] == 's') {
135 if (NoCPU)
136 // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
137 // Swift
138 ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
139 else
140 // Use CPU to figure out the exact features.
141 ARMArchFeature = "+v7";
142 } else {
143 // v7 CPUs have lots of different feature sets. If no CPU is specified,
144 // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
145 // the "minimum" feature set and use CPU string to figure out the exact
146 // features.
147 if (NoCPU)
148 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
149 ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
150 else
151 // Use CPU to figure out the exact features.
152 ARMArchFeature = "+v7";
153 }
154 } else if (SubVer == '6') {
155 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
156 ARMArchFeature = "+v6t2";
157 else if (Len >= Idx+2 && TT[Idx+1] == 'm') {
158 isThumb = true;
159 if (NoCPU)
160 // v6m: FeatureNoARM, FeatureMClass
161 ARMArchFeature = "+v6m,+noarm,+mclass";
162 else
163 ARMArchFeature = "+v6";
164 } else
165 ARMArchFeature = "+v6";
166 } else if (SubVer == '5') {
167 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
168 ARMArchFeature = "+v5te";
169 else
170 ARMArchFeature = "+v5t";
171 } else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't')
172 ARMArchFeature = "+v4t";
169173 }
170174
171175 if (isThumb) {