llvm.org GIT mirror llvm / ae6f41b
Merging r370036: ------------------------------------------------------------------------ r370036 | tnorthover | 2019-08-27 12:21:11 +0200 (Tue, 27 Aug 2019) | 8 lines AArch64: avoid creating cycle in DAG for post-increment NEON ops. Inserting a value into Visited has the effect of terminating a search for predecessors if that node is seen. This is legitimate for the base address, and acts as a slight performance optimization, but the vector-building node can be paert of a legitimate cycle so we shouldn't stop searching there. PR43056. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@370063 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 1 year, 3 months ago
2 changed file(s) with 20 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
1057810578 // are predecessors to each other or the Vector.
1057910579 SmallPtrSet Visited;
1058010580 SmallVector Worklist;
10581 Visited.insert(N);
10581 Visited.insert(Addr.getNode());
1058210582 Worklist.push_back(User);
1058310583 Worklist.push_back(LD);
1058410584 Worklist.push_back(Vector.getNode());
63186318 store <8 x i8> %sub, <8 x i8>* %p
63196319 ret void
63206320 }
6321
6322 define <4 x i32> @test_inc_cycle(<4 x i32> %vec, i32* %in) {
6323 ; CHECK-LABEL: test_inc_cycle:
6324 ; CHECK: ld1.s { v0 }[0], [x0]{{$}}
6325
6326 %elt = load i32, i32* %in
6327 %newvec = insertelement <4 x i32> %vec, i32 %elt, i32 0
6328
6329 ; %inc cannot be %elt directly because we check that the load is only
6330 ; used by the insert before trying to form post-inc.
6331 %inc.vec = bitcast <4 x i32> %newvec to <2 x i64>
6332 %inc = extractelement <2 x i64> %inc.vec, i32 0
6333 %newaddr = getelementptr i32, i32* %in, i64 %inc
6334 store i32* %newaddr, i32** @var
6335
6336 ret <4 x i32> %newvec
6337 }
6338
6339 @var = global i32* null