llvm.org GIT mirror llvm / ad78ef2
Doh. ARM::PC is obvious a reserved register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 1 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
314314 BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
315315 BitVector Reserved(getNumRegs());
316316 Reserved.set(ARM::SP);
317 Reserved.set(ARM::PC);
317318 if (STI.isTargetDarwin() || hasFP(MF))
318319 Reserved.set(FramePtr);
319320 // Some targets reserve R9.