llvm.org GIT mirror llvm / ad2d46d
Convert more tests over to the new atomic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140559 91177308-0d34-0410-b5e6-96231b3b80d8 Eli Friedman 8 years ago
4 changed file(s) with 23 addition(s) and 65 deletion(s). Raw diff Collapse all Expand all
99 ; T2: t:
1010 ; T2: ldrexb
1111 ; T2: strexb
12 %tmp0 = tail call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* %a, i8 %b, i8 %c)
12 %tmp0 = cmpxchg i8* %a, i8 %b, i8 %c monotonic
1313 ret i8 %tmp0
1414 }
15
16 declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* nocapture, i8, i8) nounwind
2323 ; CHECK: ldrex
2424 ; CHECK: add
2525 ; CHECK: strex
26 call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val1, i32 %tmp ) ; :0 [#uses=1]
26 %0 = atomicrmw add i32* %val1, i32 %tmp monotonic
2727 store i32 %0, i32* %old
2828 ; CHECK: ldrex
2929 ; CHECK: sub
3030 ; CHECK: strex
31 call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 30 ) ; :1 [#uses=1]
31 %1 = atomicrmw sub i32* %val2, i32 30 monotonic
3232 store i32 %1, i32* %old
3333 ; CHECK: ldrex
3434 ; CHECK: add
3535 ; CHECK: strex
36 call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val2, i32 1 ) ; :2 [#uses=1]
36 %2 = atomicrmw add i32* %val2, i32 1 monotonic
3737 store i32 %2, i32* %old
3838 ; CHECK: ldrex
3939 ; CHECK: sub
4040 ; CHECK: strex
41 call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 1 ) ; :3 [#uses=1]
41 %3 = atomicrmw sub i32* %val2, i32 1 monotonic
4242 store i32 %3, i32* %old
4343 ; CHECK: ldrex
4444 ; CHECK: and
4545 ; CHECK: strex
46 call i32 @llvm.atomic.load.and.i32.p0i32( i32* %andt, i32 4080 ) ; :4 [#uses=1]
46 %4 = atomicrmw and i32* %andt, i32 4080 monotonic
4747 store i32 %4, i32* %old
4848 ; CHECK: ldrex
4949 ; CHECK: or
5050 ; CHECK: strex
51 call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ort, i32 4080 ) ; :5 [#uses=1]
51 %5 = atomicrmw or i32* %ort, i32 4080 monotonic
5252 store i32 %5, i32* %old
5353 ; CHECK: ldrex
5454 ; CHECK: eor
5555 ; CHECK: strex
56 call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %xort, i32 4080 ) ; :6 [#uses=1]
56 %6 = atomicrmw xor i32* %xort, i32 4080 monotonic
5757 store i32 %6, i32* %old
5858 ; CHECK: ldrex
5959 ; CHECK: cmp
6060 ; CHECK: strex
61 call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 16 ) ; :7 [#uses=1]
61 %7 = atomicrmw min i32* %val2, i32 16 monotonic
6262 store i32 %7, i32* %old
6363 %neg = sub i32 0, 1 ; [#uses=1]
6464 ; CHECK: ldrex
6565 ; CHECK: cmp
6666 ; CHECK: strex
67 call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 %neg ) ; :8 [#uses=1]
67 %8 = atomicrmw min i32* %val2, i32 %neg monotonic
6868 store i32 %8, i32* %old
6969 ; CHECK: ldrex
7070 ; CHECK: cmp
7171 ; CHECK: strex
72 call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 1 ) ; :9 [#uses=1]
72 %9 = atomicrmw max i32* %val2, i32 1 monotonic
7373 store i32 %9, i32* %old
7474 ; CHECK: ldrex
7575 ; CHECK: cmp
7676 ; CHECK: strex
77 call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 0 ) ; :10 [#uses=1]
77 %10 = atomicrmw max i32* %val2, i32 0 monotonic
7878 store i32 %10, i32* %old
7979 ret void
8080 }
81
82 declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
83
84 declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
85
86 declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
87
88 declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
89
90 declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
91
92 declare i32 @llvm.atomic.load.min.i32.p0i32(i32*, i32) nounwind
93
94 declare i32 @llvm.atomic.load.max.i32.p0i32(i32*, i32) nounwind
95
96 declare i32 @llvm.atomic.load.umax.i32.p0i32(i32*, i32) nounwind
97
98 declare i32 @llvm.atomic.load.umin.i32.p0i32(i32*, i32) nounwind
99
100 declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
101
102 declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
0 ; RUN: llc -march=mipsel < %s | FileCheck %s
11
2
3 declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind
4 declare i32 @llvm.atomic.load.nand.i32.p0i32(i32* nocapture, i32) nounwind
5 declare i32 @llvm.atomic.swap.i32.p0i32(i32* nocapture, i32) nounwind
6 declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* nocapture, i32, i32) nounwind
7
8 declare i8 @llvm.atomic.load.add.i8.p0i8(i8* nocapture, i8) nounwind
9 declare i8 @llvm.atomic.load.sub.i8.p0i8(i8* nocapture, i8) nounwind
10 declare i8 @llvm.atomic.load.nand.i8.p0i8(i8* nocapture, i8) nounwind
11 declare i8 @llvm.atomic.swap.i8.p0i8(i8* nocapture, i8) nounwind
12 declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* nocapture, i8, i8) nounwind
13
14 declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
15
162 @x = common global i32 0, align 4
173
184 define i32 @AtomicLoadAdd32(i32 %incr) nounwind {
195 entry:
20 %0 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* @x, i32 %incr)
6 %0 = atomicrmw add i32* @x, i32 %incr monotonic
217 ret i32 %0
228
239 ; CHECK: AtomicLoadAdd32:
3117
3218 define i32 @AtomicLoadNand32(i32 %incr) nounwind {
3319 entry:
34 %0 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* @x, i32 %incr)
20 %0 = atomicrmw nand i32* @x, i32 %incr monotonic
3521 ret i32 %0
3622
3723 ; CHECK: AtomicLoadNand32:
4935 %newval.addr = alloca i32, align 4
5036 store i32 %newval, i32* %newval.addr, align 4
5137 %tmp = load i32* %newval.addr, align 4
52 %0 = call i32 @llvm.atomic.swap.i32.p0i32(i32* @x, i32 %tmp)
38 %0 = atomicrmw xchg i32* @x, i32 %tmp monotonic
5339 ret i32 %0
5440
5541 ; CHECK: AtomicSwap32:
6551 %newval.addr = alloca i32, align 4
6652 store i32 %newval, i32* %newval.addr, align 4
6753 %tmp = load i32* %newval.addr, align 4
68 %0 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* @x, i32 %oldval, i32 %tmp)
54 %0 = cmpxchg i32* @x, i32 %oldval, i32 %tmp monotonic
6955 ret i32 %0
7056
7157 ; CHECK: AtomicCmpSwap32:
8470
8571 define signext i8 @AtomicLoadAdd8(i8 signext %incr) nounwind {
8672 entry:
87 %0 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @y, i8 %incr)
73 %0 = atomicrmw add i8* @y, i8 %incr monotonic
8874 ret i8 %0
8975
9076 ; CHECK: AtomicLoadAdd8:
115101
116102 define signext i8 @AtomicLoadSub8(i8 signext %incr) nounwind {
117103 entry:
118 %0 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @y, i8 %incr)
104 %0 = atomicrmw sub i8* @y, i8 %incr monotonic
119105 ret i8 %0
120106
121107 ; CHECK: AtomicLoadSub8:
146132
147133 define signext i8 @AtomicLoadNand8(i8 signext %incr) nounwind {
148134 entry:
149 %0 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @y, i8 %incr)
135 %0 = atomicrmw nand i8* @y, i8 %incr monotonic
150136 ret i8 %0
151137
152138 ; CHECK: AtomicLoadNand8:
178164
179165 define signext i8 @AtomicSwap8(i8 signext %newval) nounwind {
180166 entry:
181 %0 = call i8 @llvm.atomic.swap.i8.p0i8(i8* @y, i8 %newval)
167 %0 = atomicrmw xchg i8* @y, i8 %newval monotonic
182168 ret i8 %0
183169
184170 ; CHECK: AtomicSwap8:
207193
208194 define signext i8 @AtomicCmpSwap8(i8 signext %oldval, i8 signext %newval) nounwind {
209195 entry:
210 %0 = call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* @y, i8 %oldval, i8 %newval)
196 %0 = cmpxchg i8* @y, i8 %oldval, i8 %newval monotonic
211197 ret i8 %0
212198
213199 ; CHECK: AtomicCmpSwap8:
244230
245231 define i32 @CheckSync(i32 %v) nounwind noinline {
246232 entry:
247 tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
248 %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* @countsint, i32 %v)
249 tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
233 %0 = atomicrmw add i32* @countsint, i32 %v seq_cst
250234 ret i32 %0
251235
252236 ; CHECK: CheckSync:
0 ; RUN: opt < %s -loweratomic -S | FileCheck %s
1
2 declare void @llvm.memory.barrier(i1 %ll, i1 %ls, i1 %sl, i1 %ss, i1 %device)
31
42 define void @barrier() {
53 ; CHECK: @barrier
6 call void @llvm.memory.barrier(i1 0, i1 0, i1 0, i1 0, i1 0)
4 fence seq_cst
75 ; CHECK-NEXT: ret
86 ret void
97 }