llvm.org GIT mirror llvm / ac7caa0
Update live-in lists when splitting critical edges. Fixes PR10814. Patch by Jan Sjödin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141960 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
3 changed file(s) with 108 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
570570 if (i->getOperand(ni+1).getMBB() == this)
571571 i->getOperand(ni+1).setMBB(NMBB);
572572
573 // Inherit live-ins from the successor
574 for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(),
575 E = Succ->livein_end(); I != E; ++I)
576 NMBB->addLiveIn(*I);
577
573578 // Update LiveVariables.
574579 if (LV) {
575580 // Restore kills of virtual registers that were killed by the terminators.
0 ; RUN: llc < %s | FileCheck %s
1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
2 target triple = "x86_64-pc-linux"
3
4
5 %0 = type <{ i64, i64, %1, %1, [21 x %2] }>
6 %1 = type <{ i64, i64, i64 }>
7 %2 = type <{ i32, i32, i8 addrspace(2)* }>
8 %3 = type { i8*, i8*, i8*, i8*, i32 }
9 %4 = type <{ %5*, i8*, i32, i32, [4 x i64], [4 x i64], [4 x i64], [4 x i64], [4 x i64] }>
10 %5 = type <{ void (i32)*, i8*, i32 (i8*, ...)* }>
11
12 define void @foo(i8* nocapture %_stubArgs) nounwind {
13 entry:
14 %i0 = alloca i8*, align 8
15 %i2 = alloca i8*, align 8
16 %b.i = alloca [16 x <2 x double>], align 16
17 %conv = bitcast i8* %_stubArgs to i32*
18 %tmp1 = load i32* %conv, align 4
19 %ptr8 = getelementptr i8* %_stubArgs, i64 16
20 %i4 = bitcast i8* %ptr8 to <2 x double>*
21 %ptr20 = getelementptr i8* %_stubArgs, i64 48
22 %i7 = bitcast i8* %ptr20 to <2 x double> addrspace(1)**
23 %tmp21 = load <2 x double> addrspace(1)** %i7, align 8
24 %ptr28 = getelementptr i8* %_stubArgs, i64 64
25 %i9 = bitcast i8* %ptr28 to i32*
26 %tmp29 = load i32* %i9, align 4
27 %ptr32 = getelementptr i8* %_stubArgs, i64 68
28 %i10 = bitcast i8* %ptr32 to i32*
29 %tmp33 = load i32* %i10, align 4
30 %tmp17.i = mul i32 10, 20
31 %tmp19.i = add i32 %tmp17.i, %tmp33
32 %conv21.i = zext i32 %tmp19.i to i64
33 %tmp6.i = and i32 42, -32
34 %tmp42.i = add i32 %tmp6.i, 17
35 %tmp44.i = insertelement <2 x i32> undef, i32 %tmp42.i, i32 1
36 %tmp96676677.i = or i32 17, -4
37 %ptr4438.i = getelementptr inbounds [16 x <2 x double>]* %b.i, i64 0, i64 0
38 %arrayidx4506.i = getelementptr [16 x <2 x double>]* %b.i, i64 0, i64 4
39 %tmp52.i = insertelement <2 x i32> %tmp44.i, i32 0, i32 0
40 %tmp78.i = extractelement <2 x i32> %tmp44.i, i32 1
41 %tmp97.i = add i32 %tmp78.i, %tmp96676677.i
42 %tmp99.i = insertelement <2 x i32> %tmp52.i, i32 %tmp97.i, i32 1
43 %tmp154.i = extractelement <2 x i32> %tmp99.i, i32 1
44 %tmp156.i = extractelement <2 x i32> %tmp52.i, i32 0
45 %tmp158.i = urem i32 %tmp156.i, %tmp1
46 %i38 = mul i32 %tmp154.i, %tmp29
47 %i39 = add i32 %tmp158.i, %i38
48 %conv160.i = zext i32 %i39 to i64
49 %tmp22.sum652.i = add i64 %conv160.i, %conv21.i
50 %arrayidx161.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum652.i
51 %tmp162.i = load <2 x double> addrspace(1)* %arrayidx161.i, align 16
52 %tmp222.i = add i32 %tmp154.i, 1
53 %i43 = mul i32 %tmp222.i, %tmp29
54 %i44 = add i32 %tmp158.i, %i43
55 %conv228.i = zext i32 %i44 to i64
56 %tmp22.sum656.i = add i64 %conv228.i, %conv21.i
57 %arrayidx229.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum656.i
58 %tmp230.i = load <2 x double> addrspace(1)* %arrayidx229.i, align 16
59 %cmp432.i = icmp ult i32 %tmp156.i, %tmp1
60
61 ; %shl.i should not be sinked below the compare.
62 ; CHECK: cmpl
63 ; CHECK-NOT: shlq
64
65 %cond.i = select i1 %cmp432.i, <2 x double> %tmp162.i, <2 x double> zeroinitializer
66 store <2 x double> %cond.i, <2 x double>* %ptr4438.i, align 16
67 %cond448.i = select i1 %cmp432.i, <2 x double> %tmp230.i, <2 x double> zeroinitializer
68 store <2 x double> %cond448.i, <2 x double>* %arrayidx4506.i, align 16
69 ret void
70 }
71
72
73
55 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
66 target triple = "x86_64-apple-darwin10.0.0"
77
8 ; FIXME: This test could generate this code:
9 ;
10 ; ## BB#0: ## %entry
11 ; testq %rdi, %rdi
12 ; jns LBB0_2
13 ; ## BB#1:
14 ; movq %rdi, %rax
15 ; shrq %rax
16 ; andq $1, %rdi
17 ; orq %rax, %rdi
18 ; cvtsi2ssq %rdi, %xmm0
19 ; addss %xmm0, %xmm0
20 ; ret
21 ; LBB0_2: ## %entry
22 ; cvtsi2ssq %rdi, %xmm0
23 ; ret
24 ;
25 ; The blocks come from lowering:
26 ;
27 ; %vreg7 = CMOV_FR32 %vreg6, %vreg5, 15, %EFLAGS; FR32:%vreg7,%vreg6,%vreg5
28 ;
29 ; If the instruction had an EFLAGS flag, it wouldn't need to mark EFLAGS
30 ; as live-in on the new blocks, and machine sinking would be able to sink
31 ; everything below the test.
32
33 ; CHECK: shrq
34 ; CHECK: andq
35 ; CHECK-NEXT: orq
836 ; CHECK: testq %rdi, %rdi
937 ; CHECK-NEXT: jns LBB0_2
10 ; CHECK: shrq
11 ; CHECK-NEXT: andq
12 ; CHECK-NEXT: orq
13 ; CHECK-NEXT: cvtsi2ss
38 ; CHECK: cvtsi2ss
1439 ; CHECK: LBB0_2
1540 ; CHECK-NEXT: cvtsi2ss
1641 define float @test(i64 %a) {