llvm.org GIT mirror llvm / ac6a87b
Fix several accidental DOS line endings in source files Summary: There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings. There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those. Reviewers: joerg, aaron.ballman Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15848 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256707 91177308-0d34-0410-b5e6-96231b3b80d8 Dimitry Andric 3 years ago
46 changed file(s) with 1689 addition(s) and 1688 deletion(s). Raw diff Collapse all Expand all
None ===============================
1 MCJIT Design and Implementation
2 ===============================
3
4 Introduction
5 ============
6
7 This document describes the internal workings of the MCJIT execution
8 engine and the RuntimeDyld component. It is intended as a high level
9 overview of the implementation, showing the flow and interactions of
10 objects throughout the code generation and dynamic loading process.
11
12 Engine Creation
13 ===============
14
15 In most cases, an EngineBuilder object is used to create an instance of
16 the MCJIT execution engine. The EngineBuilder takes an llvm::Module
17 object as an argument to its constructor. The client may then set various
18 options that we control the later be passed along to the MCJIT engine,
19 including the selection of MCJIT as the engine type to be created.
20 Of particular interest is the EngineBuilder::setMCJITMemoryManager
21 function. If the client does not explicitly create a memory manager at
22 this time, a default memory manager (specifically SectionMemoryManager)
23 will be created when the MCJIT engine is instantiated.
24
25 Once the options have been set, a client calls EngineBuilder::create to
26 create an instance of the MCJIT engine. If the client does not use the
27 form of this function that takes a TargetMachine as a parameter, a new
28 TargetMachine will be created based on the target triple associated with
29 the Module that was used to create the EngineBuilder.
30
31 .. image:: MCJIT-engine-builder.png
32
33 EngineBuilder::create will call the static MCJIT::createJIT function,
34 passing in its pointers to the module, memory manager and target machine
35 objects, all of which will subsequently be owned by the MCJIT object.
36
37 The MCJIT class has a member variable, Dyld, which contains an instance of
38 the RuntimeDyld wrapper class. This member will be used for
39 communications between MCJIT and the actual RuntimeDyldImpl object that
40 gets created when an object is loaded.
41
42 .. image:: MCJIT-creation.png
43
44 Upon creation, MCJIT holds a pointer to the Module object that it received
45 from EngineBuilder but it does not immediately generate code for this
46 module. Code generation is deferred until either the
47 MCJIT::finalizeObject method is called explicitly or a function such as
48 MCJIT::getPointerToFunction is called which requires the code to have been
49 generated.
50
51 Code Generation
52 ===============
53
54 When code generation is triggered, as described above, MCJIT will first
55 attempt to retrieve an object image from its ObjectCache member, if one
56 has been set. If a cached object image cannot be retrieved, MCJIT will
57 call its emitObject method. MCJIT::emitObject uses a local PassManager
58 instance and creates a new ObjectBufferStream instance, both of which it
59 passes to TargetMachine::addPassesToEmitMC before calling PassManager::run
60 on the Module with which it was created.
61
62 .. image:: MCJIT-load.png
63
64 The PassManager::run call causes the MC code generation mechanisms to emit
65 a complete relocatable binary object image (either in either ELF or MachO
66 format, depending on the target) into the ObjectBufferStream object, which
67 is flushed to complete the process. If an ObjectCache is being used, the
68 image will be passed to the ObjectCache here.
69
70 At this point, the ObjectBufferStream contains the raw object image.
71 Before the code can be executed, the code and data sections from this
72 image must be loaded into suitable memory, relocations must be applied and
73 memory permission and code cache invalidation (if required) must be completed.
74
75 Object Loading
76 ==============
77
78 Once an object image has been obtained, either through code generation or
79 having been retrieved from an ObjectCache, it is passed to RuntimeDyld to
80 be loaded. The RuntimeDyld wrapper class examines the object to determine
81 its file format and creates an instance of either RuntimeDyldELF or
82 RuntimeDyldMachO (both of which derive from the RuntimeDyldImpl base
83 class) and calls the RuntimeDyldImpl::loadObject method to perform that
84 actual loading.
85
86 .. image:: MCJIT-dyld-load.png
87
88 RuntimeDyldImpl::loadObject begins by creating an ObjectImage instance
89 from the ObjectBuffer it received. ObjectImage, which wraps the
90 ObjectFile class, is a helper class which parses the binary object image
91 and provides access to the information contained in the format-specific
92 headers, including section, symbol and relocation information.
93
94 RuntimeDyldImpl::loadObject then iterates through the symbols in the
95 image. Information about common symbols is collected for later use. For
96 each function or data symbol, the associated section is loaded into memory
97 and the symbol is stored in a symbol table map data structure. When the
98 iteration is complete, a section is emitted for the common symbols.
99
100 Next, RuntimeDyldImpl::loadObject iterates through the sections in the
101 object image and for each section iterates through the relocations for
102 that sections. For each relocation, it calls the format-specific
103 processRelocationRef method, which will examine the relocation and store
104 it in one of two data structures, a section-based relocation list map and
105 an external symbol relocation map.
106
107 .. image:: MCJIT-load-object.png
108
109 When RuntimeDyldImpl::loadObject returns, all of the code and data
110 sections for the object will have been loaded into memory allocated by the
111 memory manager and relocation information will have been prepared, but the
112 relocations have not yet been applied and the generated code is still not
113 ready to be executed.
114
115 [Currently (as of August 2013) the MCJIT engine will immediately apply
116 relocations when loadObject completes. However, this shouldn't be
117 happening. Because the code may have been generated for a remote target,
118 the client should be given a chance to re-map the section addresses before
119 relocations are applied. It is possible to apply relocations multiple
120 times, but in the case where addresses are to be re-mapped, this first
121 application is wasted effort.]
122
123 Address Remapping
124 =================
125
126 At any time after initial code has been generated and before
127 finalizeObject is called, the client can remap the address of sections in
128 the object. Typically this is done because the code was generated for an
129 external process and is being mapped into that process' address space.
130 The client remaps the section address by calling MCJIT::mapSectionAddress.
131 This should happen before the section memory is copied to its new
132 location.
133
134 When MCJIT::mapSectionAddress is called, MCJIT passes the call on to
135 RuntimeDyldImpl (via its Dyld member). RuntimeDyldImpl stores the new
136 address in an internal data structure but does not update the code at this
137 time, since other sections are likely to change.
138
139 When the client is finished remapping section addresses, it will call
140 MCJIT::finalizeObject to complete the remapping process.
141
142 Final Preparations
143 ==================
144
145 When MCJIT::finalizeObject is called, MCJIT calls
146 RuntimeDyld::resolveRelocations. This function will attempt to locate any
147 external symbols and then apply all relocations for the object.
148
149 External symbols are resolved by calling the memory manager's
150 getPointerToNamedFunction method. The memory manager will return the
151 address of the requested symbol in the target address space. (Note, this
152 may not be a valid pointer in the host process.) RuntimeDyld will then
153 iterate through the list of relocations it has stored which are associated
154 with this symbol and invoke the resolveRelocation method which, through an
155 format-specific implementation, will apply the relocation to the loaded
156 section memory.
157
158 Next, RuntimeDyld::resolveRelocations iterates through the list of
159 sections and for each section iterates through a list of relocations that
160 have been saved which reference that symbol and call resolveRelocation for
161 each entry in this list. The relocation list here is a list of
162 relocations for which the symbol associated with the relocation is located
163 in the section associated with the list. Each of these locations will
164 have a target location at which the relocation will be applied that is
165 likely located in a different section.
166
167 .. image:: MCJIT-resolve-relocations.png
168
169 Once relocations have been applied as described above, MCJIT calls
170 RuntimeDyld::getEHFrameSection, and if a non-zero result is returned
171 passes the section data to the memory manager's registerEHFrames method.
172 This allows the memory manager to call any desired target-specific
173 functions, such as registering the EH frame information with a debugger.
174
175 Finally, MCJIT calls the memory manager's finalizeMemory method. In this
176 method, the memory manager will invalidate the target code cache, if
177 necessary, and apply final permissions to the memory pages it has
178 allocated for code and data memory.
179
0 ===============================
1 MCJIT Design and Implementation
2 ===============================
3
4 Introduction
5 ============
6
7 This document describes the internal workings of the MCJIT execution
8 engine and the RuntimeDyld component. It is intended as a high level
9 overview of the implementation, showing the flow and interactions of
10 objects throughout the code generation and dynamic loading process.
11
12 Engine Creation
13 ===============
14
15 In most cases, an EngineBuilder object is used to create an instance of
16 the MCJIT execution engine. The EngineBuilder takes an llvm::Module
17 object as an argument to its constructor. The client may then set various
18 options that we control the later be passed along to the MCJIT engine,
19 including the selection of MCJIT as the engine type to be created.
20 Of particular interest is the EngineBuilder::setMCJITMemoryManager
21 function. If the client does not explicitly create a memory manager at
22 this time, a default memory manager (specifically SectionMemoryManager)
23 will be created when the MCJIT engine is instantiated.
24
25 Once the options have been set, a client calls EngineBuilder::create to
26 create an instance of the MCJIT engine. If the client does not use the
27 form of this function that takes a TargetMachine as a parameter, a new
28 TargetMachine will be created based on the target triple associated with
29 the Module that was used to create the EngineBuilder.
30
31 .. image:: MCJIT-engine-builder.png
32
33 EngineBuilder::create will call the static MCJIT::createJIT function,
34 passing in its pointers to the module, memory manager and target machine
35 objects, all of which will subsequently be owned by the MCJIT object.
36
37 The MCJIT class has a member variable, Dyld, which contains an instance of
38 the RuntimeDyld wrapper class. This member will be used for
39 communications between MCJIT and the actual RuntimeDyldImpl object that
40 gets created when an object is loaded.
41
42 .. image:: MCJIT-creation.png
43
44 Upon creation, MCJIT holds a pointer to the Module object that it received
45 from EngineBuilder but it does not immediately generate code for this
46 module. Code generation is deferred until either the
47 MCJIT::finalizeObject method is called explicitly or a function such as
48 MCJIT::getPointerToFunction is called which requires the code to have been
49 generated.
50
51 Code Generation
52 ===============
53
54 When code generation is triggered, as described above, MCJIT will first
55 attempt to retrieve an object image from its ObjectCache member, if one
56 has been set. If a cached object image cannot be retrieved, MCJIT will
57 call its emitObject method. MCJIT::emitObject uses a local PassManager
58 instance and creates a new ObjectBufferStream instance, both of which it
59 passes to TargetMachine::addPassesToEmitMC before calling PassManager::run
60 on the Module with which it was created.
61
62 .. image:: MCJIT-load.png
63
64 The PassManager::run call causes the MC code generation mechanisms to emit
65 a complete relocatable binary object image (either in either ELF or MachO
66 format, depending on the target) into the ObjectBufferStream object, which
67 is flushed to complete the process. If an ObjectCache is being used, the
68 image will be passed to the ObjectCache here.
69
70 At this point, the ObjectBufferStream contains the raw object image.
71 Before the code can be executed, the code and data sections from this
72 image must be loaded into suitable memory, relocations must be applied and
73 memory permission and code cache invalidation (if required) must be completed.
74
75 Object Loading
76 ==============
77
78 Once an object image has been obtained, either through code generation or
79 having been retrieved from an ObjectCache, it is passed to RuntimeDyld to
80 be loaded. The RuntimeDyld wrapper class examines the object to determine
81 its file format and creates an instance of either RuntimeDyldELF or
82 RuntimeDyldMachO (both of which derive from the RuntimeDyldImpl base
83 class) and calls the RuntimeDyldImpl::loadObject method to perform that
84 actual loading.
85
86 .. image:: MCJIT-dyld-load.png
87
88 RuntimeDyldImpl::loadObject begins by creating an ObjectImage instance
89 from the ObjectBuffer it received. ObjectImage, which wraps the
90 ObjectFile class, is a helper class which parses the binary object image
91 and provides access to the information contained in the format-specific
92 headers, including section, symbol and relocation information.
93
94 RuntimeDyldImpl::loadObject then iterates through the symbols in the
95 image. Information about common symbols is collected for later use. For
96 each function or data symbol, the associated section is loaded into memory
97 and the symbol is stored in a symbol table map data structure. When the
98 iteration is complete, a section is emitted for the common symbols.
99
100 Next, RuntimeDyldImpl::loadObject iterates through the sections in the
101 object image and for each section iterates through the relocations for
102 that sections. For each relocation, it calls the format-specific
103 processRelocationRef method, which will examine the relocation and store
104 it in one of two data structures, a section-based relocation list map and
105 an external symbol relocation map.
106
107 .. image:: MCJIT-load-object.png
108
109 When RuntimeDyldImpl::loadObject returns, all of the code and data
110 sections for the object will have been loaded into memory allocated by the
111 memory manager and relocation information will have been prepared, but the
112 relocations have not yet been applied and the generated code is still not
113 ready to be executed.
114
115 [Currently (as of August 2013) the MCJIT engine will immediately apply
116 relocations when loadObject completes. However, this shouldn't be
117 happening. Because the code may have been generated for a remote target,
118 the client should be given a chance to re-map the section addresses before
119 relocations are applied. It is possible to apply relocations multiple
120 times, but in the case where addresses are to be re-mapped, this first
121 application is wasted effort.]
122
123 Address Remapping
124 =================
125
126 At any time after initial code has been generated and before
127 finalizeObject is called, the client can remap the address of sections in
128 the object. Typically this is done because the code was generated for an
129 external process and is being mapped into that process' address space.
130 The client remaps the section address by calling MCJIT::mapSectionAddress.
131 This should happen before the section memory is copied to its new
132 location.
133
134 When MCJIT::mapSectionAddress is called, MCJIT passes the call on to
135 RuntimeDyldImpl (via its Dyld member). RuntimeDyldImpl stores the new
136 address in an internal data structure but does not update the code at this
137 time, since other sections are likely to change.
138
139 When the client is finished remapping section addresses, it will call
140 MCJIT::finalizeObject to complete the remapping process.
141
142 Final Preparations
143 ==================
144
145 When MCJIT::finalizeObject is called, MCJIT calls
146 RuntimeDyld::resolveRelocations. This function will attempt to locate any
147 external symbols and then apply all relocations for the object.
148
149 External symbols are resolved by calling the memory manager's
150 getPointerToNamedFunction method. The memory manager will return the
151 address of the requested symbol in the target address space. (Note, this
152 may not be a valid pointer in the host process.) RuntimeDyld will then
153 iterate through the list of relocations it has stored which are associated
154 with this symbol and invoke the resolveRelocation method which, through an
155 format-specific implementation, will apply the relocation to the loaded
156 section memory.
157
158 Next, RuntimeDyld::resolveRelocations iterates through the list of
159 sections and for each section iterates through a list of relocations that
160 have been saved which reference that symbol and call resolveRelocation for
161 each entry in this list. The relocation list here is a list of
162 relocations for which the symbol associated with the relocation is located
163 in the section associated with the list. Each of these locations will
164 have a target location at which the relocation will be applied that is
165 likely located in a different section.
166
167 .. image:: MCJIT-resolve-relocations.png
168
169 Once relocations have been applied as described above, MCJIT calls
170 RuntimeDyld::getEHFrameSection, and if a non-zero result is returned
171 passes the section data to the memory manager's registerEHFrames method.
172 This allows the memory manager to call any desired target-specific
173 functions, such as registering the EH frame information with a debugger.
174
175 Finally, MCJIT calls the memory manager's finalizeMemory method. In this
176 method, the memory manager will invalidate the target code cache, if
177 necessary, and apply final permissions to the memory pages it has
178 allocated for code and data memory.
179
None //===-- DWARFDebugMacro.h ---------------------------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
10 #define LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
11
12 #include "llvm/ADT/SmallVector.h"
13 #include "llvm/ADT/StringRef.h"
14 #include "llvm/Support/DataExtractor.h"
15 #include "llvm/Support/Dwarf.h"
16
17 namespace llvm {
18
19 class raw_ostream;
20
21 class DWARFDebugMacro {
22 /// A single macro entry within a macro list.
23 struct Entry {
24 /// The type of the macro entry.
25 uint32_t Type;
26 union {
27 /// The source line where the macro is defined.
28 uint64_t Line;
29 /// Vendor extension constant value.
30 uint64_t ExtConstant;
31 };
32
33 union {
34 /// The string (name, value) of the macro entry.
35 const char *MacroStr;
36 // An unsigned integer indicating the identity of the source file.
37 uint64_t File;
38 /// Vendor extension string.
39 const char *ExtStr;
40 };
41 };
42
43 typedef SmallVector MacroList;
44
45 /// A list of all the macro entries in the debug_macinfo section.
46 MacroList Macros;
47
48 public:
49 DWARFDebugMacro() {}
50 /// Print the macro list found within the debug_macinfo section.
51 void dump(raw_ostream &OS) const;
52 /// Parse the debug_macinfo section accessible via the 'data' parameter.
53 void parse(DataExtractor data);
54 };
55
56 }
57
58 #endif
0 //===-- DWARFDebugMacro.h ---------------------------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
10 #define LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
11
12 #include "llvm/ADT/SmallVector.h"
13 #include "llvm/ADT/StringRef.h"
14 #include "llvm/Support/DataExtractor.h"
15 #include "llvm/Support/Dwarf.h"
16
17 namespace llvm {
18
19 class raw_ostream;
20
21 class DWARFDebugMacro {
22 /// A single macro entry within a macro list.
23 struct Entry {
24 /// The type of the macro entry.
25 uint32_t Type;
26 union {
27 /// The source line where the macro is defined.
28 uint64_t Line;
29 /// Vendor extension constant value.
30 uint64_t ExtConstant;
31 };
32
33 union {
34 /// The string (name, value) of the macro entry.
35 const char *MacroStr;
36 // An unsigned integer indicating the identity of the source file.
37 uint64_t File;
38 /// Vendor extension string.
39 const char *ExtStr;
40 };
41 };
42
43 typedef SmallVector MacroList;
44
45 /// A list of all the macro entries in the debug_macinfo section.
46 MacroList Macros;
47
48 public:
49 DWARFDebugMacro() {}
50 /// Print the macro list found within the debug_macinfo section.
51 void dump(raw_ostream &OS) const;
52 /// Parse the debug_macinfo section accessible via the 'data' parameter.
53 void parse(DataExtractor data);
54 };
55
56 }
57
58 #endif
None ##===- lib/DebugInfo/CodeView/Makefile ---------------------*- Makefile -*-===##
1 #
2 # The LLVM Compiler Infrastructure
3 #
4 # This file is distributed under the University of Illinois Open Source
5 # License. See LICENSE.TXT for details.
6 #
7 ##===----------------------------------------------------------------------===##
8
9 LEVEL = ../../..
10 LIBRARYNAME = LLVMDebugInfoCodeView
11 BUILD_ARCHIVE := 1
12
13 include $(LEVEL)/Makefile.common
0 ##===- lib/DebugInfo/CodeView/Makefile ---------------------*- Makefile -*-===##
1 #
2 # The LLVM Compiler Infrastructure
3 #
4 # This file is distributed under the University of Illinois Open Source
5 # License. See LICENSE.TXT for details.
6 #
7 ##===----------------------------------------------------------------------===##
8
9 LEVEL = ../../..
10 LIBRARYNAME = LLVMDebugInfoCodeView
11 BUILD_ARCHIVE := 1
12
13 include $(LEVEL)/Makefile.common
None //===-- DWARFDebugMacro.cpp -----------------------------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "SyntaxHighlighting.h"
10 #include "llvm/DebugInfo/DWARF/DWARFDebugMacro.h"
11 #include "llvm/Support/Compiler.h"
12 #include "llvm/Support/Dwarf.h"
13 #include "llvm/Support/Format.h"
14 #include "llvm/Support/raw_ostream.h"
15
16 using namespace llvm;
17 using namespace dwarf;
18 using namespace syntax;
19
20 void DWARFDebugMacro::dump(raw_ostream &OS) const {
21 unsigned IndLevel = 0;
22 for (const Entry &E : Macros) {
23 // There should not be DW_MACINFO_end_file when IndLevel is Zero. However,
24 // this check handles the case of corrupted ".debug_macinfo" section.
25 if (IndLevel > 0)
26 IndLevel -= (E.Type == DW_MACINFO_end_file);
27 // Print indentation.
28 for (unsigned I = 0; I < IndLevel; I++)
29 OS << " ";
30 IndLevel += (E.Type == DW_MACINFO_start_file);
31
32 WithColor(OS, syntax::Macro).get() << MacinfoString(E.Type);
33 switch (E.Type) {
34 default:
35 // Got a corrupted ".debug_macinfo" section (invalid macinfo type).
36 break;
37 case DW_MACINFO_define:
38 case DW_MACINFO_undef:
39 OS << " - lineno: " << E.Line;
40 OS << " macro: " << E.MacroStr;
41 break;
42 case DW_MACINFO_start_file:
43 OS << " - lineno: " << E.Line;
44 OS << " filenum: " << E.File;
45 break;
46 case DW_MACINFO_end_file:
47 break;
48 case DW_MACINFO_vendor_ext:
49 OS << " - constant: " << E.ExtConstant;
50 OS << " string: " << E.ExtStr;
51 break;
52 }
53 OS << "\n";
54 }
55 }
56
57 void DWARFDebugMacro::parse(DataExtractor data) {
58 uint32_t Offset = 0;
59 while (data.isValidOffset(Offset)) {
60 // A macro list entry consists of:
61 Entry E;
62 // 1. Macinfo type
63 E.Type = data.getULEB128(&Offset);
64
65 if (E.Type == 0) {
66 // Reached end of ".debug_macinfo" section.
67 return;
68 }
69
70 switch (E.Type) {
71 default:
72 // Got a corrupted ".debug_macinfo" section (invalid macinfo type).
73 // Push the corrupted entry to the list and halt parsing.
74 E.Type = DW_MACINFO_invalid;
75 Macros.push_back(E);
76 return;
77 case DW_MACINFO_define:
78 case DW_MACINFO_undef:
79 // 2. Source line
80 E.Line = data.getULEB128(&Offset);
81 // 3. Macro string
82 E.MacroStr = data.getCStr(&Offset);
83 break;
84 case DW_MACINFO_start_file:
85 // 2. Source line
86 E.Line = data.getULEB128(&Offset);
87 // 3. Source file id
88 E.File = data.getULEB128(&Offset);
89 break;
90 case DW_MACINFO_end_file:
91 break;
92 case DW_MACINFO_vendor_ext:
93 // 2. Vendor extension constant
94 E.ExtConstant = data.getULEB128(&Offset);
95 // 3. Vendor extension string
96 E.ExtStr = data.getCStr(&Offset);
97 break;
98 }
99
100 Macros.push_back(E);
101 }
102 }
0 //===-- DWARFDebugMacro.cpp -----------------------------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "SyntaxHighlighting.h"
10 #include "llvm/DebugInfo/DWARF/DWARFDebugMacro.h"
11 #include "llvm/Support/Compiler.h"
12 #include "llvm/Support/Dwarf.h"
13 #include "llvm/Support/Format.h"
14 #include "llvm/Support/raw_ostream.h"
15
16 using namespace llvm;
17 using namespace dwarf;
18 using namespace syntax;
19
20 void DWARFDebugMacro::dump(raw_ostream &OS) const {
21 unsigned IndLevel = 0;
22 for (const Entry &E : Macros) {
23 // There should not be DW_MACINFO_end_file when IndLevel is Zero. However,
24 // this check handles the case of corrupted ".debug_macinfo" section.
25 if (IndLevel > 0)
26 IndLevel -= (E.Type == DW_MACINFO_end_file);
27 // Print indentation.
28 for (unsigned I = 0; I < IndLevel; I++)
29 OS << " ";
30 IndLevel += (E.Type == DW_MACINFO_start_file);
31
32 WithColor(OS, syntax::Macro).get() << MacinfoString(E.Type);
33 switch (E.Type) {
34 default:
35 // Got a corrupted ".debug_macinfo" section (invalid macinfo type).
36 break;
37 case DW_MACINFO_define:
38 case DW_MACINFO_undef:
39 OS << " - lineno: " << E.Line;
40 OS << " macro: " << E.MacroStr;
41 break;
42 case DW_MACINFO_start_file:
43 OS << " - lineno: " << E.Line;
44 OS << " filenum: " << E.File;
45 break;
46 case DW_MACINFO_end_file:
47 break;
48 case DW_MACINFO_vendor_ext:
49 OS << " - constant: " << E.ExtConstant;
50 OS << " string: " << E.ExtStr;
51 break;
52 }
53 OS << "\n";
54 }
55 }
56
57 void DWARFDebugMacro::parse(DataExtractor data) {
58 uint32_t Offset = 0;
59 while (data.isValidOffset(Offset)) {
60 // A macro list entry consists of:
61 Entry E;
62 // 1. Macinfo type
63 E.Type = data.getULEB128(&Offset);
64
65 if (E.Type == 0) {
66 // Reached end of ".debug_macinfo" section.
67 return;
68 }
69
70 switch (E.Type) {
71 default:
72 // Got a corrupted ".debug_macinfo" section (invalid macinfo type).
73 // Push the corrupted entry to the list and halt parsing.
74 E.Type = DW_MACINFO_invalid;
75 Macros.push_back(E);
76 return;
77 case DW_MACINFO_define:
78 case DW_MACINFO_undef:
79 // 2. Source line
80 E.Line = data.getULEB128(&Offset);
81 // 3. Macro string
82 E.MacroStr = data.getCStr(&Offset);
83 break;
84 case DW_MACINFO_start_file:
85 // 2. Source line
86 E.Line = data.getULEB128(&Offset);
87 // 3. Source file id
88 E.File = data.getULEB128(&Offset);
89 break;
90 case DW_MACINFO_end_file:
91 break;
92 case DW_MACINFO_vendor_ext:
93 // 2. Vendor extension constant
94 E.ExtConstant = data.getULEB128(&Offset);
95 // 3. Vendor extension string
96 E.ExtStr = data.getCStr(&Offset);
97 break;
98 }
99
100 Macros.push_back(E);
101 }
102 }
10971097 RetRegs.push_back(VA.getLocReg());
10981098 }
10991099
1100 // All x86 ABIs require that for returning structs by value we copy
1101 // the sret argument into %rax/%eax (depending on ABI) for the return.
1102 // We saved the argument into a virtual register in the entry block,
1100 // All x86 ABIs require that for returning structs by value we copy
1101 // the sret argument into %rax/%eax (depending on ABI) for the return.
1102 // We saved the argument into a virtual register in the entry block,
11031103 // so now we copy the value out and into %rax/%eax.
11041104 if (F.hasStructRetAttr()) {
11051105 unsigned Reg = X86MFInfo->getSRetReturnReg();
None ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
1
2 ;CHECK: @func30
3 ;CHECK: movi.4h v1, #0x1
4 ;CHECK: and.8b v0, v0, v1
5 ;CHECK: ushll.4s v0, v0, #0
6 ;CHECK: str q0, [x0]
7 ;CHECK: ret
8
9 %T0_30 = type <4 x i1>
10 %T1_30 = type <4 x i32>
11 define void @func30(%T0_30 %v0, %T1_30* %p1) {
12 %r = zext %T0_30 %v0 to %T1_30
13 store %T1_30 %r, %T1_30* %p1
14 ret void
15 }
16
17 ; Extend from v1i1 was crashing things (PR20791). Make sure we do something
18 ; sensible instead.
19 define <1 x i32> @autogen_SD7918() {
20 ; CHECK-LABEL: autogen_SD7918
21 ; CHECK: movi d0, #0000000000000000
22 ; CHECK-NEXT: ret
23 %I29 = insertelement <1 x i1> zeroinitializer, i1 false, i32 0
24 %ZE = zext <1 x i1> %I29 to <1 x i32>
25 ret <1 x i32> %ZE
26 }
0 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
1
2 ;CHECK: @func30
3 ;CHECK: movi.4h v1, #0x1
4 ;CHECK: and.8b v0, v0, v1
5 ;CHECK: ushll.4s v0, v0, #0
6 ;CHECK: str q0, [x0]
7 ;CHECK: ret
8
9 %T0_30 = type <4 x i1>
10 %T1_30 = type <4 x i32>
11 define void @func30(%T0_30 %v0, %T1_30* %p1) {
12 %r = zext %T0_30 %v0 to %T1_30
13 store %T1_30 %r, %T1_30* %p1
14 ret void
15 }
16
17 ; Extend from v1i1 was crashing things (PR20791). Make sure we do something
18 ; sensible instead.
19 define <1 x i32> @autogen_SD7918() {
20 ; CHECK-LABEL: autogen_SD7918
21 ; CHECK: movi d0, #0000000000000000
22 ; CHECK-NEXT: ret
23 %I29 = insertelement <1 x i1> zeroinitializer, i1 false, i32 0
24 %ZE = zext <1 x i1> %I29 to <1 x i32>
25 ret <1 x i32> %ZE
26 }
None ; This test ensures the @llvm.debugtrap() call is not removed when generating
1 ; the 'pop' instruction to restore the callee saved registers on ARM.
2
3 ; RUN: llc < %s -mtriple=armv7 -O0 -filetype=asm | FileCheck %s
4
5 declare void @llvm.debugtrap() nounwind
6 declare void @foo() nounwind
7
8 define void @test() nounwind {
9 entry:
10 ; CHECK: bl foo
11 ; CHECK-NEXT: pop
12 ; CHECK-NEXT: trap
13 call void @foo()
14 call void @llvm.debugtrap()
15 ret void
16 }
0 ; This test ensures the @llvm.debugtrap() call is not removed when generating
1 ; the 'pop' instruction to restore the callee saved registers on ARM.
2
3 ; RUN: llc < %s -mtriple=armv7 -O0 -filetype=asm | FileCheck %s
4
5 declare void @llvm.debugtrap() nounwind
6 declare void @foo() nounwind
7
8 define void @test() nounwind {
9 entry:
10 ; CHECK: bl foo
11 ; CHECK-NEXT: pop
12 ; CHECK-NEXT: trap
13 call void @foo()
14 call void @llvm.debugtrap()
15 ret void
16 }
11
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
33 target triple = "x86_64-apple-macosx10.6.6"
4
5 ; Test that the order of operands is correct
6 ; CHECK: select_func
7 ; CHECK: pblendvb {{LCPI0_[0-9]*}}(%rip), %xmm1
8 ; CHECK: ret
9
10 define void @select_func(<8 x i16> %in) {
4
5 ; Test that the order of operands is correct
6 ; CHECK: select_func
7 ; CHECK: pblendvb {{LCPI0_[0-9]*}}(%rip), %xmm1
8 ; CHECK: ret
9
10 define void @select_func(<8 x i16> %in) {
1111 entry:
1212 %c.lobit.i.i.i = ashr <8 x i16> %in,
1313 %and.i56.i.i.i = and <8 x i16> %c.lobit.i.i.i,
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s
1
2 define <16 x i32> @test_x86_vbroadcastmw_512(i16 %a0) {
3 ; CHECK: test_x86_vbroadcastmw_512
4 ; CHECK: vpbroadcastmw2d %k0, %zmm0
5 %res = call <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16 %a0) ;
6 ret <16 x i32> %res
7 }
8 declare <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16)
9
10 define <8 x i64> @test_x86_broadcastmb_512(i8 %a0) {
11 ; CHECK: test_x86_broadcastmb_512
12 ; CHECK: vpbroadcastmb2q %k0, %zmm0
13 %res = call <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8 %a0) ;
14 ret <8 x i64> %res
15 }
16 declare <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8)
17
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s
1
2 define <16 x i32> @test_x86_vbroadcastmw_512(i16 %a0) {
3 ; CHECK: test_x86_vbroadcastmw_512
4 ; CHECK: vpbroadcastmw2d %k0, %zmm0
5 %res = call <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16 %a0) ;
6 ret <16 x i32> %res
7 }
8 declare <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16)
9
10 define <8 x i64> @test_x86_broadcastmb_512(i8 %a0) {
11 ; CHECK: test_x86_broadcastmb_512
12 ; CHECK: vpbroadcastmb2q %k0, %zmm0
13 %res = call <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8 %a0) ;
14 ret <8 x i64> %res
15 }
16 declare <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8)
17
None ; RUN: llc < %s -march=x86 -mcpu=pentium -mtriple=x86-linux-gnu -float-abi=soft | FileCheck %s
1
2 define i1 @test1(double %d) #0 {
3 entry:
4 %cmp = fcmp ule double %d, 0.000000e+00
5 ret i1 %cmp
6 }
7 ; CHECK-LABEL: test1:
8 ; CHECK: calll __gtdf2
9 ; CHECK: setle
10 ; CHECK: retl
11
12 define i1 @test2(double %d) #0 {
13 entry:
14 %cmp = fcmp ult double %d, 0.000000e+00
15 ret i1 %cmp
16 }
17 ; CHECK-LABEL: test2:
18 ; CHECK: calll __gedf2
19 ; CHECK: sets
20 ; CHECK: retl
21
22 define i1 @test3(double %d) #0 {
23 entry:
24 %cmp = fcmp ugt double %d, 0.000000e+00
25 ret i1 %cmp
26 }
27 ; CHECK-LABEL: test3:
28 ; CHECK: calll __ledf2
29 ; CHECK: setg
30 ; CHECK: retl
31
32 define i1 @test4(double %d) #0 {
33 entry:
34 %cmp = fcmp uge double %d, 0.000000e+00
35 ret i1 %cmp
36 }
37 ; CHECK-LABEL: test4:
38 ; CHECK: calll __ltdf2
39 ; CHECK: setns
40 ; CHECK: retl
41
42 define i1 @test5(double %d) #0 {
43 entry:
44 %cmp = fcmp ole double %d, 0.000000e+00
45 ret i1 %cmp
46 }
47 ; CHECK-LABEL: test5:
48 ; CHECK: calll __ledf2
49 ; CHECK: setle
50 ; CHECK: retl
51
52 define i1 @test6(double %d) #0 {
53 entry:
54 %cmp = fcmp olt double %d, 0.000000e+00
55 ret i1 %cmp
56 }
57 ; CHECK-LABEL: test6:
58 ; CHECK: calll __ltdf2
59 ; CHECK: sets
60 ; CHECK: retl
61
62 define i1 @test7(double %d) #0 {
63 entry:
64 %cmp = fcmp ogt double %d, 0.000000e+00
65 ret i1 %cmp
66 }
67 ; CHECK-LABEL: test7:
68 ; CHECK: calll __gtdf2
69 ; CHECK: setg
70 ; CHECK: retl
71
72 define i1 @test8(double %d) #0 {
73 entry:
74 %cmp = fcmp oge double %d, 0.000000e+00
75 ret i1 %cmp
76 }
77 ; CHECK-LABEL: test8:
78 ; CHECK: calll __gedf2
79 ; CHECK: setns
80 ; CHECK: retl
81
82 define i1 @test9(double %d) #0 {
83 entry:
84 %cmp = fcmp oeq double %d, 0.000000e+00
85 ret i1 %cmp
86 }
87 ; CHECK-LABEL: test9:
88 ; CHECK: calll __eqdf2
89 ; CHECK: sete
90 ; CHECK: retl
91
92 define i1 @test10(double %d) #0 {
93 entry:
94 %cmp = fcmp ueq double %d, 0.000000e+00
95 ret i1 %cmp
96 }
97 ; CHECK-LABEL: test10:
98 ; CHECK: calll __eqdf2
99 ; CHECK: sete
100 ; CHECK: calll __unorddf2
101 ; CHECK: setne
102 ; CHECK: retl
103
104 define i1 @test11(double %d) #0 {
105 entry:
106 %cmp = fcmp one double %d, 0.000000e+00
107 ret i1 %cmp
108 }
109 ; CHECK-LABEL: test11:
110 ; CHECK: calll __gtdf2
111 ; CHECK: setg
112 ; CHECK: calll __ltdf2
113 ; CHECK: sets
114 ; CHECK: retl
115
116 define i1 @test12(double %d) #0 {
117 entry:
118 %cmp = fcmp une double %d, 0.000000e+00
119 ret i1 %cmp
120 }
121 ; CHECK-LABEL: test12:
122 ; CHECK: calll __nedf2
123 ; CHECK: setne
124 ; CHECK: retl
125
126 attributes #0 = { "use-soft-float"="true" }
0 ; RUN: llc < %s -march=x86 -mcpu=pentium -mtriple=x86-linux-gnu -float-abi=soft | FileCheck %s
1
2 define i1 @test1(double %d) #0 {
3 entry:
4 %cmp = fcmp ule double %d, 0.000000e+00
5 ret i1 %cmp
6 }
7 ; CHECK-LABEL: test1:
8 ; CHECK: calll __gtdf2
9 ; CHECK: setle
10 ; CHECK: retl
11
12 define i1 @test2(double %d) #0 {
13 entry:
14 %cmp = fcmp ult double %d, 0.000000e+00
15 ret i1 %cmp
16 }
17 ; CHECK-LABEL: test2:
18 ; CHECK: calll __gedf2
19 ; CHECK: sets
20 ; CHECK: retl
21
22 define i1 @test3(double %d) #0 {
23 entry:
24 %cmp = fcmp ugt double %d, 0.000000e+00
25 ret i1 %cmp
26 }
27 ; CHECK-LABEL: test3:
28 ; CHECK: calll __ledf2
29 ; CHECK: setg
30 ; CHECK: retl
31
32 define i1 @test4(double %d) #0 {
33 entry:
34 %cmp = fcmp uge double %d, 0.000000e+00
35 ret i1 %cmp
36 }
37 ; CHECK-LABEL: test4:
38 ; CHECK: calll __ltdf2
39 ; CHECK: setns
40 ; CHECK: retl
41
42 define i1 @test5(double %d) #0 {
43 entry:
44 %cmp = fcmp ole double %d, 0.000000e+00
45 ret i1 %cmp
46 }
47 ; CHECK-LABEL: test5:
48 ; CHECK: calll __ledf2
49 ; CHECK: setle
50 ; CHECK: retl
51
52 define i1 @test6(double %d) #0 {
53 entry:
54 %cmp = fcmp olt double %d, 0.000000e+00
55 ret i1 %cmp
56 }
57 ; CHECK-LABEL: test6:
58 ; CHECK: calll __ltdf2
59 ; CHECK: sets
60 ; CHECK: retl
61
62 define i1 @test7(double %d) #0 {
63 entry:
64 %cmp = fcmp ogt double %d, 0.000000e+00
65 ret i1 %cmp
66 }
67 ; CHECK-LABEL: test7:
68 ; CHECK: calll __gtdf2
69 ; CHECK: setg
70 ; CHECK: retl
71
72 define i1 @test8(double %d) #0 {
73 entry:
74 %cmp = fcmp oge double %d, 0.000000e+00
75 ret i1 %cmp
76 }
77 ; CHECK-LABEL: test8:
78 ; CHECK: calll __gedf2
79 ; CHECK: setns
80 ; CHECK: retl
81
82 define i1 @test9(double %d) #0 {
83 entry:
84 %cmp = fcmp oeq double %d, 0.000000e+00
85 ret i1 %cmp
86 }
87 ; CHECK-LABEL: test9:
88 ; CHECK: calll __eqdf2
89 ; CHECK: sete
90 ; CHECK: retl
91
92 define i1 @test10(double %d) #0 {
93 entry:
94 %cmp = fcmp ueq double %d, 0.000000e+00
95 ret i1 %cmp
96 }
97 ; CHECK-LABEL: test10:
98 ; CHECK: calll __eqdf2
99 ; CHECK: sete
100 ; CHECK: calll __unorddf2
101 ; CHECK: setne
102 ; CHECK: retl
103
104 define i1 @test11(double %d) #0 {
105 entry:
106 %cmp = fcmp one double %d, 0.000000e+00
107 ret i1 %cmp
108 }
109 ; CHECK-LABEL: test11:
110 ; CHECK: calll __gtdf2
111 ; CHECK: setg
112 ; CHECK: calll __ltdf2
113 ; CHECK: sets
114 ; CHECK: retl
115
116 define i1 @test12(double %d) #0 {
117 entry:
118 %cmp = fcmp une double %d, 0.000000e+00
119 ret i1 %cmp
120 }
121 ; CHECK-LABEL: test12:
122 ; CHECK: calll __nedf2
123 ; CHECK: setne
124 ; CHECK: retl
125
126 attributes #0 = { "use-soft-float"="true" }
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
1 declare i32 @llvm.x86.rdpkru()
2 declare void @llvm.x86.wrpkru(i32)
3
4 define void @test_x86_wrpkru(i32 %src) {
5 ; CHECK-LABEL: test_x86_wrpkru:
6 ; CHECK: ## BB#0:
7 ; CHECK-NEXT: xorl %ecx, %ecx
8 ; CHECK-NEXT: xorl %edx, %edx
9 ; CHECK-NEXT: movl %edi, %eax
10 ; CHECK-NEXT: wrpkru
11 ; CHECK-NEXT: retq
12 call void @llvm.x86.wrpkru(i32 %src)
13 ret void
14 }
15
16 define i32 @test_x86_rdpkru() {
17 ; CHECK-LABEL: test_x86_rdpkru:
18 ; CHECK: ## BB#0:
19 ; CHECK-NEXT: xorl %ecx, %ecx
20 ; CHECK-NEXT: rdpkru
21 ; CHECK-NEXT: retq
22 %res = call i32 @llvm.x86.rdpkru()
23 ret i32 %res
24 }
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
1 declare i32 @llvm.x86.rdpkru()
2 declare void @llvm.x86.wrpkru(i32)
3
4 define void @test_x86_wrpkru(i32 %src) {
5 ; CHECK-LABEL: test_x86_wrpkru:
6 ; CHECK: ## BB#0:
7 ; CHECK-NEXT: xorl %ecx, %ecx
8 ; CHECK-NEXT: xorl %edx, %edx
9 ; CHECK-NEXT: movl %edi, %eax
10 ; CHECK-NEXT: wrpkru
11 ; CHECK-NEXT: retq
12 call void @llvm.x86.wrpkru(i32 %src)
13 ret void
14 }
15
16 define i32 @test_x86_rdpkru() {
17 ; CHECK-LABEL: test_x86_rdpkru:
18 ; CHECK: ## BB#0:
19 ; CHECK-NEXT: xorl %ecx, %ecx
20 ; CHECK-NEXT: rdpkru
21 ; CHECK-NEXT: retq
22 %res = call i32 @llvm.x86.rdpkru()
23 ret i32 %res
24 }
None ; RUN: llc -mtriple=x86_64-linux -mcpu=corei7 < %s | FileCheck %s
1 ; This fixes a missing cases in the MI scheduler's constrainLocalCopy exposed by
2 ; PR21792
3
4 @stuff = external constant [256 x double], align 16
5
6 define void @func(<4 x float> %vx) {
7 entry:
8 %tmp2 = bitcast <4 x float> %vx to <2 x i64>
9 %and.i = and <2 x i64> %tmp2,
10 %tmp3 = bitcast <2 x i64> %and.i to <4 x i32>
11 %index.sroa.0.0.vec.extract = extractelement <4 x i32> %tmp3, i32 0
12 %idx.ext = sext i32 %index.sroa.0.0.vec.extract to i64
13 %add.ptr = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext
14 %tmp4 = bitcast i8* %add.ptr to double*
15 %index.sroa.0.4.vec.extract = extractelement <4 x i32> %tmp3, i32 1
16 %idx.ext5 = sext i32 %index.sroa.0.4.vec.extract to i64
17 %add.ptr6 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext5
18 %tmp5 = bitcast i8* %add.ptr6 to double*
19 %index.sroa.0.8.vec.extract = extractelement <4 x i32> %tmp3, i32 2
20 %idx.ext14 = sext i32 %index.sroa.0.8.vec.extract to i64
21 %add.ptr15 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext14
22 %tmp6 = bitcast i8* %add.ptr15 to double*
23 %index.sroa.0.12.vec.extract = extractelement <4 x i32> %tmp3, i32 3
24 %idx.ext19 = sext i32 %index.sroa.0.12.vec.extract to i64
25 %add.ptr20 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext19
26 %tmp7 = bitcast i8* %add.ptr20 to double*
27 %add.ptr46 = getelementptr inbounds i8, i8* bitcast (double* getelementptr inbounds ([256 x double], [256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext
28 %tmp16 = bitcast i8* %add.ptr46 to double*
29 %add.ptr51 = getelementptr inbounds i8, i8* bitcast (double* getelementptr inbounds ([256 x double], [256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext5
30 %tmp17 = bitcast i8* %add.ptr51 to double*
31 call void @toto(double* %tmp4, double* %tmp5, double* %tmp6, double* %tmp7, double* %tmp16, double* %tmp17)
32 ret void
33 ; CHECK-LABEL: func:
34 ; CHECK: pextrq $1, %xmm0,
35 ; CHECK-NEXT: movd %xmm0, %r[[AX:..]]
36 ; CHECK-NEXT: movslq %e[[AX]],
37 ; CHECK-NEXT: sarq $32, %r[[AX]]
38 }
39
40 declare void @toto(double*, double*, double*, double*, double*, double*)
0 ; RUN: llc -mtriple=x86_64-linux -mcpu=corei7 < %s | FileCheck %s
1 ; This fixes a missing cases in the MI scheduler's constrainLocalCopy exposed by
2 ; PR21792
3
4 @stuff = external constant [256 x double], align 16
5
6 define void @func(<4 x float> %vx) {
7 entry:
8 %tmp2 = bitcast <4 x float> %vx to <2 x i64>
9 %and.i = and <2 x i64> %tmp2,
10 %tmp3 = bitcast <2 x i64> %and.i to <4 x i32>
11 %index.sroa.0.0.vec.extract = extractelement <4 x i32> %tmp3, i32 0
12 %idx.ext = sext i32 %index.sroa.0.0.vec.extract to i64
13 %add.ptr = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext
14 %tmp4 = bitcast i8* %add.ptr to double*
15 %index.sroa.0.4.vec.extract = extractelement <4 x i32> %tmp3, i32 1
16 %idx.ext5 = sext i32 %index.sroa.0.4.vec.extract to i64
17 %add.ptr6 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext5
18 %tmp5 = bitcast i8* %add.ptr6 to double*
19 %index.sroa.0.8.vec.extract = extractelement <4 x i32> %tmp3, i32 2
20 %idx.ext14 = sext i32 %index.sroa.0.8.vec.extract to i64
21 %add.ptr15 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext14
22 %tmp6 = bitcast i8* %add.ptr15 to double*
23 %index.sroa.0.12.vec.extract = extractelement <4 x i32> %tmp3, i32 3
24 %idx.ext19 = sext i32 %index.sroa.0.12.vec.extract to i64
25 %add.ptr20 = getelementptr inbounds i8, i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext19
26 %tmp7 = bitcast i8* %add.ptr20 to double*
27 %add.ptr46 = getelementptr inbounds i8, i8* bitcast (double* getelementptr inbounds ([256 x double], [256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext
28 %tmp16 = bitcast i8* %add.ptr46 to double*
29 %add.ptr51 = getelementptr inbounds i8, i8* bitcast (double* getelementptr inbounds ([256 x double], [256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext5
30 %tmp17 = bitcast i8* %add.ptr51 to double*
31 call void @toto(double* %tmp4, double* %tmp5, double* %tmp6, double* %tmp7, double* %tmp16, double* %tmp17)
32 ret void
33 ; CHECK-LABEL: func:
34 ; CHECK: pextrq $1, %xmm0,
35 ; CHECK-NEXT: movd %xmm0, %r[[AX:..]]
36 ; CHECK-NEXT: movslq %e[[AX]],
37 ; CHECK-NEXT: sarq $32, %r[[AX]]
38 }
39
40 declare void @toto(double*, double*, double*, double*, double*, double*)
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
1
2 ; Check that we do not get excessive spilling from splitting of constant live ranges.
3
4 ; CHECK-LABEL: PR24139:
5 ; CHECK: # 16-byte Spill
6 ; CHECK-NOT: # 16-byte Spill
7 ; CHECK: retq
8
9 define <2 x double> @PR24139(<2 x double> %arg, <2 x double> %arg1, <2 x double> %arg2) {
10 %tmp = bitcast <2 x double> %arg to <4 x float>
11 %tmp3 = fmul <4 x float> %tmp,
12 %tmp4 = bitcast <2 x double> %arg to <4 x i32>
13 %tmp5 = and <4 x i32> %tmp4,
14 %tmp6 = or <4 x i32> %tmp5,
15 %tmp7 = bitcast <4 x i32> %tmp6 to <4 x float>
16 %tmp8 = fadd <4 x float> %tmp3, %tmp7
17 %tmp9 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp8) #2
18 %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64>
19 %tmp11 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp9) #2
20 %tmp12 = fmul <4 x float> %tmp11,
21 %tmp13 = fsub <4 x float> %tmp, %tmp12
22 %tmp14 = fmul <4 x float> %tmp11,
23 %tmp15 = fsub <4 x float> %tmp13, %tmp14
24 %tmp16 = fmul <4 x float> %tmp15, %tmp15
25 %tmp17 = fmul <4 x float> %tmp15, %tmp16
26 %tmp18 = fmul <4 x float> %tmp16,
27 %tmp19 = fadd <4 x float> %tmp18,
28 %tmp20 = fmul <4 x float> %tmp16,
29 %tmp21 = fadd <4 x float> %tmp20,
30 %tmp22 = fmul <4 x float> %tmp16, %tmp19
31 %tmp23 = fadd <4 x float> %tmp22,
32 %tmp24 = fmul <4 x float> %tmp16, %tmp21
33 %tmp25 = fadd <4 x float> %tmp24,
34 %tmp26 = fmul <4 x float> %tmp16, %tmp23
35 %tmp27 = fadd <4 x float> %tmp26,
36 %tmp28 = fmul <4 x float> %tmp17, %tmp25
37 %tmp29 = fadd <4 x float> %tmp15, %tmp28
38 %tmp30 = and <2 x i64> %tmp10,
39 %tmp31 = bitcast <2 x i64> %tmp30 to <4 x i32>
40 %tmp32 = icmp eq <4 x i32> %tmp31, zeroinitializer
41 %tmp33 = sext <4 x i1> %tmp32 to <4 x i32>
42 %tmp34 = bitcast <4 x i32> %tmp33 to <4 x float>
43 %tmp35 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp27, <4 x float> %tmp29, <4 x float> %tmp34) #2
44 %tmp36 = and <2 x i64> %tmp10,
45 %tmp37 = bitcast <2 x i64> %tmp36 to <4 x i32>
46 %tmp38 = icmp eq <4 x i32> %tmp37, zeroinitializer
47 %tmp39 = sext <4 x i1> %tmp38 to <4 x i32>
48 %tmp40 = bitcast <4 x float> %tmp35 to <4 x i32>
49 %tmp41 = xor <4 x i32> %tmp40,
50 %tmp42 = bitcast <4 x i32> %tmp41 to <4 x float>
51 %tmp43 = bitcast <4 x i32> %tmp39 to <4 x float>
52 %tmp44 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp42, <4 x float> %tmp35, <4 x float> %tmp43) #2
53 %tmp45 = bitcast <2 x double> %arg1 to <4 x float>
54 %tmp46 = fmul <4 x float> %tmp45,
55 %tmp47 = bitcast <2 x double> %arg1 to <4 x i32>
56 %tmp48 = and <4 x i32> %tmp47,
57 %tmp49 = or <4 x i32> %tmp48,
58 %tmp50 = bitcast <4 x i32> %tmp49 to <4 x float>
59 %tmp51 = fadd <4 x float> %tmp46, %tmp50
60 %tmp52 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp51) #2
61 %tmp53 = bitcast <4 x i32> %tmp52 to <2 x i64>
62 %tmp54 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp52) #2
63 %tmp55 = fmul <4 x float> %tmp54,
64 %tmp56 = fsub <4 x float> %tmp45, %tmp55
65 %tmp57 = fmul <4 x float> %tmp54,
66 %tmp58 = fsub <4 x float> %tmp56, %tmp57
67 %tmp59 = fmul <4 x float> %tmp58, %tmp58
68 %tmp60 = fmul <4 x float> %tmp58, %tmp59
69 %tmp61 = fmul <4 x float> %tmp59,
70 %tmp62 = fadd <4 x float> %tmp61,
71 %tmp63 = fmul <4 x float> %tmp59,
72 %tmp64 = fadd <4 x float> %tmp63,
73 %tmp65 = fmul <4 x float> %tmp59, %tmp62
74 %tmp66 = fadd <4 x float> %tmp65,
75 %tmp67 = fmul <4 x float> %tmp59, %tmp64
76 %tmp68 = fadd <4 x float> %tmp67,
77 %tmp69 = fmul <4 x float> %tmp59, %tmp66
78 %tmp70 = fadd <4 x float> %tmp69,
79 %tmp71 = fmul <4 x float> %tmp60, %tmp68
80 %tmp72 = fadd <4 x float> %tmp58, %tmp71
81 %tmp73 = and <2 x i64> %tmp53,
82 %tmp74 = bitcast <2 x i64> %tmp73 to <4 x i32>
83 %tmp75 = icmp eq <4 x i32> %tmp74, zeroinitializer
84 %tmp76 = sext <4 x i1> %tmp75 to <4 x i32>
85 %tmp77 = bitcast <4 x i32> %tmp76 to <4 x float>
86 %tmp78 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp70, <4 x float> %tmp72, <4 x float> %tmp77) #2
87 %tmp79 = and <2 x i64> %tmp53,
88 %tmp80 = bitcast <2 x i64> %tmp79 to <4 x i32>
89 %tmp81 = icmp eq <4 x i32> %tmp80, zeroinitializer
90 %tmp82 = sext <4 x i1> %tmp81 to <4 x i32>
91 %tmp83 = bitcast <4 x float> %tmp78 to <4 x i32>
92 %tmp84 = xor <4 x i32> %tmp83,
93 %tmp85 = bitcast <4 x i32> %tmp84 to <4 x float>
94 %tmp86 = bitcast <4 x i32> %tmp82 to <4 x float>
95 %tmp87 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp85, <4 x float> %tmp78, <4 x float> %tmp86) #2
96 %tmp88 = fadd <4 x float> %tmp44, %tmp87
97 %tmp89 = bitcast <2 x double> %arg2 to <4 x float>
98 %tmp90 = fmul <4 x float> %tmp89,
99 %tmp91 = bitcast <2 x double> %arg2 to <4 x i32>
100 %tmp92 = and <4 x i32> %tmp91,
101 %tmp93 = or <4 x i32> %tmp92,
102 %tmp94 = bitcast <4 x i32> %tmp93 to <4 x float>
103 %tmp95 = fadd <4 x float> %tmp90, %tmp94
104 %tmp96 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp95) #2
105 %tmp97 = bitcast <4 x i32> %tmp96 to <2 x i64>
106 %tmp98 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp96) #2
107 %tmp99 = fmul <4 x float> %tmp98,
108 %tmp100 = fsub <4 x float> %tmp89, %tmp99
109 %tmp101 = fmul <4 x float> %tmp98,
110 %tmp102 = fsub <4 x float> %tmp100, %tmp101
111 %tmp103 = fmul <4 x float> %tmp102, %tmp102
112 %tmp104 = fmul <4 x float> %tmp102, %tmp103
113 %tmp105 = fmul <4 x float> %tmp103,
114 %tmp106 = fadd <4 x float> %tmp105,
115 %tmp107 = fmul <4 x float> %tmp103,
116 %tmp108 = fadd <4 x float> %tmp107,
117 %tmp109 = fmul <4 x float> %tmp103, %tmp106
118 %tmp110 = fadd <4 x float> %tmp109,
119 %tmp111 = fmul <4 x float> %tmp103, %tmp108
120 %tmp112 = fadd <4 x float> %tmp111,
121 %tmp113 = fmul <4 x float> %tmp103, %tmp110
122 %tmp114 = fadd <4 x float> %tmp113,
123 %tmp115 = fmul <4 x float> %tmp104, %tmp112
124 %tmp116 = fadd <4 x float> %tmp102, %tmp115
125 %tmp117 = and <2 x i64> %tmp97,
126 %tmp118 = bitcast <2 x i64> %tmp117 to <4 x i32>
127 %tmp119 = icmp eq <4 x i32> %tmp118, zeroinitializer
128 %tmp120 = sext <4 x i1> %tmp119 to <4 x i32>
129 %tmp121 = bitcast <4 x i32> %tmp120 to <4 x float>
130 %tmp122 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp114, <4 x float> %tmp116, <4 x float> %tmp121) #2
131 %tmp123 = and <2 x i64> %tmp97,
132 %tmp124 = bitcast <2 x i64> %tmp123 to <4 x i32>
133 %tmp125 = icmp eq <4 x i32> %tmp124, zeroinitializer
134 %tmp126 = sext <4 x i1> %tmp125 to <4 x i32>
135 %tmp127 = bitcast <4 x float> %tmp122 to <4 x i32>
136 %tmp128 = xor <4 x i32> %tmp127,
137 %tmp129 = bitcast <4 x i32> %tmp128 to <4 x float>
138 %tmp130 = bitcast <4 x i32> %tmp126 to <4 x float>
139 %tmp131 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp129, <4 x float> %tmp122, <4 x float> %tmp130) #2
140 %tmp132 = fadd <4 x float> %tmp88, %tmp131
141 %tmp133 = bitcast <4 x float> %tmp132 to <2 x double>
142 ret <2 x double> %tmp133
143 }
144
145 declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>)
146 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>)
147 declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
1
2 ; Check that we do not get excessive spilling from splitting of constant live ranges.
3
4 ; CHECK-LABEL: PR24139:
5 ; CHECK: # 16-byte Spill
6 ; CHECK-NOT: # 16-byte Spill
7 ; CHECK: retq
8
9 define <2 x double> @PR24139(<2 x double> %arg, <2 x double> %arg1, <2 x double> %arg2) {
10 %tmp = bitcast <2 x double> %arg to <4 x float>
11 %tmp3 = fmul <4 x float> %tmp,
12 %tmp4 = bitcast <2 x double> %arg to <4 x i32>
13 %tmp5 = and <4 x i32> %tmp4,
14 %tmp6 = or <4 x i32> %tmp5,
15 %tmp7 = bitcast <4 x i32> %tmp6 to <4 x float>
16 %tmp8 = fadd <4 x float> %tmp3, %tmp7
17 %tmp9 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp8) #2
18 %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64>
19 %tmp11 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp9) #2
20 %tmp12 = fmul <4 x float> %tmp11,
21 %tmp13 = fsub <4 x float> %tmp, %tmp12
22 %tmp14 = fmul <4 x float> %tmp11,
23 %tmp15 = fsub <4 x float> %tmp13, %tmp14
24 %tmp16 = fmul <4 x float> %tmp15, %tmp15
25 %tmp17 = fmul <4 x float> %tmp15, %tmp16
26 %tmp18 = fmul <4 x float> %tmp16,
27 %tmp19 = fadd <4 x float> %tmp18,
28 %tmp20 = fmul <4 x float> %tmp16,
29 %tmp21 = fadd <4 x float> %tmp20,
30 %tmp22 = fmul <4 x float> %tmp16, %tmp19
31 %tmp23 = fadd <4 x float> %tmp22,
32 %tmp24 = fmul <4 x float> %tmp16, %tmp21
33 %tmp25 = fadd <4 x float> %tmp24,
34 %tmp26 = fmul <4 x float> %tmp16, %tmp23
35 %tmp27 = fadd <4 x float> %tmp26,
36 %tmp28 = fmul <4 x float> %tmp17, %tmp25
37 %tmp29 = fadd <4 x float> %tmp15, %tmp28
38 %tmp30 = and <2 x i64> %tmp10,
39 %tmp31 = bitcast <2 x i64> %tmp30 to <4 x i32>
40 %tmp32 = icmp eq <4 x i32> %tmp31, zeroinitializer
41 %tmp33 = sext <4 x i1> %tmp32 to <4 x i32>
42 %tmp34 = bitcast <4 x i32> %tmp33 to <4 x float>
43 %tmp35 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp27, <4 x float> %tmp29, <4 x float> %tmp34) #2
44 %tmp36 = and <2 x i64> %tmp10,
45 %tmp37 = bitcast <2 x i64> %tmp36 to <4 x i32>
46 %tmp38 = icmp eq <4 x i32> %tmp37, zeroinitializer
47 %tmp39 = sext <4 x i1> %tmp38 to <4 x i32>
48 %tmp40 = bitcast <4 x float> %tmp35 to <4 x i32>
49 %tmp41 = xor <4 x i32> %tmp40,
50 %tmp42 = bitcast <4 x i32> %tmp41 to <4 x float>
51 %tmp43 = bitcast <4 x i32> %tmp39 to <4 x float>
52 %tmp44 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp42, <4 x float> %tmp35, <4 x float> %tmp43) #2
53 %tmp45 = bitcast <2 x double> %arg1 to <4 x float>
54 %tmp46 = fmul <4 x float> %tmp45,
55 %tmp47 = bitcast <2 x double> %arg1 to <4 x i32>
56 %tmp48 = and <4 x i32> %tmp47,
57 %tmp49 = or <4 x i32> %tmp48,
58 %tmp50 = bitcast <4 x i32> %tmp49 to <4 x float>
59 %tmp51 = fadd <4 x float> %tmp46, %tmp50
60 %tmp52 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp51) #2
61 %tmp53 = bitcast <4 x i32> %tmp52 to <2 x i64>
62 %tmp54 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp52) #2
63 %tmp55 = fmul <4 x float> %tmp54,
64 %tmp56 = fsub <4 x float> %tmp45, %tmp55
65 %tmp57 = fmul <4 x float> %tmp54,
66 %tmp58 = fsub <4 x float> %tmp56, %tmp57
67 %tmp59 = fmul <4 x float> %tmp58, %tmp58
68 %tmp60 = fmul <4 x float> %tmp58, %tmp59
69 %tmp61 = fmul <4 x float> %tmp59,
70 %tmp62 = fadd <4 x float> %tmp61,
71 %tmp63 = fmul <4 x float> %tmp59,
72 %tmp64 = fadd <4 x float> %tmp63,
73 %tmp65 = fmul <4 x float> %tmp59, %tmp62
74 %tmp66 = fadd <4 x float> %tmp65,
75 %tmp67 = fmul <4 x float> %tmp59, %tmp64
76 %tmp68 = fadd <4 x float> %tmp67,
77 %tmp69 = fmul <4 x float> %tmp59, %tmp66
78 %tmp70 = fadd <4 x float> %tmp69,
79 %tmp71 = fmul <4 x float> %tmp60, %tmp68
80 %tmp72 = fadd <4 x float> %tmp58, %tmp71
81 %tmp73 = and <2 x i64> %tmp53,
82 %tmp74 = bitcast <2 x i64> %tmp73 to <4 x i32>
83 %tmp75 = icmp eq <4 x i32> %tmp74, zeroinitializer
84 %tmp76 = sext <4 x i1> %tmp75 to <4 x i32>
85 %tmp77 = bitcast <4 x i32> %tmp76 to <4 x float>
86 %tmp78 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp70, <4 x float> %tmp72, <4 x float> %tmp77) #2
87 %tmp79 = and <2 x i64> %tmp53,
88 %tmp80 = bitcast <2 x i64> %tmp79 to <4 x i32>
89 %tmp81 = icmp eq <4 x i32> %tmp80, zeroinitializer
90 %tmp82 = sext <4 x i1> %tmp81 to <4 x i32>
91 %tmp83 = bitcast <4 x float> %tmp78 to <4 x i32>
92 %tmp84 = xor <4 x i32> %tmp83,
93 %tmp85 = bitcast <4 x i32> %tmp84 to <4 x float>
94 %tmp86 = bitcast <4 x i32> %tmp82 to <4 x float>
95 %tmp87 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp85, <4 x float> %tmp78, <4 x float> %tmp86) #2
96 %tmp88 = fadd <4 x float> %tmp44, %tmp87
97 %tmp89 = bitcast <2 x double> %arg2 to <4 x float>
98 %tmp90 = fmul <4 x float> %tmp89,
99 %tmp91 = bitcast <2 x double> %arg2 to <4 x i32>
100 %tmp92 = and <4 x i32> %tmp91,
101 %tmp93 = or <4 x i32> %tmp92,
102 %tmp94 = bitcast <4 x i32> %tmp93 to <4 x float>
103 %tmp95 = fadd <4 x float> %tmp90, %tmp94
104 %tmp96 = tail call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp95) #2
105 %tmp97 = bitcast <4 x i32> %tmp96 to <2 x i64>
106 %tmp98 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp96) #2
107 %tmp99 = fmul <4 x float> %tmp98,
108 %tmp100 = fsub <4 x float> %tmp89, %tmp99
109 %tmp101 = fmul <4 x float> %tmp98,
110 %tmp102 = fsub <4 x float> %tmp100, %tmp101
111 %tmp103 = fmul <4 x float> %tmp102, %tmp102
112 %tmp104 = fmul <4 x float> %tmp102, %tmp103
113 %tmp105 = fmul <4 x float> %tmp103,
114 %tmp106 = fadd <4 x float> %tmp105,
115 %tmp107 = fmul <4 x float> %tmp103,
116 %tmp108 = fadd <4 x float> %tmp107,
117 %tmp109 = fmul <4 x float> %tmp103, %tmp106
118 %tmp110 = fadd <4 x float> %tmp109,
119 %tmp111 = fmul <4 x float> %tmp103, %tmp108
120 %tmp112 = fadd <4 x float> %tmp111,
121 %tmp113 = fmul <4 x float> %tmp103, %tmp110
122 %tmp114 = fadd <4 x float> %tmp113,
123 %tmp115 = fmul <4 x float> %tmp104, %tmp112
124 %tmp116 = fadd <4 x float> %tmp102, %tmp115
125 %tmp117 = and <2 x i64> %tmp97,
126 %tmp118 = bitcast <2 x i64> %tmp117 to <4 x i32>
127 %tmp119 = icmp eq <4 x i32> %tmp118, zeroinitializer
128 %tmp120 = sext <4 x i1> %tmp119 to <4 x i32>
129 %tmp121 = bitcast <4 x i32> %tmp120 to <4 x float>
130 %tmp122 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp114, <4 x float> %tmp116, <4 x float> %tmp121) #2
131 %tmp123 = and <2 x i64> %tmp97,
132 %tmp124 = bitcast <2 x i64> %tmp123 to <4 x i32>
133 %tmp125 = icmp eq <4 x i32> %tmp124, zeroinitializer
134 %tmp126 = sext <4 x i1> %tmp125 to <4 x i32>
135 %tmp127 = bitcast <4 x float> %tmp122 to <4 x i32>
136 %tmp128 = xor <4 x i32> %tmp127,
137 %tmp129 = bitcast <4 x i32> %tmp128 to <4 x float>
138 %tmp130 = bitcast <4 x i32> %tmp126 to <4 x float>
139 %tmp131 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %tmp129, <4 x float> %tmp122, <4 x float> %tmp130) #2
140 %tmp132 = fadd <4 x float> %tmp88, %tmp131
141 %tmp133 = bitcast <4 x float> %tmp132 to <2 x double>
142 ret <2 x double> %tmp133
143 }
144
145 declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>)
146 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>)
147 declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
None ; RUN: llc < %s | FileCheck %s
1 ; Test to check that Statepoints with X64 far-immediate targets
2 ; are lowered correctly to an indirect call via a scratch register.
3
4 target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
5 target triple = "x86_64-pc-win64"
6
7 define void @test_far_call() gc "statepoint-example" {
8 ; CHECK-LABEL: test_far_call
9 ; CHECK: pushq %rax
10 ; CHECK: movabsq $140727162896504, %rax
11 ; CHECK: callq *%rax
12 ; CHECK: popq %rax
13 ; CHECK: retq
14
15 entry:
16 %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* inttoptr (i64 140727162896504 to void ()*), i32 0, i32 0, i32 0, i32 0)
17 ret void
18 }
19
20 declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
21
0 ; RUN: llc < %s | FileCheck %s
1 ; Test to check that Statepoints with X64 far-immediate targets
2 ; are lowered correctly to an indirect call via a scratch register.
3
4 target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
5 target triple = "x86_64-pc-win64"
6
7 define void @test_far_call() gc "statepoint-example" {
8 ; CHECK-LABEL: test_far_call
9 ; CHECK: pushq %rax
10 ; CHECK: movabsq $140727162896504, %rax
11 ; CHECK: callq *%rax
12 ; CHECK: popq %rax
13 ; CHECK: retq
14
15 entry:
16 %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* inttoptr (i64 140727162896504 to void ()*), i32 0, i32 0, i32 0, i32 0)
17 ret void
18 }
19
20 declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
21
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s
1
2 define void @test_xsave(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsave
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsave (%rdi)
7 call void @llvm.x86.xsave(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsave(i8*, i32, i32)
11
12 define void @test_xsave64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsave64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsave64 (%rdi)
17 call void @llvm.x86.xsave64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsave64(i8*, i32, i32)
21
22 define void @test_xrstor(i8* %ptr, i32 %hi, i32 %lo) {
23 ; CHECK-LABEL: test_xrstor
24 ; CHECK: movl %edx, %eax
25 ; CHECK: movl %esi, %edx
26 ; CHECK: xrstor (%rdi)
27 call void @llvm.x86.xrstor(i8* %ptr, i32 %hi, i32 %lo)
28 ret void;
29 }
30 declare void @llvm.x86.xrstor(i8*, i32, i32)
31
32 define void @test_xrstor64(i8* %ptr, i32 %hi, i32 %lo) {
33 ; CHECK-LABEL: test_xrstor64
34 ; CHECK: movl %edx, %eax
35 ; CHECK: movl %esi, %edx
36 ; CHECK: xrstor64 (%rdi)
37 call void @llvm.x86.xrstor64(i8* %ptr, i32 %hi, i32 %lo)
38 ret void;
39 }
40 declare void @llvm.x86.xrstor64(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s
1
2 define void @test_xsave(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsave
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsave (%rdi)
7 call void @llvm.x86.xsave(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsave(i8*, i32, i32)
11
12 define void @test_xsave64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsave64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsave64 (%rdi)
17 call void @llvm.x86.xsave64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsave64(i8*, i32, i32)
21
22 define void @test_xrstor(i8* %ptr, i32 %hi, i32 %lo) {
23 ; CHECK-LABEL: test_xrstor
24 ; CHECK: movl %edx, %eax
25 ; CHECK: movl %esi, %edx
26 ; CHECK: xrstor (%rdi)
27 call void @llvm.x86.xrstor(i8* %ptr, i32 %hi, i32 %lo)
28 ret void;
29 }
30 declare void @llvm.x86.xrstor(i8*, i32, i32)
31
32 define void @test_xrstor64(i8* %ptr, i32 %hi, i32 %lo) {
33 ; CHECK-LABEL: test_xrstor64
34 ; CHECK: movl %edx, %eax
35 ; CHECK: movl %esi, %edx
36 ; CHECK: xrstor64 (%rdi)
37 call void @llvm.x86.xrstor64(i8* %ptr, i32 %hi, i32 %lo)
38 ret void;
39 }
40 declare void @llvm.x86.xrstor64(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
1
2 define void @test_xsavec(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsavec
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsavec (%rdi)
7 call void @llvm.x86.xsavec(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsavec(i8*, i32, i32)
11
12 define void @test_xsavec64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsavec64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsavec64 (%rdi)
17 call void @llvm.x86.xsavec64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsavec64(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
1
2 define void @test_xsavec(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsavec
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsavec (%rdi)
7 call void @llvm.x86.xsavec(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsavec(i8*, i32, i32)
11
12 define void @test_xsavec64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsavec64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsavec64 (%rdi)
17 call void @llvm.x86.xsavec64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsavec64(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsaveopt | FileCheck %s
1
2 define void @test_xsaveopt(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaveopt
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsaveopt (%rdi)
7 call void @llvm.x86.xsaveopt(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsaveopt(i8*, i32, i32)
11
12 define void @test_xsaveopt64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsaveopt64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsaveopt64 (%rdi)
17 call void @llvm.x86.xsaveopt64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsaveopt64(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsaveopt | FileCheck %s
1
2 define void @test_xsaveopt(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaveopt
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsaveopt (%rdi)
7 call void @llvm.x86.xsaveopt(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsaveopt(i8*, i32, i32)
11
12 define void @test_xsaveopt64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsaveopt64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsaveopt64 (%rdi)
17 call void @llvm.x86.xsaveopt64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsaveopt64(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
1
2 define void @test_xsaves(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaves
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsaves (%rdi)
7 call void @llvm.x86.xsaves(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsaves(i8*, i32, i32)
11
12 define void @test_xsaves64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsaves64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsaves64 (%rdi)
17 call void @llvm.x86.xsaves64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsaves64(i8*, i32, i32)
21
22 define void @test_xrstors(i8* %ptr, i32 %hi, i32 %lo) {
23 ; CHECK-LABEL: test_xrstors
24 ; CHECK: movl %edx, %eax
25 ; CHECK: movl %esi, %edx
26 ; CHECK: xrstors (%rdi)
27 call void @llvm.x86.xrstors(i8* %ptr, i32 %hi, i32 %lo)
28 ret void;
29 }
30 declare void @llvm.x86.xrstors(i8*, i32, i32)
31
32 define void @test_xrstors64(i8* %ptr, i32 %hi, i32 %lo) {
33 ; CHECK-LABEL: test_xrstors64
34 ; CHECK: movl %edx, %eax
35 ; CHECK: movl %esi, %edx
36 ; CHECK: xrstors64 (%rdi)
37 call void @llvm.x86.xrstors64(i8* %ptr, i32 %hi, i32 %lo)
38 ret void;
39 }
40 declare void @llvm.x86.xrstors64(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
1
2 define void @test_xsaves(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaves
4 ; CHECK: movl %edx, %eax
5 ; CHECK: movl %esi, %edx
6 ; CHECK: xsaves (%rdi)
7 call void @llvm.x86.xsaves(i8* %ptr, i32 %hi, i32 %lo)
8 ret void;
9 }
10 declare void @llvm.x86.xsaves(i8*, i32, i32)
11
12 define void @test_xsaves64(i8* %ptr, i32 %hi, i32 %lo) {
13 ; CHECK-LABEL: test_xsaves64
14 ; CHECK: movl %edx, %eax
15 ; CHECK: movl %esi, %edx
16 ; CHECK: xsaves64 (%rdi)
17 call void @llvm.x86.xsaves64(i8* %ptr, i32 %hi, i32 %lo)
18 ret void;
19 }
20 declare void @llvm.x86.xsaves64(i8*, i32, i32)
21
22 define void @test_xrstors(i8* %ptr, i32 %hi, i32 %lo) {
23 ; CHECK-LABEL: test_xrstors
24 ; CHECK: movl %edx, %eax
25 ; CHECK: movl %esi, %edx
26 ; CHECK: xrstors (%rdi)
27 call void @llvm.x86.xrstors(i8* %ptr, i32 %hi, i32 %lo)
28 ret void;
29 }
30 declare void @llvm.x86.xrstors(i8*, i32, i32)
31
32 define void @test_xrstors64(i8* %ptr, i32 %hi, i32 %lo) {
33 ; CHECK-LABEL: test_xrstors64
34 ; CHECK: movl %edx, %eax
35 ; CHECK: movl %esi, %edx
36 ; CHECK: xrstors64 (%rdi)
37 call void @llvm.x86.xrstors64(i8* %ptr, i32 %hi, i32 %lo)
38 ret void;
39 }
40 declare void @llvm.x86.xrstors64(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
1
2 define void @test_xsave(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsave
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsave (%ecx)
8 call void @llvm.x86.xsave(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsave(i8*, i32, i32)
12
13 define void @test_xrstor(i8* %ptr, i32 %hi, i32 %lo) {
14 ; CHECK-LABEL: test_xrstor
15 ; CHECK: movl 8(%esp), %edx
16 ; CHECK: movl 12(%esp), %eax
17 ; CHECK: movl 4(%esp), %ecx
18 ; CHECK: xrstor (%ecx)
19 call void @llvm.x86.xrstor(i8* %ptr, i32 %hi, i32 %lo)
20 ret void;
21 }
22 declare void @llvm.x86.xrstor(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
1
2 define void @test_xsave(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsave
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsave (%ecx)
8 call void @llvm.x86.xsave(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsave(i8*, i32, i32)
12
13 define void @test_xrstor(i8* %ptr, i32 %hi, i32 %lo) {
14 ; CHECK-LABEL: test_xrstor
15 ; CHECK: movl 8(%esp), %edx
16 ; CHECK: movl 12(%esp), %eax
17 ; CHECK: movl 4(%esp), %ecx
18 ; CHECK: xrstor (%ecx)
19 call void @llvm.x86.xrstor(i8* %ptr, i32 %hi, i32 %lo)
20 ret void;
21 }
22 declare void @llvm.x86.xrstor(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
1
2 define void @test_xsavec(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsavec
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsavec (%ecx)
8 call void @llvm.x86.xsavec(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsavec(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
1
2 define void @test_xsavec(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsavec
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsavec (%ecx)
8 call void @llvm.x86.xsavec(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsavec(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaveopt | FileCheck %s
1
2 define void @test_xsaveopt(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaveopt
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsaveopt (%ecx)
8 call void @llvm.x86.xsaveopt(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsaveopt(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaveopt | FileCheck %s
1
2 define void @test_xsaveopt(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaveopt
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsaveopt (%ecx)
8 call void @llvm.x86.xsaveopt(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsaveopt(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
1
2 define void @test_xsaves(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaves
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsaves (%ecx)
8 call void @llvm.x86.xsaves(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsaves(i8*, i32, i32)
12
13 define void @test_xrstors(i8* %ptr, i32 %hi, i32 %lo) {
14 ; CHECK-LABEL: test_xrstors
15 ; CHECK: movl 8(%esp), %edx
16 ; CHECK: movl 12(%esp), %eax
17 ; CHECK: movl 4(%esp), %ecx
18 ; CHECK: xrstors (%ecx)
19 call void @llvm.x86.xrstors(i8* %ptr, i32 %hi, i32 %lo)
20 ret void;
21 }
22 declare void @llvm.x86.xrstors(i8*, i32, i32)
0 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
1
2 define void @test_xsaves(i8* %ptr, i32 %hi, i32 %lo) {
3 ; CHECK-LABEL: test_xsaves
4 ; CHECK: movl 8(%esp), %edx
5 ; CHECK: movl 12(%esp), %eax
6 ; CHECK: movl 4(%esp), %ecx
7 ; CHECK: xsaves (%ecx)
8 call void @llvm.x86.xsaves(i8* %ptr, i32 %hi, i32 %lo)
9 ret void;
10 }
11 declare void @llvm.x86.xsaves(i8*, i32, i32)
12
13 define void @test_xrstors(i8* %ptr, i32 %hi, i32 %lo) {
14 ; CHECK-LABEL: test_xrstors
15 ; CHECK: movl 8(%esp), %edx
16 ; CHECK: movl 12(%esp), %eax
17 ; CHECK: movl 4(%esp), %ecx
18 ; CHECK: xrstors (%ecx)
19 call void @llvm.x86.xrstors(i8* %ptr, i32 %hi, i32 %lo)
20 ret void;
21 }
22 declare void @llvm.x86.xrstors(i8*, i32, i32)
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
1
2 ; PR11580
3 define <3 x float> @addf3(<3 x float> %x) {
4 ; CHECK-LABEL: addf3
5 ; CHECK: # BB#0:
6 ; CHECK-NEXT: addps .LCPI0_0(%rip), %xmm0
7 ; CHECK-NEXT: retq
8 entry:
9 %add = fadd <3 x float> %x,
10 ret <3 x float> %add
11 }
12
13 ; PR11580
14 define <4 x float> @cvtf3_f4(<3 x float> %x) {
15 ; CHECK-LABEL: cvtf3_f4
16 ; CHECK: # BB#0:
17 ; CHECK-NEXT: retq
18 entry:
19 %extractVec = shufflevector <3 x float> %x, <3 x float> undef, <4 x i32>
20 ret <4 x float> %extractVec
21 }
22
23 ; PR11580
24 define <3 x float> @cvtf4_f3(<4 x float> %x) {
25 ; CHECK-LABEL: cvtf4_f3
26 ; CHECK: # BB#0:
27 ; CHECK-NEXT: retq
28 entry:
29 %extractVec = shufflevector <4 x float> %x, <4 x float> undef, <3 x i32>
30 ret <3 x float> %extractVec
31 }
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
1
2 ; PR11580
3 define <3 x float> @addf3(<3 x float> %x) {
4 ; CHECK-LABEL: addf3
5 ; CHECK: # BB#0:
6 ; CHECK-NEXT: addps .LCPI0_0(%rip), %xmm0
7 ; CHECK-NEXT: retq
8 entry:
9 %add = fadd <3 x float> %x,
10 ret <3 x float> %add
11 }
12
13 ; PR11580
14 define <4 x float> @cvtf3_f4(<3 x float> %x) {
15 ; CHECK-LABEL: cvtf3_f4
16 ; CHECK: # BB#0:
17 ; CHECK-NEXT: retq
18 entry:
19 %extractVec = shufflevector <3 x float> %x, <3 x float> undef, <4 x i32>
20 ret <4 x float> %extractVec
21 }
22
23 ; PR11580
24 define <3 x float> @cvtf4_f3(<4 x float> %x) {
25 ; CHECK-LABEL: cvtf4_f3
26 ; CHECK: # BB#0:
27 ; CHECK-NEXT: retq
28 entry:
29 %extractVec = shufflevector <4 x float> %x, <4 x float> undef, <3 x i32>
30 ret <3 x float> %extractVec
31 }
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s
1
2 define <4 x i32> @add_4i32(<4 x i32> %a0, <4 x i32> %a1) {
3 ;CHECK-LABEL: @add_4i32
4 ;CHECK: # BB#0:
5 ;CHECK-NEXT: paddd %xmm1, %xmm0
6 ;CHECK-NEXT: retq
7 %1 = add <4 x i32> %a0,
8 %2 = add <4 x i32> %a1,
9 %3 = add <4 x i32> %1, %2
10 ret <4 x i32> %3
11 }
12
13 define <4 x i32> @add_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
14 ;CHECK-LABEL: @add_4i32_commute
15 ;CHECK: # BB#0:
16 ;CHECK-NEXT: paddd %xmm1, %xmm0
17 ;CHECK-NEXT: retq
18 %1 = add <4 x i32> , %a0
19 %2 = add <4 x i32> , %a1
20 %3 = add <4 x i32> %1, %2
21 ret <4 x i32> %3
22 }
23
24 define <4 x i32> @mul_4i32(<4 x i32> %a0, <4 x i32> %a1) {
25 ;CHECK-LABEL: @mul_4i32
26 ;CHECK: # BB#0:
27 ;CHECK-NEXT: pmulld %xmm1, %xmm0
28 ;CHECK-NEXT: pmulld .LCPI2_0(%rip), %xmm0
29 ;CHECK-NEXT: retq
30 %1 = mul <4 x i32> %a0,
31 %2 = mul <4 x i32> %a1,
32 %3 = mul <4 x i32> %1, %2
33 ret <4 x i32> %3
34 }
35
36 define <4 x i32> @mul_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
37 ;CHECK-LABEL: @mul_4i32_commute
38 ;CHECK: # BB#0:
39 ;CHECK-NEXT: pmulld %xmm1, %xmm0
40 ;CHECK-NEXT: pmulld .LCPI3_0(%rip), %xmm0
41 ;CHECK-NEXT: retq
42 %1 = mul <4 x i32> , %a0
43 %2 = mul <4 x i32> , %a1
44 %3 = mul <4 x i32> %1, %2
45 ret <4 x i32> %3
46 }
47
48 define <4 x i32> @and_4i32(<4 x i32> %a0, <4 x i32> %a1) {
49 ;CHECK-LABEL: @and_4i32
50 ;CHECK: # BB#0:
51 ;CHECK-NEXT: andps %xmm1, %xmm0
52 ;CHECK-NEXT: andps .LCPI4_0(%rip), %xmm0
53 ;CHECK-NEXT: retq
54 %1 = and <4 x i32> %a0,
55 %2 = and <4 x i32> %a1,
56 %3 = and <4 x i32> %1, %2
57 ret <4 x i32> %3
58 }
59
60 define <4 x i32> @and_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
61 ;CHECK-LABEL: @and_4i32_commute
62 ;CHECK: # BB#0:
63 ;CHECK-NEXT: andps %xmm1, %xmm0
64 ;CHECK-NEXT: andps .LCPI5_0(%rip), %xmm0
65 ;CHECK-NEXT: retq
66 %1 = and <4 x i32> , %a0
67 %2 = and <4 x i32> , %a1
68 %3 = and <4 x i32> %1, %2
69 ret <4 x i32> %3
70 }
71
72 define <4 x i32> @or_4i32(<4 x i32> %a0, <4 x i32> %a1) {
73 ;CHECK-LABEL: @or_4i32
74 ;CHECK: # BB#0:
75 ;CHECK-NEXT: orps %xmm1, %xmm0
76 ;CHECK-NEXT: orps .LCPI6_0(%rip), %xmm0
77 ;CHECK-NEXT: retq
78 %1 = or <4 x i32> %a0,
79 %2 = or <4 x i32> %a1,
80 %3 = or <4 x i32> %1, %2
81 ret <4 x i32> %3
82 }
83
84 define <4 x i32> @or_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
85 ;CHECK-LABEL: @or_4i32_commute
86 ;CHECK: # BB#0:
87 ;CHECK-NEXT: orps %xmm1, %xmm0
88 ;CHECK-NEXT: orps .LCPI7_0(%rip), %xmm0
89 ;CHECK-NEXT: retq
90 %1 = or <4 x i32> , %a0
91 %2 = or <4 x i32> , %a1
92 %3 = or <4 x i32> %1, %2
93 ret <4 x i32> %3
94 }
95
96 define <4 x i32> @xor_4i32(<4 x i32> %a0, <4 x i32> %a1) {
97 ;CHECK-LABEL: @xor_4i32
98 ;CHECK: # BB#0:
99 ;CHECK-NEXT: xorps %xmm1, %xmm0
100 ;CHECK-NEXT: xorps .LCPI8_0(%rip), %xmm0
101 ;CHECK-NEXT: retq
102 %1 = xor <4 x i32> %a0,
103 %2 = xor <4 x i32> %a1,
104 %3 = xor <4 x i32> %1, %2
105 ret <4 x i32> %3
106 }
107
108 define <4 x i32> @xor_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
109 ;CHECK-LABEL: @xor_4i32_commute
110 ;CHECK: # BB#0:
111 ;CHECK-NEXT: xorps %xmm1, %xmm0
112 ;CHECK-NEXT: xorps .LCPI9_0(%rip), %xmm0
113 ;CHECK-NEXT: retq
114 %1 = xor <4 x i32> , %a0
115 %2 = xor <4 x i32> , %a1
116 %3 = xor <4 x i32> %1, %2
117 ret <4 x i32> %3
118 }
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s
1
2 define <4 x i32> @add_4i32(<4 x i32> %a0, <4 x i32> %a1) {
3 ;CHECK-LABEL: @add_4i32
4 ;CHECK: # BB#0:
5 ;CHECK-NEXT: paddd %xmm1, %xmm0
6 ;CHECK-NEXT: retq
7 %1 = add <4 x i32> %a0,
8 %2 = add <4 x i32> %a1,
9 %3 = add <4 x i32> %1, %2
10 ret <4 x i32> %3
11 }
12
13 define <4 x i32> @add_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
14 ;CHECK-LABEL: @add_4i32_commute
15 ;CHECK: # BB#0:
16 ;CHECK-NEXT: paddd %xmm1, %xmm0
17 ;CHECK-NEXT: retq
18 %1 = add <4 x i32> , %a0
19 %2 = add <4 x i32> , %a1
20 %3 = add <4 x i32> %1, %2
21 ret <4 x i32> %3
22 }
23
24 define <4 x i32> @mul_4i32(<4 x i32> %a0, <4 x i32> %a1) {
25 ;CHECK-LABEL: @mul_4i32
26 ;CHECK: # BB#0:
27 ;CHECK-NEXT: pmulld %xmm1, %xmm0
28 ;CHECK-NEXT: pmulld .LCPI2_0(%rip), %xmm0
29 ;CHECK-NEXT: retq
30 %1 = mul <4 x i32> %a0,
31 %2 = mul <4 x i32> %a1,
32 %3 = mul <4 x i32> %1, %2
33 ret <4 x i32> %3
34 }
35
36 define <4 x i32> @mul_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
37 ;CHECK-LABEL: @mul_4i32_commute
38 ;CHECK: # BB#0:
39 ;CHECK-NEXT: pmulld %xmm1, %xmm0
40 ;CHECK-NEXT: pmulld .LCPI3_0(%rip), %xmm0
41 ;CHECK-NEXT: retq
42 %1 = mul <4 x i32> , %a0
43 %2 = mul <4 x i32> , %a1
44 %3 = mul <4 x i32> %1, %2
45 ret <4 x i32> %3
46 }
47
48 define <4 x i32> @and_4i32(<4 x i32> %a0, <4 x i32> %a1) {
49 ;CHECK-LABEL: @and_4i32
50 ;CHECK: # BB#0:
51 ;CHECK-NEXT: andps %xmm1, %xmm0
52 ;CHECK-NEXT: andps .LCPI4_0(%rip), %xmm0
53 ;CHECK-NEXT: retq
54 %1 = and <4 x i32> %a0,
55 %2 = and <4 x i32> %a1,
56 %3 = and <4 x i32> %1, %2
57 ret <4 x i32> %3
58 }
59
60 define <4 x i32> @and_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
61 ;CHECK-LABEL: @and_4i32_commute
62 ;CHECK: # BB#0:
63 ;CHECK-NEXT: andps %xmm1, %xmm0
64 ;CHECK-NEXT: andps .LCPI5_0(%rip), %xmm0
65 ;CHECK-NEXT: retq
66 %1 = and <4 x i32> , %a0
67 %2 = and <4 x i32> , %a1
68 %3 = and <4 x i32> %1, %2
69 ret <4 x i32> %3
70 }
71
72 define <4 x i32> @or_4i32(<4 x i32> %a0, <4 x i32> %a1) {
73 ;CHECK-LABEL: @or_4i32
74 ;CHECK: # BB#0:
75 ;CHECK-NEXT: orps %xmm1, %xmm0
76 ;CHECK-NEXT: orps .LCPI6_0(%rip), %xmm0
77 ;CHECK-NEXT: retq
78 %1 = or <4 x i32> %a0,
79 %2 = or <4 x i32> %a1,
80 %3 = or <4 x i32> %1, %2
81 ret <4 x i32> %3
82 }
83
84 define <4 x i32> @or_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
85 ;CHECK-LABEL: @or_4i32_commute
86 ;CHECK: # BB#0:
87 ;CHECK-NEXT: orps %xmm1, %xmm0
88 ;CHECK-NEXT: orps .LCPI7_0(%rip), %xmm0
89 ;CHECK-NEXT: retq
90 %1 = or <4 x i32> , %a0
91 %2 = or <4 x i32> , %a1
92 %3 = or <4 x i32> %1, %2
93 ret <4 x i32> %3
94 }
95
96 define <4 x i32> @xor_4i32(<4 x i32> %a0, <4 x i32> %a1) {
97 ;CHECK-LABEL: @xor_4i32
98 ;CHECK: # BB#0:
99 ;CHECK-NEXT: xorps %xmm1, %xmm0
100 ;CHECK-NEXT: xorps .LCPI8_0(%rip), %xmm0
101 ;CHECK-NEXT: retq
102 %1 = xor <4 x i32> %a0,
103 %2 = xor <4 x i32> %a1,
104 %3 = xor <4 x i32> %1, %2
105 ret <4 x i32> %3
106 }
107
108 define <4 x i32> @xor_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
109 ;CHECK-LABEL: @xor_4i32_commute
110 ;CHECK: # BB#0:
111 ;CHECK-NEXT: xorps %xmm1, %xmm0
112 ;CHECK-NEXT: xorps .LCPI9_0(%rip), %xmm0
113 ;CHECK-NEXT: retq
114 %1 = xor <4 x i32> , %a0
115 %2 = xor <4 x i32> , %a1
116 %3 = xor <4 x i32> %1, %2
117 ret <4 x i32> %3
118 }
None ; RUN: llc -mtriple=i686-unknown-unknown < %s | FileCheck %s
1 ; RUN: llc -mtriple=i686-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
2
3 %struct.interrupt_frame = type { i32, i32, i32, i32, i32 }
4
5 @llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_clobbers to i8*)], section "llvm.metadata"
6
7 ; Spills eax, putting original esp at +4.
8 ; No stack adjustment if declared with no error code
9 define x86_intrcc void @test_isr_no_ecode(%struct.interrupt_frame* %frame) {
10 ; CHECK-LABEL: test_isr_no_ecode:
11 ; CHECK: pushl %eax
12 ; CHECK: movl 12(%esp), %eax
13 ; CHECK: popl %eax
14 ; CHECK: iretl
15 ; CHECK0-LABEL: test_isr_no_ecode:
16 ; CHECK0: pushl %eax
17 ; CHECK0: leal 4(%esp), %eax
18 ; CHECK0: movl 8(%eax), %eax
19 ; CHECK0: popl %eax
20 ; CHECK0: iretl
21 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
22 %flags = load i32, i32* %pflags, align 4
23 call void asm sideeffect "", "r"(i32 %flags)
24 ret void
25 }
26
27 ; Spills eax and ecx, putting original esp at +8. Stack is adjusted up another 4 bytes
28 ; before return, popping the error code.
29 define x86_intrcc void @test_isr_ecode(%struct.interrupt_frame* %frame, i32 %ecode) {
30 ; CHECK-LABEL: test_isr_ecode
31 ; CHECK: pushl %ecx
32 ; CHECK: pushl %eax
33 ; CHECK: movl 8(%esp), %eax
34 ; CHECK: movl 20(%esp), %ecx
35 ; CHECK: popl %eax
36 ; CHECK: popl %ecx
37 ; CHECK: addl $4, %esp
38 ; CHECK: iretl
39 ; CHECK0-LABEL: test_isr_ecode
40 ; CHECK0: pushl %ecx
41 ; CHECK0: pushl %eax
42 ; CHECK0: movl 8(%esp), %eax
43 ; CHECK0: leal 12(%esp), %ecx
44 ; CHECK0: movl 8(%ecx), %ecx
45 ; CHECK0: popl %eax
46 ; CHECK0: popl %ecx
47 ; CHECK0: addl $4, %esp
48 ; CHECK0: iretl
49 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
50 %flags = load i32, i32* %pflags, align 4
51 call x86_fastcallcc void asm sideeffect "", "r,r"(i32 %flags, i32 %ecode)
52 ret void
53 }
54
55 ; All clobbered registers must be saved
56 define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i32 %ecode) {
57 call void asm sideeffect "", "~{eax},~{ebx},~{ebp}"()
58 ; CHECK-LABEL: test_isr_clobbers
59 ; CHECK-SSE-NEXT: pushl %ebp
60 ; CHECK-SSE-NEXT: pushl %ebx
61 ; CHECK-SSE-NEXT; pushl %eax
62 ; CHECK-SSE-NEXT: popl %eax
63 ; CHECK-SSE-NEXT: popl %ebx
64 ; CHECK-SSE-NEXT: popl %ebp
65 ; CHECK-SSE-NEXT: addl $4, %esp
66 ; CHECK-SSE-NEXT: iretl
67 ; CHECK0-LABEL: test_isr_clobbers
68 ; CHECK0-SSE-NEXT: pushl %ebp
69 ; CHECK0-SSE-NEXT: pushl %ebx
70 ; CHECK0-SSE-NEXT; pushl %eax
71 ; CHECK0-SSE-NEXT: popl %eax
72 ; CHECK0-SSE-NEXT: popl %ebx
73 ; CHECK0-SSE-NEXT: popl %ebp
74 ; CHECK0-SSE-NEXT: addl $4, %esp
75 ; CHECK0-SSE-NEXT: iretl
76 ret void
77 }
78
0 ; RUN: llc -mtriple=i686-unknown-unknown < %s | FileCheck %s
1 ; RUN: llc -mtriple=i686-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
2
3 %struct.interrupt_frame = type { i32, i32, i32, i32, i32 }
4
5 @llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_clobbers to i8*)], section "llvm.metadata"
6
7 ; Spills eax, putting original esp at +4.
8 ; No stack adjustment if declared with no error code
9 define x86_intrcc void @test_isr_no_ecode(%struct.interrupt_frame* %frame) {
10 ; CHECK-LABEL: test_isr_no_ecode:
11 ; CHECK: pushl %eax
12 ; CHECK: movl 12(%esp), %eax
13 ; CHECK: popl %eax
14 ; CHECK: iretl
15 ; CHECK0-LABEL: test_isr_no_ecode:
16 ; CHECK0: pushl %eax
17 ; CHECK0: leal 4(%esp), %eax
18 ; CHECK0: movl 8(%eax), %eax
19 ; CHECK0: popl %eax
20 ; CHECK0: iretl
21 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
22 %flags = load i32, i32* %pflags, align 4
23 call void asm sideeffect "", "r"(i32 %flags)
24 ret void
25 }
26
27 ; Spills eax and ecx, putting original esp at +8. Stack is adjusted up another 4 bytes
28 ; before return, popping the error code.
29 define x86_intrcc void @test_isr_ecode(%struct.interrupt_frame* %frame, i32 %ecode) {
30 ; CHECK-LABEL: test_isr_ecode
31 ; CHECK: pushl %ecx
32 ; CHECK: pushl %eax
33 ; CHECK: movl 8(%esp), %eax
34 ; CHECK: movl 20(%esp), %ecx
35 ; CHECK: popl %eax
36 ; CHECK: popl %ecx
37 ; CHECK: addl $4, %esp
38 ; CHECK: iretl
39 ; CHECK0-LABEL: test_isr_ecode
40 ; CHECK0: pushl %ecx
41 ; CHECK0: pushl %eax
42 ; CHECK0: movl 8(%esp), %eax
43 ; CHECK0: leal 12(%esp), %ecx
44 ; CHECK0: movl 8(%ecx), %ecx
45 ; CHECK0: popl %eax
46 ; CHECK0: popl %ecx
47 ; CHECK0: addl $4, %esp
48 ; CHECK0: iretl
49 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
50 %flags = load i32, i32* %pflags, align 4
51 call x86_fastcallcc void asm sideeffect "", "r,r"(i32 %flags, i32 %ecode)
52 ret void
53 }
54
55 ; All clobbered registers must be saved
56 define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i32 %ecode) {
57 call void asm sideeffect "", "~{eax},~{ebx},~{ebp}"()
58 ; CHECK-LABEL: test_isr_clobbers
59 ; CHECK-SSE-NEXT: pushl %ebp
60 ; CHECK-SSE-NEXT: pushl %ebx
61 ; CHECK-SSE-NEXT; pushl %eax
62 ; CHECK-SSE-NEXT: popl %eax
63 ; CHECK-SSE-NEXT: popl %ebx
64 ; CHECK-SSE-NEXT: popl %ebp
65 ; CHECK-SSE-NEXT: addl $4, %esp
66 ; CHECK-SSE-NEXT: iretl
67 ; CHECK0-LABEL: test_isr_clobbers
68 ; CHECK0-SSE-NEXT: pushl %ebp
69 ; CHECK0-SSE-NEXT: pushl %ebx
70 ; CHECK0-SSE-NEXT; pushl %eax
71 ; CHECK0-SSE-NEXT: popl %eax
72 ; CHECK0-SSE-NEXT: popl %ebx
73 ; CHECK0-SSE-NEXT: popl %ebp
74 ; CHECK0-SSE-NEXT: addl $4, %esp
75 ; CHECK0-SSE-NEXT: iretl
76 ret void
77 }
78
None ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
1 ; RUN: llc -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
2
3 %struct.interrupt_frame = type { i64, i64, i64, i64, i64 }
4
5 @llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_clobbers to i8*)], section "llvm.metadata"
6
7 ; Spills rax, putting original esp at +8.
8 ; No stack adjustment if declared with no error code
9 define x86_intrcc void @test_isr_no_ecode(%struct.interrupt_frame* %frame) {
10 ; CHECK-LABEL: test_isr_no_ecode:
11 ; CHECK: pushq %rax
12 ; CHECK: movq 24(%rsp), %rax
13 ; CHECK: popq %rax
14 ; CHECK: iretq
15 ; CHECK0-LABEL: test_isr_no_ecode:
16 ; CHECK0: pushq %rax
17 ; CHECK0: leaq 8(%rsp), %rax
18 ; CHECK0: movq 16(%rax), %rax
19 ; CHECK0: popq %rax
20 ; CHECK0: iretq
21 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
22 %flags = load i64, i64* %pflags, align 4
23 call void asm sideeffect "", "r"(i64 %flags)
24 ret void
25 }
26
27 ; Spills rax and rcx, putting original rsp at +16. Stack is adjusted up another 8 bytes
28 ; before return, popping the error code.
29 define x86_intrcc void @test_isr_ecode(%struct.interrupt_frame* %frame, i64 %ecode) {
30 ; CHECK-LABEL: test_isr_ecode
31 ; CHECK: pushq %rax
32 ; CHECK: pushq %rcx
33 ; CHECK: movq 16(%rsp), %rax
34 ; CHECK: movq 40(%rsp), %rcx
35 ; CHECK: popq %rcx
36 ; CHECK: popq %rax
37 ; CHECK: addq $8, %rsp
38 ; CHECK: iretq
39 ; CHECK0-LABEL: test_isr_ecode
40 ; CHECK0: pushq %rax
41 ; CHECK0: pushq %rcx
42 ; CHECK0: movq 16(%rsp), %rax
43 ; CHECK0: leaq 24(%rsp), %rcx
44 ; CHECK0: movq 16(%rcx), %rcx
45 ; CHECK0: popq %rcx
46 ; CHECK0: popq %rax
47 ; CHECK0: addq $8, %rsp
48 ; CHECK0: iretq
49 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
50 %flags = load i64, i64* %pflags, align 4
51 call void asm sideeffect "", "r,r"(i64 %flags, i64 %ecode)
52 ret void
53 }
54
55 ; All clobbered registers must be saved
56 define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i64 %ecode) {
57 call void asm sideeffect "", "~{rax},~{rbx},~{rbp},~{r11},~{xmm0}"()
58 ; CHECK-LABEL: test_isr_clobbers
59 ; CHECK-SSE-NEXT: pushq %rax
60 ; CHECK-SSE-NEXT; pushq %r11
61 ; CHECK-SSE-NEXT: pushq %rbp
62 ; CHECK-SSE-NEXT: pushq %rbx
63 ; CHECK-SSE-NEXT: movaps %xmm0
64 ; CHECK-SSE-NEXT: movaps %xmm0
65 ; CHECK-SSE-NEXT: popq %rbx
66 ; CHECK-SSE-NEXT: popq %rbp
67 ; CHECK-SSE-NEXT: popq %r11
68 ; CHECK-SSE-NEXT: popq %rax
69 ; CHECK-SSE-NEXT: addq $8, %rsp
70 ; CHECK-SSE-NEXT: iretq
71 ; CHECK0-LABEL: test_isr_clobbers
72 ; CHECK0-SSE-NEXT: pushq %rax
73 ; CHECK0-SSE-NEXT; pushq %r11
74 ; CHECK0-SSE-NEXT: pushq %rbp
75 ; CHECK0-SSE-NEXT: pushq %rbx
76 ; CHECK0-SSE-NEXT: movaps %xmm0
77 ; CHECK0-SSE-NEXT: movaps %xmm0
78 ; CHECK0-SSE-NEXT: popq %rbx
79 ; CHECK0-SSE-NEXT: popq %rbp
80 ; CHECK0-SSE-NEXT: popq %r11
81 ; CHECK0-SSE-NEXT: popq %rax
82 ; CHECK0-SSE-NEXT: addq $8, %rsp
83 ; CHECK0-SSE-NEXT: iretq
84 ret void
0 ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
1 ; RUN: llc -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
2
3 %struct.interrupt_frame = type { i64, i64, i64, i64, i64 }
4
5 @llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_clobbers to i8*)], section "llvm.metadata"
6
7 ; Spills rax, putting original esp at +8.
8 ; No stack adjustment if declared with no error code
9 define x86_intrcc void @test_isr_no_ecode(%struct.interrupt_frame* %frame) {
10 ; CHECK-LABEL: test_isr_no_ecode:
11 ; CHECK: pushq %rax
12 ; CHECK: movq 24(%rsp), %rax
13 ; CHECK: popq %rax
14 ; CHECK: iretq
15 ; CHECK0-LABEL: test_isr_no_ecode:
16 ; CHECK0: pushq %rax
17 ; CHECK0: leaq 8(%rsp), %rax
18 ; CHECK0: movq 16(%rax), %rax
19 ; CHECK0: popq %rax
20 ; CHECK0: iretq
21 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
22 %flags = load i64, i64* %pflags, align 4
23 call void asm sideeffect "", "r"(i64 %flags)
24 ret void
25 }
26
27 ; Spills rax and rcx, putting original rsp at +16. Stack is adjusted up another 8 bytes
28 ; before return, popping the error code.
29 define x86_intrcc void @test_isr_ecode(%struct.interrupt_frame* %frame, i64 %ecode) {
30 ; CHECK-LABEL: test_isr_ecode
31 ; CHECK: pushq %rax
32 ; CHECK: pushq %rcx
33 ; CHECK: movq 16(%rsp), %rax
34 ; CHECK: movq 40(%rsp), %rcx
35 ; CHECK: popq %rcx
36 ; CHECK: popq %rax
37 ; CHECK: addq $8, %rsp
38 ; CHECK: iretq
39 ; CHECK0-LABEL: test_isr_ecode
40 ; CHECK0: pushq %rax
41 ; CHECK0: pushq %rcx
42 ; CHECK0: movq 16(%rsp), %rax
43 ; CHECK0: leaq 24(%rsp), %rcx
44 ; CHECK0: movq 16(%rcx), %rcx
45 ; CHECK0: popq %rcx
46 ; CHECK0: popq %rax
47 ; CHECK0: addq $8, %rsp
48 ; CHECK0: iretq
49 %pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
50 %flags = load i64, i64* %pflags, align 4
51 call void asm sideeffect "", "r,r"(i64 %flags, i64 %ecode)
52 ret void
53 }
54
55 ; All clobbered registers must be saved
56 define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i64 %ecode) {
57 call void asm sideeffect "", "~{rax},~{rbx},~{rbp},~{r11},~{xmm0}"()
58 ; CHECK-LABEL: test_isr_clobbers
59 ; CHECK-SSE-NEXT: pushq %rax
60 ; CHECK-SSE-NEXT; pushq %r11
61 ; CHECK-SSE-NEXT: pushq %rbp
62 ; CHECK-SSE-NEXT: pushq %rbx
63 ; CHECK-SSE-NEXT: movaps %xmm0
64 ; CHECK-SSE-NEXT: movaps %xmm0
65 ; CHECK-SSE-NEXT: popq %rbx
66 ; CHECK-SSE-NEXT: popq %rbp
67 ; CHECK-SSE-NEXT: popq %r11
68 ; CHECK-SSE-NEXT: popq %rax
69 ; CHECK-SSE-NEXT: addq $8, %rsp
70 ; CHECK-SSE-NEXT: iretq
71 ; CHECK0-LABEL: test_isr_clobbers
72 ; CHECK0-SSE-NEXT: pushq %rax
73 ; CHECK0-SSE-NEXT; pushq %r11
74 ; CHECK0-SSE-NEXT: pushq %rbp
75 ; CHECK0-SSE-NEXT: pushq %rbx
76 ; CHECK0-SSE-NEXT: movaps %xmm0
77 ; CHECK0-SSE-NEXT: movaps %xmm0
78 ; CHECK0-SSE-NEXT: popq %rbx
79 ; CHECK0-SSE-NEXT: popq %rbp
80 ; CHECK0-SSE-NEXT: popq %r11
81 ; CHECK0-SSE-NEXT: popq %rax
82 ; CHECK0-SSE-NEXT: addq $8, %rsp
83 ; CHECK0-SSE-NEXT: iretq
84 ret void
8585 }
None #define M4 Value4
0 #define M4 Value4
None #define M1 Value1
1 #include "dwarfdump-macro.h"
2 #define M2(x, y) ((x)+(y)* Value2)
3
4 // Built with GCC
5 // $ mkdir -p /tmp/dbginfo
6 // $ cp dwarfdump-macro.cc /tmp/dbginfo
7 // $ cp dwarfdump-macro.h /tmp/dbginfo
8 // $ cp dwarfdump-macro-cmd.h /tmp/dbginfo
9 // $ cd /tmp/dbginfo
10 // $ g++ -c -g3 -O0 -DM3=Value3 -include dwarfdump-macro-cmd.h dwarfdump-macro.cc -o
0 #define M1 Value1
1 #include "dwarfdump-macro.h"
2 #define M2(x, y) ((x)+(y)* Value2)
3
4 // Built with GCC
5 // $ mkdir -p /tmp/dbginfo
6 // $ cp dwarfdump-macro.cc /tmp/dbginfo
7 // $ cp dwarfdump-macro.h /tmp/dbginfo
8 // $ cp dwarfdump-macro-cmd.h /tmp/dbginfo
9 // $ cd /tmp/dbginfo
10 // $ g++ -c -g3 -O0 -DM3=Value3 -include dwarfdump-macro-cmd.h dwarfdump-macro.cc -o
None
1
2
3 #undef M1
4 #define M1 NewValue1
0
1
2
3 #undef M1
4 #define M1 NewValue1
None RUN: llvm-dwarfdump -debug-dump=macro %p/Inputs/dwarfdump-macro.o \
1 RUN: | FileCheck %s -check-prefix TEST_MACINFO
2 RUN: llvm-dwarfdump -debug-dump=line %p/Inputs/dwarfdump-macro.o \
3 RUN: | FileCheck %s -check-prefix TEST_LINE
4
5
6 ; This test verifies that llvm-dwarfdump tools know how to read .debug_macinfo
7 ; section. It also checks that the file numbers fits with those in the
8 ; .debug_line section.
9 TEST_MACINFO: .debug_macinfo contents:
10 TEST_MACINFO: DW_MACINFO_define - lineno: 0 macro: M3 Value3
11 TEST_MACINFO: DW_MACINFO_start_file - lineno: 0 filenum: 1
12 TEST_MACINFO: DW_MACINFO_start_file - lineno: 0 filenum: 2
13 TEST_MACINFO: DW_MACINFO_define - lineno: 1 macro: M4 Value4
14 TEST_MACINFO: DW_MACINFO_end_file
15 TEST_MACINFO: DW_MACINFO_define - lineno: 1 macro: M1 Value1
16 TEST_MACINFO: DW_MACINFO_start_file - lineno: 2 filenum: 3
17 TEST_MACINFO: DW_MACINFO_undef - lineno: 4 macro: M1
18 TEST_MACINFO: DW_MACINFO_define - lineno: 5 macro: M1 NewValue1
19 TEST_MACINFO: DW_MACINFO_end_file
20 TEST_MACINFO: DW_MACINFO_define - lineno: 3 macro: M2(x,y) ((x)+(y)* Value2)
21 TEST_MACINFO: DW_MACINFO_end_file
22
23 TEST_LINE: .debug_line contents:
24 TEST_LINE: file_names[ 1] 0 0x00000000 0x00000000 dwarfdump-macro.cc
25 TEST_LINE: file_names[ 2] 1 0x00000000 0x00000000 dwarfdump-macro-cmd.h
26 TEST_LINE: file_names[ 3] 0 0x00000000 0x00000000 dwarfdump-macro.h
0 RUN: llvm-dwarfdump -debug-dump=macro %p/Inputs/dwarfdump-macro.o \
1 RUN: | FileCheck %s -check-prefix TEST_MACINFO
2 RUN: llvm-dwarfdump -debug-dump=line %p/Inputs/dwarfdump-macro.o \
3 RUN: | FileCheck %s -check-prefix TEST_LINE
4
5
6 ; This test verifies that llvm-dwarfdump tools know how to read .debug_macinfo
7 ; section. It also checks that the file numbers fits with those in the
8 ; .debug_line section.
9 TEST_MACINFO: .debug_macinfo contents:
10 TEST_MACINFO: DW_MACINFO_define - lineno: 0 macro: M3 Value3
11 TEST_MACINFO: DW_MACINFO_start_file - lineno: 0 filenum: 1
12 TEST_MACINFO: DW_MACINFO_start_file - lineno: 0 filenum: 2
13 TEST_MACINFO: DW_MACINFO_define - lineno: 1 macro: M4 Value4
14 TEST_MACINFO: DW_MACINFO_end_file
15 TEST_MACINFO: DW_MACINFO_define - lineno: 1 macro: M1 Value1
16 TEST_MACINFO: DW_MACINFO_start_file - lineno: 2 filenum: 3
17 TEST_MACINFO: DW_MACINFO_undef - lineno: 4 macro: M1
18 TEST_MACINFO: DW_MACINFO_define - lineno: 5 macro: M1 NewValue1
19 TEST_MACINFO: DW_MACINFO_end_file
20 TEST_MACINFO: DW_MACINFO_define - lineno: 3 macro: M2(x,y) ((x)+(y)* Value2)
21 TEST_MACINFO: DW_MACINFO_end_file
22
23 TEST_LINE: .debug_line contents:
24 TEST_LINE: file_names[ 1] 0 0x00000000 0x00000000 dwarfdump-macro.cc
25 TEST_LINE: file_names[ 2] 1 0x00000000 0x00000000 dwarfdump-macro-cmd.h
26 TEST_LINE: file_names[ 3] 0 0x00000000 0x00000000 dwarfdump-macro.h
22
33 ; This test was created using the following file:
44 ;
5 ; 1: int foo(int a) {
6 ; 2: return a;
5 ; 1: int foo(int a) {
6 ; 2: return a;
77 ; 3: }
88 ; 4:
9 ; 5: int bar(int a) {
10 ; 6: if (a == 0) {
11 ; 7: return 0;
12 ; 8: }
13 ; 9: return 100/a;
14 ; 10: }
15 ; 11:
16 ; 12: int fubar(int a) {
17 ; 13: switch (a) {
18 ; 14: case 0:
19 ; 15: return 10;
20 ; 16: case 1:
21 ; 17: return 20;
22 ; 18: default:
23 ; 19: return 30;
24 ; 20: }
9 ; 5: int bar(int a) {
10 ; 6: if (a == 0) {
11 ; 7: return 0;
12 ; 8: }
13 ; 9: return 100/a;
14 ; 10: }
15 ; 11:
16 ; 12: int fubar(int a) {
17 ; 13: switch (a) {
18 ; 14: case 0:
19 ; 15: return 10;
20 ; 16: case 1:
21 ; 17: return 20;
22 ; 18: default:
23 ; 19: return 30;
24 ; 20: }
2525 ; 21: }
2626 ;
2727
28 ; CHECK: Method load [1]: bar, Size = {{[0-9]+}}
29 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
30 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
31 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
32 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
33
34 ; CHECK: Method load [2]: foo, Size = {{[0-9]+}}
35 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[1,2]}}
36 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[1,2]}}
37
38 ; CHECK: Method load [3]: fubar, Size = {{[0-9]+}}
39 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
40 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
41 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
42 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
43 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
44
45 ; CHECK: Method unload [1]
46 ; CHECK: Method unload [2]
28 ; CHECK: Method load [1]: bar, Size = {{[0-9]+}}
29 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
30 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
31 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
32 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[5,6,7,9]}}
33
34 ; CHECK: Method load [2]: foo, Size = {{[0-9]+}}
35 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[1,2]}}
36 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[1,2]}}
37
38 ; CHECK: Method load [3]: fubar, Size = {{[0-9]+}}
39 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
40 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
41 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
42 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
43 ; CHECK: Line info @ {{[0-9]+}}: multiple.c, line {{[12,13,15,17,19]}}
44
45 ; CHECK: Method unload [1]
46 ; CHECK: Method unload [2]
4747 ; CHECK: Method unload [3]
4848
4949 ; ModuleID = 'multiple.c'
22
33 ; This test was created using the following file:
44 ;
5 ; 1: int foo(int a) {
6 ; 2: return a;
5 ; 1: int foo(int a) {
6 ; 2: return a;
77 ; 3: }
88 ;
99
10 ; CHECK: Method load [1]: foo, Size = {{[0-9]+}}
11 ; CHECK: Line info @ {{[0-9]+}}: simple.c, line 1
12 ; CHECK: Line info @ {{[0-9]+}}: simple.c, line 2
10 ; CHECK: Method load [1]: foo, Size = {{[0-9]+}}
11 ; CHECK: Line info @ {{[0-9]+}}: simple.c, line 1
12 ; CHECK: Line info @ {{[0-9]+}}: simple.c, line 2
1313 ; CHECK: Method unload [1]
1414
1515 ; ModuleID = 'simple.c'
44
55 ldc p12, cr4, [r0, #4]
66 stc p14, cr6, [r2, #-224]
7 @ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
8
9 @ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed]
10 @ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed]
11
12 ldc p12, cr4, [r0, #4]
13 stc p14, cr6, [r2, #-224]
7 @ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
8
9 @ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed]
10 @ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed]
11
12 ldc p12, cr4, [r0, #4]
13 stc p14, cr6, [r2, #-224]
None # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
1 # XFAIL: *
2 0x46 0x2f 0x79 0x32 # CHECK: c.eq.d $fcc1, $f15, $f15
3 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17
4 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
5 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7
6 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
7 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4
8 0x46 0x23 0x4b 0x3c # CHECK: c.lt.d $fcc3, $f9, $f3
9 0x46 0x0e 0x8a 0x3c # CHECK: c.lt.s $fcc2, $f17, $f14
10 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
11 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
12 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
13 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
14 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7
15 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
16 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
17 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
18 0x46 0x3c 0x9c 0x34 # CHECK: c.olt.d $fcc4, $f19, $f28
19 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
20 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
21 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
22 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
23 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30
24 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
25 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
26 0x46 0x31 0x36 0x35 # CHECK: c.ult.d $fcc6, $f6, $f17
27 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10
28 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24
29 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4
30 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20
31 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
32 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
33 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
34 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
35 0x4c 0xac 0xc8 0x30 # CHECK: nmadd.s $f0, $f5, $f25, $f12
36 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
37 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4
38 0x46 0x20 0x34 0xd5 # CHECK: recip.d $f19, $f6
39 0x46 0x00 0xf0 0xd5 # CHECK: recip.s $f3, $f30
40 0x46 0x20 0xe0 0xd6 # CHECK: rsqrt.d $f3, $f28
41 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
0 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
1 # XFAIL: *
2 0x46 0x2f 0x79 0x32 # CHECK: c.eq.d $fcc1, $f15, $f15
3 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17
4 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
5 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7
6 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
7 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4
8 0x46 0x23 0x4b 0x3c # CHECK: c.lt.d $fcc3, $f9, $f3
9 0x46 0x0e 0x8a 0x3c # CHECK: c.lt.s $fcc2, $f17, $f14
10 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
11 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
12 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
13 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
14 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7
15 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
16 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
17 0x46 0x14 0x3b 0x36 # CHECK: c.ole.s $fcc3, $f7, $f20
18 0x46 0x3c 0x9c 0x34 # CHECK: c.olt.d $fcc4, $f19, $f28
19 0x46 0x07 0xa6 0x34 # CHECK: c.olt.s $fcc6, $f20, $f7
20 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
21 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
22 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
23 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30
24 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
25 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
26 0x46 0x31 0x36 0x35 # CHECK: c.ult.d $fcc6, $f6, $f17
27 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10
28 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24
29 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4
30 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20
31 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
32 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
33 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16
34 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
35 0x4c 0xac 0xc8 0x30 # CHECK: nmadd.s $f0, $f5, $f25, $f12
36 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
37 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4
38 0x46 0x20 0x34 0xd5 # CHECK: recip.d $f19, $f6
39 0x46 0x00 0xf0 0xd5 # CHECK: recip.s $f3, $f30
40 0x46 0x20 0xe0 0xd6 # CHECK: rsqrt.d $f3, $f28
41 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
None #RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv60 %s
1
2 { vmem (r0 + #0) = v0
0 #RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv60 %s
1
2 { vmem (r0 + #0) = v0
33 r0 = memw(r0) }
None // RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=+pku --show-encoding < %s | FileCheck %s
1 // CHECK: rdpkru
2 // CHECK: encoding: [0x0f,0x01,0xee]
3 rdpkru
4
5 // CHECK: wrpkru
6 // CHECK: encoding: [0x0f,0x01,0xef]
0 // RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=+pku --show-encoding < %s | FileCheck %s
1 // CHECK: rdpkru
2 // CHECK: encoding: [0x0f,0x01,0xee]
3 rdpkru
4
5 // CHECK: wrpkru
6 // CHECK: encoding: [0x0f,0x01,0xef]
77 wrpkru
None ; RUN: opt -S -early-cse < %s | FileCheck %s
1 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
2 target triple = "aarch64--linux-gnu"
3
4 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i16>*)
5
6 ; Although the store and the ld4 are using the same pointer, the
7 ; data can not be reused because ld4 accesses multiple elements.
8 define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @foo() {
9 entry:
10 store <4 x i16> undef, <4 x i16>* undef, align 8
11 %0 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i16>* undef)
12 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %0
13 ; CHECK-LABEL: @foo(
14 ; CHECK: store
15 ; CHECK-NEXT: call
16 ; CHECK-NEXT: ret
17 }
0 ; RUN: opt -S -early-cse < %s | FileCheck %s
1 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
2 target triple = "aarch64--linux-gnu"
3
4 declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i16>*)
5
6 ; Although the store and the ld4 are using the same pointer, the
7 ; data can not be reused because ld4 accesses multiple elements.
8 define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @foo() {
9 entry:
10 store <4 x i16> undef, <4 x i16>* undef, align 8
11 %0 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0v4i16(<4 x i16>* undef)
12 ret { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } %0
13 ; CHECK-LABEL: @foo(
14 ; CHECK: store
15 ; CHECK-NEXT: call
16 ; CHECK-NEXT: ret
17 }
None ; RUN: opt %s -S -place-safepoints | FileCheck %s
1
2 ; Basic test to make sure that safepoints are placed
3 ; for CoreCLR GC
4
5 declare void @foo()
6
7 define void @test_simple_call() gc "coreclr" {
8 ; CHECK-LABEL: test_simple_call
9 entry:
10 br label %other
11 other:
12 ; CHECK-LABEL: other
13 ; CHECK: statepoint
14 ; CHECK-NOT: gc.result
15 call void @foo()
16 ret void
17 }
18
19 ; This function is inlined when inserting a poll. To avoid recursive
20 ; issues, make sure we don't place safepoints in it.
21 declare void @do_safepoint()
22 define void @gc.safepoint_poll() {
23 ; CHECK-LABEL: gc.safepoint_poll
24 ; CHECK-LABEL: entry
25 ; CHECK-NEXT: do_safepoint
26 ; CHECK-NEXT: ret void
27 entry:
28 call void @do_safepoint()
29 ret void
30 }
0 ; RUN: opt %s -S -place-safepoints | FileCheck %s
1
2 ; Basic test to make sure that safepoints are placed
3 ; for CoreCLR GC
4
5 declare void @foo()
6
7 define void @test_simple_call() gc "coreclr" {
8 ; CHECK-LABEL: test_simple_call
9 entry:
10 br label %other
11 other:
12 ; CHECK-LABEL: other
13 ; CHECK: statepoint
14 ; CHECK-NOT: gc.result
15 call void @foo()
16 ret void
17 }
18
19 ; This function is inlined when inserting a poll. To avoid recursive
20 ; issues, make sure we don't place safepoints in it.
21 declare void @do_safepoint()
22 define void @gc.safepoint_poll() {
23 ; CHECK-LABEL: gc.safepoint_poll
24 ; CHECK-LABEL: entry
25 ; CHECK-NEXT: do_safepoint
26 ; CHECK-NEXT: ret void
27 entry:
28 call void @do_safepoint()
29 ret void
30 }
None // Compile with "cl /c /Zi /GR- ClassLayoutTest.cpp"
1 // Link with "link ClassLayoutTest.obj /debug /nodefaultlib /entry:main"
2
3 namespace MembersTest {
4 class A {
5 public:
6 typedef int NestedTypedef;
7 enum NestedEnum {
8 NestedEnumValue1
9 };
10
11 void MemberFunc() {}
12
13 private:
14 int IntMemberVar;
15 double DoubleMemberVar;
16 };
17 }
18
19 namespace GlobalsTest {
20 int IntVar;
21 double DoubleVar;
22
23 typedef int Typedef;
24 enum Enum {
25 Val1
26 } EnumVar;
27 Typedef TypedefVar;
28 }
29
30 namespace BaseClassTest {
31 class A {};
32 class B : public virtual A {};
33 class C : public virtual A {};
34 class D : protected B, private C {};
35 }
36
37 namespace UdtKindTest {
38 struct A {};
39 class B {};
40 union C {};
41 }
42
43 namespace BitFieldTest {
44 struct A {
45 int Bits1 : 1;
46 int Bits2 : 2;
47 int Bits3 : 3;
48 int Bits4 : 4;
49 int Bits22 : 22;
50 int Offset0x04;
51 };
52 };
53
54 int main(int argc, char **argv) {
55 MembersTest::A v1;
56 v1.MemberFunc();
57 BaseClassTest::D v2;
58 UdtKindTest::A v3;
59 UdtKindTest::B v4;
60 UdtKindTest::C v5;
61 BitFieldTest::A v7;
62 return 0;
63 }
0 // Compile with "cl /c /Zi /GR- ClassLayoutTest.cpp"
1 // Link with "link ClassLayoutTest.obj /debug /nodefaultlib /entry:main"
2
3 namespace MembersTest {
4 class A {
5 public:
6 typedef int NestedTypedef;
7 enum NestedEnum {
8 NestedEnumValue1
9 };
10
11 void MemberFunc() {}
12
13 private:
14 int IntMemberVar;
15 double DoubleMemberVar;
16 };
17 }
18
19 namespace GlobalsTest {
20 int IntVar;
21 double DoubleVar;
22
23 typedef int Typedef;
24 enum Enum {
25 Val1
26 } EnumVar;
27 Typedef TypedefVar;
28 }
29
30 namespace BaseClassTest {
31 class A {};
32 class B : public virtual A {};
33 class C : public virtual A {};
34 class D : protected B, private C {};
35 }
36
37 namespace UdtKindTest {
38 struct A {};
39 class B {};
40 union C {};
41 }
42
43 namespace BitFieldTest {
44 struct A {
45 int Bits1 : 1;
46 int Bits2 : 2;
47 int Bits3 : 3;
48 int Bits4 : 4;
49 int Bits22 : 22;
50 int Offset0x04;
51 };
52 };
53
54 int main(int argc, char **argv) {
55 MembersTest::A v1;
56 v1.MemberFunc();
57 BaseClassTest::D v2;
58 UdtKindTest::A v3;
59 UdtKindTest::B v4;
60 UdtKindTest::C v5;
61 BitFieldTest::A v7;
62 return 0;
63 }
None // Compile with "cl /c /Zi /GR- FilterTest.cpp"
1 // Link with "link FilterTest.obj /debug /nodefaultlib /entry:main"
2
3 class FilterTestClass {
4 public:
5 typedef int NestedTypedef;
6 enum NestedEnum {
7 NestedEnumValue1
8 };
9
10 void MemberFunc() {}
11
12 private:
13 int IntMemberVar;
14 double DoubleMemberVar;
15 };
16
17 int IntGlobalVar;
18 double DoubleGlobalVar;
19 typedef int GlobalTypedef;
20 enum GlobalEnum {
21 GlobalEnumVal1
22 } GlobalEnumVar;
23
24 int main(int argc, char **argv) {
25 FilterTestClass TestClass;
26 GlobalTypedef v1;
27 return 0;
28 }
0 // Compile with "cl /c /Zi /GR- FilterTest.cpp"
1 // Link with "link FilterTest.obj /debug /nodefaultlib /entry:main"
2
3 class FilterTestClass {
4 public:
5 typedef int NestedTypedef;
6 enum NestedEnum {
7 NestedEnumValue1
8 };
9
10 void MemberFunc() {}
11
12 private:
13 int IntMemberVar;
14 double DoubleMemberVar;
15 };
16
17 int IntGlobalVar;
18 double DoubleGlobalVar;
19 typedef int GlobalTypedef;
20 enum GlobalEnum {
21 GlobalEnumVal1
22 } GlobalEnumVar;
23
24 int main(int argc, char **argv) {
25 FilterTestClass TestClass;
26 GlobalTypedef v1;
27 return 0;
28 }
None // Compile with "cl /c /Zi /GR- LoadAddressTest.cpp"
1 // Link with "link LoadAddressTest.obj /debug /nodefaultlib /entry:main"
2
3 int main(int argc, char **argv) {
4 return 0;
5 }
0 // Compile with "cl /c /Zi /GR- LoadAddressTest.cpp"
1 // Link with "link LoadAddressTest.obj /debug /nodefaultlib /entry:main"
2
3 int main(int argc, char **argv) {
4 return 0;
5 }
None ; RUN: llvm-pdbdump -all %p/Inputs/ClassLayoutTest.pdb > %t
1 ; RUN: FileCheck -input-file=%t %s -check-prefix=GLOBALS_TEST
2 ; RUN: FileCheck -input-file=%t %s -check-prefix=MEMBERS_TEST
3 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_A
4 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_B
5 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_C
6 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_D
7 ; RUN: FileCheck -input-file=%t %s -check-prefix=UDT_KIND_TEST
8 ; RUN: FileCheck -input-file=%t %s -check-prefix=BITFIELD_TEST
9
10 ; GLOBALS_TEST: ---GLOBALS---
11 ; GLOBALS_TEST-DAG: int GlobalsTest::IntVar
12 ; GLOBALS_TEST-DAG: double GlobalsTest::DoubleVar
13 ; GLOBALS_TEST-DAG: GlobalsTest::Enum GlobalsTest::EnumVar
14
15 ; MEMBERS_TEST: ---TYPES---
16 ; MEMBERS_TEST: class MembersTest::A {
17 ; MEMBERS_TEST-DAG: typedef int NestedTypedef
18 ; MEMBERS_TEST-DAG: enum NestedEnum
19 ; MEMBERS_TEST: public:
20 ; MEMBERS_TEST-NEXT: void MemberFunc()
21 ; MEMBERS_TEST-NEXT: private:
22 ; MEMBERS_TEST-DAG: int IntMemberVar
23 ; MEMBERS_TEST-DAG: double DoubleMemberVar
24 ; MEMBERS_TEST: }
25
26 ; BASE_CLASS_A: ---TYPES---
27 ; BASE_CLASS_A: class BaseClassTest::A {}
28
29 ; BASE_CLASS_B: ---TYPES---
30 ; BASE_CLASS_B: class BaseClassTest::B
31 ; BASE_CLASS_B-NEXT: : public virtual BaseClassTest::A {
32
33 ; BASE_CLASS_C: ---TYPES---
34 ; BASE_CLASS_C: class BaseClassTest::C
35 ; BASE_CLASS_C-NEXT: : public virtual BaseClassTest::A {
36
37 ; BASE_CLASS_D: ---TYPES---
38 ; BASE_CLASS_D: class BaseClassTest::D
39 ; BASE_CLASS_D-DAG: protected BaseClassTest::B
40 ; BASE_CLASS_D-DAG: private BaseClassTest::C
41 ; BASE_CLASS_D-DAG: protected virtual BaseClassTest::A
42
43 ; UDT_KIND_TEST: ---TYPES---
44 ; UDT_KIND_TEST-DAG: union UdtKindTest::C {}
45 ; UDT_KIND_TEST-DAG: class UdtKindTest::B {}
46 ; UDT_KIND_TEST-DAG: struct UdtKindTest::A {}
47
48 ; BITFIELD_TEST: ---TYPES---
49 ; BITFIELD_TEST: struct BitFieldTest::A {
50 ; BITFIELD_TEST-NEXT: public:
51 ; BITFIELD_TEST-NEXT: +0x00 int Bits1 : 1
52 ; BITFIELD_TEST-NEXT: +0x00 int Bits2 : 2
53 ; BITFIELD_TEST-NEXT: +0x00 int Bits3 : 3
54 ; BITFIELD_TEST-NEXT: +0x00 int Bits4 : 4
55 ; BITFIELD_TEST-NEXT: +0x00 int Bits22 : 22
56 ; BITFIELD_TEST-NEXT: +0x04 int Offset0x04
0 ; RUN: llvm-pdbdump -all %p/Inputs/ClassLayoutTest.pdb > %t
1 ; RUN: FileCheck -input-file=%t %s -check-prefix=GLOBALS_TEST
2 ; RUN: FileCheck -input-file=%t %s -check-prefix=MEMBERS_TEST
3 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_A
4 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_B
5 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_C
6 ; RUN: FileCheck -input-file=%t %s -check-prefix=BASE_CLASS_D
7 ; RUN: FileCheck -input-file=%t %s -check-prefix=UDT_KIND_TEST
8 ; RUN: FileCheck -input-file=%t %s -check-prefix=BITFIELD_TEST
9
10 ; GLOBALS_TEST: ---GLOBALS---
11 ; GLOBALS_TEST-DAG: int GlobalsTest::IntVar
12 ; GLOBALS_TEST-DAG: double GlobalsTest::DoubleVar
13 ; GLOBALS_TEST-DAG: GlobalsTest::Enum GlobalsTest::EnumVar
14
15 ; MEMBERS_TEST: ---TYPES---
16 ; MEMBERS_TEST: class MembersTest::A {
17 ; MEMBERS_TEST-DAG: typedef int NestedTypedef
18 ; MEMBERS_TEST-DAG: enum NestedEnum
19 ; MEMBERS_TEST: public:
20 ; MEMBERS_TEST-NEXT: void MemberFunc()
21 ; MEMBERS_TEST-NEXT: private:
22 ; MEMBERS_TEST-DAG: int IntMemberVar
23 ; MEMBERS_TEST-DAG: double DoubleMemberVar
24 ; MEMBERS_TEST: }
25
26 ; BASE_CLASS_A: ---TYPES---
27 ; BASE_CLASS_A: class BaseClassTest::A {}
28
29 ; BASE_CLASS_B: ---TYPES---
30 ; BASE_CLASS_B: class BaseClassTest::B
31 ; BASE_CLASS_B-NEXT: : public virtual BaseClassTest::A {
32
33 ; BASE_CLASS_C: ---TYPES---
34 ; BASE_CLASS_C: class BaseClassTest::C
35 ; BASE_CLASS_C-NEXT: : public virtual BaseClassTest::A {
36
37 ; BASE_CLASS_D: ---TYPES---
38 ; BASE_CLASS_D: class BaseClassTest::D
39 ; BASE_CLASS_D-DAG: protected BaseClassTest::B
40 ; BASE_CLASS_D-DAG: private BaseClassTest::C
41 ; BASE_CLASS_D-DAG: protected virtual BaseClassTest::A
42
43 ; UDT_KIND_TEST: ---TYPES---
44 ; UDT_KIND_TEST-DAG: union UdtKindTest::C {}
45 ; UDT_KIND_TEST-DAG: class UdtKindTest::B {}
46 ; UDT_KIND_TEST-DAG: struct UdtKindTest::A {}
47
48 ; BITFIELD_TEST: ---TYPES---
49 ; BITFIELD_TEST: struct BitFieldTest::A {
50 ; BITFIELD_TEST-NEXT: public:
51 ; BITFIELD_TEST-NEXT: +0x00 int Bits1 : 1
52 ; BITFIELD_TEST-NEXT: +0x00 int Bits2 : 2
53 ; BITFIELD_TEST-NEXT: +0x00 int Bits3 : 3
54 ; BITFIELD_TEST-NEXT: +0x00 int Bits4 : 4
55 ; BITFIELD_TEST-NEXT: +0x00 int Bits22 : 22
56 ; BITFIELD_TEST-NEXT: +0x04 int Offset0x04
None ; RUN: llvm-pdbdump -types %p/Inputs/ClassLayoutTest.pdb > %t
1 ; RUN: FileCheck -input-file=%t %s -check-prefix=GLOBAL_ENUM
2 ; RUN: FileCheck -input-file=%t %s -check-prefix=MEMBER_ENUM
3
4 ; GLOBAL_ENUM: ---TYPES---
5 ; GLOBAL_ENUM: Enums:
6 ; GLOBAL_ENUM: enum GlobalsTest::Enum {
7 ; GLOBAL_ENUM-NEXT: Val1 = 0
8 ; GLOBAL_ENUM-NEXT: }
9
10 ; MEMBER_ENUM: ---TYPES---
11 ; MEMBER_ENUM: Classes:
12 ; MEMBER_ENUM: struct __vc_attributes::threadingAttribute {
13 ; MEMBER_ENUM-NEXT: enum threading_e {
14 ; MEMBER_ENUM-NEXT: apartment = 1
15 ; MEMBER_ENUM-NEXT: single = 2
16 ; MEMBER_ENUM-NEXT: free = 3
17 ; MEMBER_ENUM-NEXT: neutral = 4
18 ; MEMBER_ENUM-NEXT: both = 5
19 ; MEMBER_ENUM-NEXT: }
0 ; RUN: llvm-pdbdump -types %p/Inputs/ClassLayoutTest.pdb > %t
1 ; RUN: FileCheck -input-file=%t %s -check-prefix=GLOBAL_ENUM
2 ; RUN: FileCheck -input-file=%t %s -check-prefix=MEMBER_ENUM
3
4 ; GLOBAL_ENUM: ---TYPES---
5 ; GLOBAL_ENUM: Enums:
6 ; GLOBAL_ENUM: enum GlobalsTest::Enum {
7 ; GLOBAL_ENUM-NEXT: Val1 = 0
8 ; GLOBAL_ENUM-NEXT: }
9
10 ; MEMBER_ENUM: ---TYPES---
11 ; MEMBER_ENUM: Classes:
12 ; MEMBER_ENUM: struct __vc_attributes::threadingAttribute {
13 ; MEMBER_ENUM-NEXT: enum threading_e {
14 ; MEMBER_ENUM-NEXT: apartment = 1
15 ; MEMBER_ENUM-NEXT: single = 2
16 ; MEMBER_ENUM-NEXT: free = 3
17 ; MEMBER_ENUM-NEXT: neutral = 4
18 ; MEMBER_ENUM-NEXT: both = 5
19 ; MEMBER_ENUM-NEXT: }
None ; RUN: llvm-pdbdump -externals %p/Inputs/LoadAddressTest.pdb \
1 ; RUN: | FileCheck --check-prefix=RVA %s
2 ; RUN: llvm-pdbdump -externals -load-address=0x40000000 \
3 ; RUN: %p/Inputs/LoadAddressTest.pdb | FileCheck --check-prefix=VA %s
4
5 ; RVA: ---EXTERNALS---
6 ; RVA: [0x00001010] _main
7
8 ; VA: ---EXTERNALS---
9 ; VA: [0x40001010] _main
0 ; RUN: llvm-pdbdump -externals %p/Inputs/LoadAddressTest.pdb \
1 ; RUN: | FileCheck --check-prefix=RVA %s
2 ; RUN: llvm-pdbdump -externals -load-address=0x40000000 \
3 ; RUN: %p/Inputs/LoadAddressTest.pdb | FileCheck --check-prefix=VA %s
4
5 ; RVA: ---EXTERNALS---
6 ; RVA: [0x00001010] _main
7
8 ; VA: ---EXTERNALS---
9 ; VA: [0x40001010] _main
None config.unsupported = not config.have_dia_sdk
0 config.unsupported = not config.have_dia_sdk
1
2626 EXPECT_FALSE(Struct->hasName());
2727 }
2828
29 TEST(TypesTest, LayoutIdenticalEmptyStructs) {
30 LLVMContext C;
31
32 StructType *Foo = StructType::create(C, "Foo");
33 StructType *Bar = StructType::create(C, "Bar");
34 EXPECT_TRUE(Foo->isLayoutIdentical(Bar));
35 }
29 TEST(TypesTest, LayoutIdenticalEmptyStructs) {
30 LLVMContext C;
31
32 StructType *Foo = StructType::create(C, "Foo");
33 StructType *Bar = StructType::create(C, "Bar");
34 EXPECT_TRUE(Foo->isLayoutIdentical(Bar));
35 }
3636
3737 } // end anonymous namespace