llvm.org GIT mirror llvm / ac0740f
Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before the switch statement. This keeps the unreachable default case from being hit if the instruction was created with an intrinsic with too large of an immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165483 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 7 years ago
5 changed file(s) with 55 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
5858
5959 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
6060 raw_ostream &O) {
61 switch (MI->getOperand(Op).getImm()) {
61 int64_t Imm = MI->getOperand(Op).getImm() & 0xf;
62 switch (Imm) {
6263 default: llvm_unreachable("Invalid ssecc argument!");
64 case 0: O << "eq"; break;
65 case 1: O << "lt"; break;
66 case 2: O << "le"; break;
67 case 3: O << "unord"; break;
68 case 4: O << "neq"; break;
69 case 5: O << "nlt"; break;
70 case 6: O << "nle"; break;
71 case 7: O << "ord"; break;
72 case 8: O << "eq_uq"; break;
73 case 9: O << "nge"; break;
74 case 0xa: O << "ngt"; break;
75 case 0xb: O << "false"; break;
76 case 0xc: O << "neq_oq"; break;
77 case 0xd: O << "ge"; break;
78 case 0xe: O << "gt"; break;
79 case 0xf: O << "true"; break;
80 }
81 }
82
83 void X86ATTInstPrinter::printAVXCC(const MCInst *MI, unsigned Op,
84 raw_ostream &O) {
85 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f;
86 switch (Imm) {
87 default: llvm_unreachable("Invalid avxcc argument!");
6388 case 0: O << "eq"; break;
6489 case 1: O << "lt"; break;
6590 case 2: O << "le"; break;
3939 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
4040 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
4141 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &OS);
42 void printAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS);
4243 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
4344
4445 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
5050
5151 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
5252 raw_ostream &O) {
53 switch (MI->getOperand(Op).getImm()) {
53 int64_t Imm = MI->getOperand(Op).getImm() & 0xf;
54 switch (Imm) {
5455 default: llvm_unreachable("Invalid ssecc argument!");
56 case 0: O << "eq"; break;
57 case 1: O << "lt"; break;
58 case 2: O << "le"; break;
59 case 3: O << "unord"; break;
60 case 4: O << "neq"; break;
61 case 5: O << "nlt"; break;
62 case 6: O << "nle"; break;
63 case 7: O << "ord"; break;
64 case 8: O << "eq_uq"; break;
65 case 9: O << "nge"; break;
66 case 0xa: O << "ngt"; break;
67 case 0xb: O << "false"; break;
68 case 0xc: O << "neq_oq"; break;
69 case 0xd: O << "ge"; break;
70 case 0xe: O << "gt"; break;
71 case 0xf: O << "true"; break;
72 }
73 }
74
75 void X86IntelInstPrinter::printAVXCC(const MCInst *MI, unsigned Op,
76 raw_ostream &O) {
77 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f;
78 switch (Imm) {
79 default: llvm_unreachable("Invalid avxcc argument!");
5580 case 0: O << "eq"; break;
5681 case 1: O << "lt"; break;
5782 case 2: O << "le"; break;
84109 case 0x1d: O << "ge_oq"; break;
85110 case 0x1e: O << "gt_oq"; break;
86111 case 0x1f: O << "true_us"; break;
87
88112 }
89113 }
90114
3636 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
3737 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
3838 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &O);
39 void printAVXCC(const MCInst *MI, unsigned Op, raw_ostream &O);
3940 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
4041
4142 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
417417 }
418418
419419 def AVXCC : Operand {
420 let PrintMethod = "printSSECC";
420 let PrintMethod = "printAVXCC";
421421 let OperandType = "OPERAND_IMMEDIATE";
422422 }
423423