llvm.org GIT mirror llvm / aba1d86
[X86] Reduce scope of variables where possible. NFCI. Fixes cppcheck warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360131 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 1 year, 4 months ago
3 changed file(s) with 4 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
33413341 int CmpValue,
33423342 const MachineRegisterInfo *MRI) const {
33433343 // Check whether we can replace SUB with CMP.
3344 unsigned NewOpcode = 0;
33453344 switch (CmpInstr.getOpcode()) {
33463345 default: break;
33473346 case X86::SUB64ri32:
33623361 if (!MRI->use_nodbg_empty(CmpInstr.getOperand(0).getReg()))
33633362 return false;
33643363 // There is no use of the destination register, we can replace SUB with CMP.
3364 unsigned NewOpcode = 0;
33653365 switch (CmpInstr.getOpcode()) {
33663366 default: llvm_unreachable("Unreachable!");
33673367 case X86::SUB64rm: NewOpcode = X86::CMP64rm; break;
111111
112112 bool MadeChange = false;
113113
114 MachineBasicBlock *MBB;
115 unsigned int Cycles = 0;
116
117114 // Pad the identified basic blocks with NOOPs
118115 for (DenseMap::iterator I = ReturnBBs.begin();
119116 I != ReturnBBs.end(); ++I) {
120 MBB = I->first;
121 Cycles = I->second;
117 MachineBasicBlock *MBB = I->first;
118 unsigned Cycles = I->second;
122119
123120 if (Cycles < Threshold) {
124121 // BB ends in a return. Skip over any DBG_VALUE instructions
158158 X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
159159 const MachineFunction &MF = *MI.getParent()->getParent();
160160 const MachineRegisterInfo &MRI = MF.getRegInfo();
161 auto Opc = MI.getOpcode();
161 unsigned Opc = MI.getOpcode();
162162
163163 // Try the default logic for non-generic instructions that are either copies
164164 // or already have some operands assigned to banks.
181181 case TargetOpcode::G_SHL:
182182 case TargetOpcode::G_LSHR:
183183 case TargetOpcode::G_ASHR: {
184 const MachineFunction &MF = *MI.getParent()->getParent();
185 const MachineRegisterInfo &MRI = MF.getRegInfo();
186
187184 unsigned NumOperands = MI.getNumOperands();
188185 LLT Ty = MRI.getType(MI.getOperand(0).getReg());
189186