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[X86][SSE] Add SSE reciprocal estimate tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287543 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 years ago
2 changed file(s) with 244 addition(s) and 35 deletion(s). Raw diff Collapse all Expand all
None ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
23
34 ; If the target's divss/divps instructions are substantially
45 ; slower than rcpss/rcpps with a Newton-Raphson refinement,
910 ; differences of x86 reciprocal estimates.
1011
1112 define float @f32_no_estimate(float %x) #0 {
13 ; SSE-LABEL: f32_no_estimate:
14 ; SSE: # BB#0:
15 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
16 ; SSE-NEXT: divss %xmm0, %xmm1
17 ; SSE-NEXT: movaps %xmm1, %xmm0
18 ; SSE-NEXT: retq
19 ;
1220 ; AVX-LABEL: f32_no_estimate:
1321 ; AVX: # BB#0:
1422 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
1523 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
1624 ; AVX-NEXT: retq
17 ;
1825 %div = fdiv fast float 1.0, %x
1926 ret float %div
2027 }
2128
2229 define float @f32_one_step(float %x) #1 {
30 ; SSE-LABEL: f32_one_step:
31 ; SSE: # BB#0:
32 ; SSE-NEXT: rcpss %xmm0, %xmm2
33 ; SSE-NEXT: mulss %xmm2, %xmm0
34 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
35 ; SSE-NEXT: subss %xmm0, %xmm1
36 ; SSE-NEXT: mulss %xmm2, %xmm1
37 ; SSE-NEXT: addss %xmm2, %xmm1
38 ; SSE-NEXT: movaps %xmm1, %xmm0
39 ; SSE-NEXT: retq
40 ;
2341 ; AVX-LABEL: f32_one_step:
2442 ; AVX: # BB#0:
2543 ; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm1
2947 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
3048 ; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
3149 ; AVX-NEXT: retq
32 ;
3350 %div = fdiv fast float 1.0, %x
3451 ret float %div
3552 }
3653
3754 define float @f32_two_step(float %x) #2 {
55 ; SSE-LABEL: f32_two_step:
56 ; SSE: # BB#0:
57 ; SSE-NEXT: rcpss %xmm0, %xmm2
58 ; SSE-NEXT: movaps %xmm0, %xmm3
59 ; SSE-NEXT: mulss %xmm2, %xmm3
60 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
61 ; SSE-NEXT: movaps %xmm1, %xmm4
62 ; SSE-NEXT: subss %xmm3, %xmm4
63 ; SSE-NEXT: mulss %xmm2, %xmm4
64 ; SSE-NEXT: addss %xmm2, %xmm4
65 ; SSE-NEXT: mulss %xmm4, %xmm0
66 ; SSE-NEXT: subss %xmm0, %xmm1
67 ; SSE-NEXT: mulss %xmm4, %xmm1
68 ; SSE-NEXT: addss %xmm4, %xmm1
69 ; SSE-NEXT: movaps %xmm1, %xmm0
70 ; SSE-NEXT: retq
71 ;
3872 ; AVX-LABEL: f32_two_step:
3973 ; AVX: # BB#0:
4074 ; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm1
4882 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
4983 ; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
5084 ; AVX-NEXT: retq
51 ;
5285 %div = fdiv fast float 1.0, %x
5386 ret float %div
5487 }
5588
5689 define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 {
90 ; SSE-LABEL: v4f32_no_estimate:
91 ; SSE: # BB#0:
92 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
93 ; SSE-NEXT: divps %xmm0, %xmm1
94 ; SSE-NEXT: movaps %xmm1, %xmm0
95 ; SSE-NEXT: retq
96 ;
5797 ; AVX-LABEL: v4f32_no_estimate:
5898 ; AVX: # BB#0:
5999 ; AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
60100 ; AVX-NEXT: vdivps %xmm0, %xmm1, %xmm0
61101 ; AVX-NEXT: retq
62 ;
63102 %div = fdiv fast <4 x float> , %x
64103 ret <4 x float> %div
65104 }
66105
67106 define <4 x float> @v4f32_one_step(<4 x float> %x) #1 {
107 ; SSE-LABEL: v4f32_one_step:
108 ; SSE: # BB#0:
109 ; SSE-NEXT: rcpps %xmm0, %xmm2
110 ; SSE-NEXT: mulps %xmm2, %xmm0
111 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
112 ; SSE-NEXT: subps %xmm0, %xmm1
113 ; SSE-NEXT: mulps %xmm2, %xmm1
114 ; SSE-NEXT: addps %xmm2, %xmm1
115 ; SSE-NEXT: movaps %xmm1, %xmm0
116 ; SSE-NEXT: retq
117 ;
68118 ; AVX-LABEL: v4f32_one_step:
69119 ; AVX: # BB#0:
70120 ; AVX-NEXT: vrcpps %xmm0, %xmm1
74124 ; AVX-NEXT: vmulps %xmm0, %xmm1, %xmm0
75125 ; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
76126 ; AVX-NEXT: retq
77 ;
78127 %div = fdiv fast <4 x float> , %x
79128 ret <4 x float> %div
80129 }
81130
82131 define <4 x float> @v4f32_two_step(<4 x float> %x) #2 {
132 ; SSE-LABEL: v4f32_two_step:
133 ; SSE: # BB#0:
134 ; SSE-NEXT: rcpps %xmm0, %xmm2
135 ; SSE-NEXT: movaps %xmm0, %xmm3
136 ; SSE-NEXT: mulps %xmm2, %xmm3
137 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
138 ; SSE-NEXT: movaps %xmm1, %xmm4
139 ; SSE-NEXT: subps %xmm3, %xmm4
140 ; SSE-NEXT: mulps %xmm2, %xmm4
141 ; SSE-NEXT: addps %xmm2, %xmm4
142 ; SSE-NEXT: mulps %xmm4, %xmm0
143 ; SSE-NEXT: subps %xmm0, %xmm1
144 ; SSE-NEXT: mulps %xmm4, %xmm1
145 ; SSE-NEXT: addps %xmm4, %xmm1
146 ; SSE-NEXT: movaps %xmm1, %xmm0
147 ; SSE-NEXT: retq
148 ;
83149 ; AVX-LABEL: v4f32_two_step:
84150 ; AVX: # BB#0:
85151 ; AVX-NEXT: vrcpps %xmm0, %xmm1
93159 ; AVX-NEXT: vmulps %xmm0, %xmm1, %xmm0
94160 ; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
95161 ; AVX-NEXT: retq
96 ;
97162 %div = fdiv fast <4 x float> , %x
98163 ret <4 x float> %div
99164 }
100165
101166 define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 {
167 ; SSE-LABEL: v8f32_no_estimate:
168 ; SSE: # BB#0:
169 ; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
170 ; SSE-NEXT: movaps %xmm2, %xmm3
171 ; SSE-NEXT: divps %xmm0, %xmm3
172 ; SSE-NEXT: divps %xmm1, %xmm2
173 ; SSE-NEXT: movaps %xmm3, %xmm0
174 ; SSE-NEXT: movaps %xmm2, %xmm1
175 ; SSE-NEXT: retq
176 ;
102177 ; AVX-LABEL: v8f32_no_estimate:
103178 ; AVX: # BB#0:
104179 ; AVX-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
105180 ; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0
106181 ; AVX-NEXT: retq
107 ;
108182 %div = fdiv fast <8 x float> , %x
109183 ret <8 x float> %div
110184 }
111185
112186 define <8 x float> @v8f32_one_step(<8 x float> %x) #1 {
187 ; SSE-LABEL: v8f32_one_step:
188 ; SSE: # BB#0:
189 ; SSE-NEXT: rcpps %xmm0, %xmm4
190 ; SSE-NEXT: mulps %xmm4, %xmm0
191 ; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
192 ; SSE-NEXT: movaps %xmm2, %xmm3
193 ; SSE-NEXT: subps %xmm0, %xmm3
194 ; SSE-NEXT: mulps %xmm4, %xmm3
195 ; SSE-NEXT: addps %xmm4, %xmm3
196 ; SSE-NEXT: rcpps %xmm1, %xmm0
197 ; SSE-NEXT: mulps %xmm0, %xmm1
198 ; SSE-NEXT: subps %xmm1, %xmm2
199 ; SSE-NEXT: mulps %xmm0, %xmm2
200 ; SSE-NEXT: addps %xmm0, %xmm2
201 ; SSE-NEXT: movaps %xmm3, %xmm0
202 ; SSE-NEXT: movaps %xmm2, %xmm1
203 ; SSE-NEXT: retq
204 ;
113205 ; AVX-LABEL: v8f32_one_step:
114206 ; AVX: # BB#0:
115207 ; AVX-NEXT: vrcpps %ymm0, %ymm1
119211 ; AVX-NEXT: vmulps %ymm0, %ymm1, %ymm0
120212 ; AVX-NEXT: vaddps %ymm0, %ymm1, %ymm0
121213 ; AVX-NEXT: retq
122 ;
123214 %div = fdiv fast <8 x float> , %x
124215 ret <8 x float> %div
125216 }
126217
127218 define <8 x float> @v8f32_two_step(<8 x float> %x) #2 {
219 ; SSE-LABEL: v8f32_two_step:
220 ; SSE: # BB#0:
221 ; SSE-NEXT: movaps %xmm1, %xmm2
222 ; SSE-NEXT: rcpps %xmm0, %xmm3
223 ; SSE-NEXT: movaps %xmm0, %xmm4
224 ; SSE-NEXT: mulps %xmm3, %xmm4
225 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
226 ; SSE-NEXT: movaps %xmm1, %xmm5
227 ; SSE-NEXT: subps %xmm4, %xmm5
228 ; SSE-NEXT: mulps %xmm3, %xmm5
229 ; SSE-NEXT: addps %xmm3, %xmm5
230 ; SSE-NEXT: mulps %xmm5, %xmm0
231 ; SSE-NEXT: movaps %xmm1, %xmm3
232 ; SSE-NEXT: subps %xmm0, %xmm3
233 ; SSE-NEXT: mulps %xmm5, %xmm3
234 ; SSE-NEXT: addps %xmm5, %xmm3
235 ; SSE-NEXT: rcpps %xmm2, %xmm0
236 ; SSE-NEXT: movaps %xmm2, %xmm4
237 ; SSE-NEXT: mulps %xmm0, %xmm4
238 ; SSE-NEXT: movaps %xmm1, %xmm5
239 ; SSE-NEXT: subps %xmm4, %xmm5
240 ; SSE-NEXT: mulps %xmm0, %xmm5
241 ; SSE-NEXT: addps %xmm0, %xmm5
242 ; SSE-NEXT: mulps %xmm5, %xmm2
243 ; SSE-NEXT: subps %xmm2, %xmm1
244 ; SSE-NEXT: mulps %xmm5, %xmm1
245 ; SSE-NEXT: addps %xmm5, %xmm1
246 ; SSE-NEXT: movaps %xmm3, %xmm0
247 ; SSE-NEXT: retq
248 ;
128249 ; AVX-LABEL: v8f32_two_step:
129250 ; AVX: # BB#0:
130251 ; AVX-NEXT: vrcpps %ymm0, %ymm1
138259 ; AVX-NEXT: vmulps %ymm0, %ymm1, %ymm0
139260 ; AVX-NEXT: vaddps %ymm0, %ymm1, %ymm0
140261 ; AVX-NEXT: retq
141 ;
142262 %div = fdiv fast <8 x float> , %x
143263 ret <8 x float> %div
144264 }
None ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
23
34 declare double @__sqrt_finite(double)
45 declare float @__sqrtf_finite(float)
910
1011
1112 define double @finite_f64_no_estimate(double %d) #0 {
13 ; SSE-LABEL: finite_f64_no_estimate:
14 ; SSE: # BB#0:
15 ; SSE-NEXT: sqrtsd %xmm0, %xmm0
16 ; SSE-NEXT: retq
17 ;
1218 ; AVX-LABEL: finite_f64_no_estimate:
1319 ; AVX: # BB#0:
1420 ; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
1521 ; AVX-NEXT: retq
16 ;
1722 %call = tail call double @__sqrt_finite(double %d) #2
1823 ret double %call
1924 }
2126 ; No estimates for doubles.
2227
2328 define double @finite_f64_estimate(double %d) #1 {
29 ; SSE-LABEL: finite_f64_estimate:
30 ; SSE: # BB#0:
31 ; SSE-NEXT: sqrtsd %xmm0, %xmm0
32 ; SSE-NEXT: retq
33 ;
2434 ; AVX-LABEL: finite_f64_estimate:
2535 ; AVX: # BB#0:
2636 ; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
2737 ; AVX-NEXT: retq
28 ;
2938 %call = tail call double @__sqrt_finite(double %d) #2
3039 ret double %call
3140 }
3241
3342 define float @finite_f32_no_estimate(float %f) #0 {
43 ; SSE-LABEL: finite_f32_no_estimate:
44 ; SSE: # BB#0:
45 ; SSE-NEXT: sqrtss %xmm0, %xmm0
46 ; SSE-NEXT: retq
47 ;
3448 ; AVX-LABEL: finite_f32_no_estimate:
3549 ; AVX: # BB#0:
3650 ; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
3751 ; AVX-NEXT: retq
38 ;
3952 %call = tail call float @__sqrtf_finite(float %f) #2
4053 ret float %call
4154 }
4255
4356 define float @finite_f32_estimate(float %f) #1 {
57 ; SSE-LABEL: finite_f32_estimate:
58 ; SSE: # BB#0:
59 ; SSE-NEXT: rsqrtss %xmm0, %xmm1
60 ; SSE-NEXT: movaps %xmm0, %xmm2
61 ; SSE-NEXT: mulss %xmm1, %xmm2
62 ; SSE-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
63 ; SSE-NEXT: mulss %xmm2, %xmm3
64 ; SSE-NEXT: mulss %xmm1, %xmm2
65 ; SSE-NEXT: addss {{.*}}(%rip), %xmm2
66 ; SSE-NEXT: mulss %xmm3, %xmm2
67 ; SSE-NEXT: xorps %xmm1, %xmm1
68 ; SSE-NEXT: cmpeqss %xmm1, %xmm0
69 ; SSE-NEXT: andnps %xmm2, %xmm0
70 ; SSE-NEXT: retq
71 ;
4472 ; AVX-LABEL: finite_f32_estimate:
4573 ; AVX: # BB#0:
4674 ; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm1
5381 ; AVX-NEXT: vcmpeqss %xmm2, %xmm0, %xmm0
5482 ; AVX-NEXT: vandnps %xmm1, %xmm0, %xmm0
5583 ; AVX-NEXT: retq
56 ;
5784 %call = tail call float @__sqrtf_finite(float %f) #2
5885 ret float %call
5986 }
6087
6188 define x86_fp80 @finite_f80_no_estimate(x86_fp80 %ld) #0 {
62 ; AVX-LABEL: finite_f80_no_estimate:
63 ; AVX: # BB#0:
64 ; AVX-NEXT: fldt {{[0-9]+}}(%rsp)
65 ; AVX-NEXT: fsqrt
66 ; AVX-NEXT: retq
67 ;
89 ; CHECK-LABEL: finite_f80_no_estimate:
90 ; CHECK: # BB#0:
91 ; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
92 ; CHECK-NEXT: fsqrt
93 ; CHECK-NEXT: retq
6894 %call = tail call x86_fp80 @__sqrtl_finite(x86_fp80 %ld) #2
6995 ret x86_fp80 %call
7096 }
7298 ; Don't die on the impossible.
7399
74100 define x86_fp80 @finite_f80_estimate_but_no(x86_fp80 %ld) #1 {
75 ; AVX-LABEL: finite_f80_estimate_but_no:
76 ; AVX: # BB#0:
77 ; AVX-NEXT: fldt {{[0-9]+}}(%rsp)
78 ; AVX-NEXT: fsqrt
79 ; AVX-NEXT: retq
80 ;
101 ; CHECK-LABEL: finite_f80_estimate_but_no:
102 ; CHECK: # BB#0:
103 ; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
104 ; CHECK-NEXT: fsqrt
105 ; CHECK-NEXT: retq
81106 %call = tail call x86_fp80 @__sqrtl_finite(x86_fp80 %ld) #2
82107 ret x86_fp80 %call
83108 }
84109
85110 define float @f32_no_estimate(float %x) #0 {
111 ; SSE-LABEL: f32_no_estimate:
112 ; SSE: # BB#0:
113 ; SSE-NEXT: sqrtss %xmm0, %xmm1
114 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
115 ; SSE-NEXT: divss %xmm1, %xmm0
116 ; SSE-NEXT: retq
117 ;
86118 ; AVX-LABEL: f32_no_estimate:
87119 ; AVX: # BB#0:
88120 ; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
89121 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
90122 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
91123 ; AVX-NEXT: retq
92 ;
93124 %sqrt = tail call float @llvm.sqrt.f32(float %x)
94125 %div = fdiv fast float 1.0, %sqrt
95126 ret float %div
96127 }
97128
98129 define float @f32_estimate(float %x) #1 {
130 ; SSE-LABEL: f32_estimate:
131 ; SSE: # BB#0:
132 ; SSE-NEXT: rsqrtss %xmm0, %xmm1
133 ; SSE-NEXT: movaps %xmm1, %xmm2
134 ; SSE-NEXT: mulss %xmm2, %xmm2
135 ; SSE-NEXT: mulss %xmm0, %xmm2
136 ; SSE-NEXT: addss {{.*}}(%rip), %xmm2
137 ; SSE-NEXT: mulss {{.*}}(%rip), %xmm1
138 ; SSE-NEXT: mulss %xmm2, %xmm1
139 ; SSE-NEXT: movaps %xmm1, %xmm0
140 ; SSE-NEXT: retq
141 ;
99142 ; AVX-LABEL: f32_estimate:
100143 ; AVX: # BB#0:
101144 ; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm1
105148 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm1, %xmm1
106149 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
107150 ; AVX-NEXT: retq
108 ;
109151 %sqrt = tail call float @llvm.sqrt.f32(float %x)
110152 %div = fdiv fast float 1.0, %sqrt
111153 ret float %div
112154 }
113155
114156 define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 {
157 ; SSE-LABEL: v4f32_no_estimate:
158 ; SSE: # BB#0:
159 ; SSE-NEXT: sqrtps %xmm0, %xmm1
160 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
161 ; SSE-NEXT: divps %xmm1, %xmm0
162 ; SSE-NEXT: retq
163 ;
115164 ; AVX-LABEL: v4f32_no_estimate:
116165 ; AVX: # BB#0:
117166 ; AVX-NEXT: vsqrtps %xmm0, %xmm0
118167 ; AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
119168 ; AVX-NEXT: vdivps %xmm0, %xmm1, %xmm0
120169 ; AVX-NEXT: retq
121 ;
122170 %sqrt = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
123171 %div = fdiv fast <4 x float> , %sqrt
124172 ret <4 x float> %div
125173 }
126174
127175 define <4 x float> @v4f32_estimate(<4 x float> %x) #1 {
176 ; SSE-LABEL: v4f32_estimate:
177 ; SSE: # BB#0:
178 ; SSE-NEXT: rsqrtps %xmm0, %xmm1
179 ; SSE-NEXT: movaps %xmm1, %xmm2
180 ; SSE-NEXT: mulps %xmm2, %xmm2
181 ; SSE-NEXT: mulps %xmm0, %xmm2
182 ; SSE-NEXT: addps {{.*}}(%rip), %xmm2
183 ; SSE-NEXT: mulps {{.*}}(%rip), %xmm1
184 ; SSE-NEXT: mulps %xmm2, %xmm1
185 ; SSE-NEXT: movaps %xmm1, %xmm0
186 ; SSE-NEXT: retq
187 ;
128188 ; AVX-LABEL: v4f32_estimate:
129189 ; AVX: # BB#0:
130190 ; AVX-NEXT: vrsqrtps %xmm0, %xmm1
134194 ; AVX-NEXT: vmulps {{.*}}(%rip), %xmm1, %xmm1
135195 ; AVX-NEXT: vmulps %xmm0, %xmm1, %xmm0
136196 ; AVX-NEXT: retq
137 ;
138197 %sqrt = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
139198 %div = fdiv fast <4 x float> , %sqrt
140199 ret <4 x float> %div
141200 }
142201
143202 define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 {
203 ; SSE-LABEL: v8f32_no_estimate:
204 ; SSE: # BB#0:
205 ; SSE-NEXT: sqrtps %xmm1, %xmm2
206 ; SSE-NEXT: sqrtps %xmm0, %xmm3
207 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
208 ; SSE-NEXT: movaps %xmm1, %xmm0
209 ; SSE-NEXT: divps %xmm3, %xmm0
210 ; SSE-NEXT: divps %xmm2, %xmm1
211 ; SSE-NEXT: retq
212 ;
144213 ; AVX-LABEL: v8f32_no_estimate:
145214 ; AVX: # BB#0:
146215 ; AVX-NEXT: vsqrtps %ymm0, %ymm0
147216 ; AVX-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
148217 ; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0
149218 ; AVX-NEXT: retq
150 ;
151219 %sqrt = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %x)
152220 %div = fdiv fast <8 x float> , %sqrt
153221 ret <8 x float> %div
154222 }
155223
156224 define <8 x float> @v8f32_estimate(<8 x float> %x) #1 {
225 ; SSE-LABEL: v8f32_estimate:
226 ; SSE: # BB#0:
227 ; SSE-NEXT: rsqrtps %xmm0, %xmm3
228 ; SSE-NEXT: movaps {{.*#+}} xmm4 = [-5.000000e-01,-5.000000e-01,-5.000000e-01,-5.000000e-01]
229 ; SSE-NEXT: movaps %xmm3, %xmm2
230 ; SSE-NEXT: mulps %xmm2, %xmm2
231 ; SSE-NEXT: mulps %xmm0, %xmm2
232 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [-3.000000e+00,-3.000000e+00,-3.000000e+00,-3.000000e+00]
233 ; SSE-NEXT: addps %xmm0, %xmm2
234 ; SSE-NEXT: mulps %xmm4, %xmm2
235 ; SSE-NEXT: mulps %xmm3, %xmm2
236 ; SSE-NEXT: rsqrtps %xmm1, %xmm5
237 ; SSE-NEXT: movaps %xmm5, %xmm3
238 ; SSE-NEXT: mulps %xmm3, %xmm3
239 ; SSE-NEXT: mulps %xmm1, %xmm3
240 ; SSE-NEXT: addps %xmm0, %xmm3
241 ; SSE-NEXT: mulps %xmm4, %xmm3
242 ; SSE-NEXT: mulps %xmm5, %xmm3
243 ; SSE-NEXT: movaps %xmm2, %xmm0
244 ; SSE-NEXT: movaps %xmm3, %xmm1
245 ; SSE-NEXT: retq
246 ;
157247 ; AVX-LABEL: v8f32_estimate:
158248 ; AVX: # BB#0:
159249 ; AVX-NEXT: vrsqrtps %ymm0, %ymm1
163253 ; AVX-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1
164254 ; AVX-NEXT: vmulps %ymm0, %ymm1, %ymm0
165255 ; AVX-NEXT: retq
166 ;
167256 %sqrt = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %x)
168257 %div = fdiv fast <8 x float> , %sqrt
169258 ret <8 x float> %div