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AArch64: Use TTI branch functions in branch relaxation The main change is to return the code size from InsertBranch/RemoveBranch. Patch mostly by Tim Northover git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281505 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 3 years ago
36 changed file(s) with 291 addition(s) and 251 deletion(s). Raw diff Collapse all Expand all
524524 /// Remove the branching code at the end of the specific MBB.
525525 /// This is only invoked in cases where AnalyzeBranch returns success. It
526526 /// returns the number of instructions that were removed.
527 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const {
527 /// If \p BytesRemoved is non-null, report the change in code size from the
528 /// removed instructions.
529 virtual unsigned RemoveBranch(MachineBasicBlock &MBB,
530 int *BytesRemoved = nullptr) const {
528531 llvm_unreachable("Target didn't implement TargetInstrInfo::RemoveBranch!");
529532 }
530533
531 /// Insert branch code into the end of the specified MachineBasicBlock.
532 /// The operands to this method are the same as those
533 /// returned by AnalyzeBranch. This is only invoked in cases where
534 /// AnalyzeBranch returns success. It returns the number of instructions
535 /// inserted.
534 /// Insert branch code into the end of the specified MachineBasicBlock. The
535 /// operands to this method are the same as those returned by AnalyzeBranch.
536 /// This is only invoked in cases where AnalyzeBranch returns success. It
537 /// returns the number of instructions inserted. If \p BytesAdded is non-null,
538 /// report the change in code size from the added instructions.
536539 ///
537540 /// It is also invoked by tail merging to add unconditional branches in
538541 /// cases where AnalyzeBranch doesn't apply because there was no original
544547 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
545548 MachineBasicBlock *FBB,
546549 ArrayRef Cond,
547 const DebugLoc &DL) const {
550 const DebugLoc &DL,
551 int *BytesAdded = nullptr) const {
548552 llvm_unreachable("Target didn't implement TargetInstrInfo::InsertBranch!");
553 }
554
555 unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
556 MachineBasicBlock *DestBB,
557 const DebugLoc &DL,
558 int *BytesAdded = nullptr) const {
559 return InsertBranch(MBB, DestBB, nullptr,
560 ArrayRef(), DL, BytesAdded);
549561 }
550562
551563 /// Analyze the loop code, return true if it cannot be understoo. Upon
7373 void adjustBlockOffsets(MachineBasicBlock &MBB);
7474 bool isBlockInRange(const MachineInstr &MI, const MachineBasicBlock &BB) const;
7575
76 unsigned insertInvertedConditionalBranch(MachineBasicBlock &SrcBB,
77 MachineBasicBlock::iterator InsPt,
78 const DebugLoc &DL,
79 const MachineInstr &OldBr,
80 MachineBasicBlock &NewDestBB) const;
81 unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
82 MachineBasicBlock &NewDestBB,
83 const DebugLoc &DL) const;
84
8576 bool fixupConditionalBranch(MachineInstr &MI);
8677 void computeBlockSize(const MachineBasicBlock &MBB);
8778 unsigned getInstrOffset(const MachineInstr &MI) const;
127118 dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
128119 << format("size=%#x\n", BBI.Size);
129120 }
130 }
131
132 // FIXME: This is a less precise version of MachineBasicBlock::canFallThrough?
133
134 /// \returns true if the specified basic block can fallthrough
135 /// into the block immediately after it.
136 static bool hasFallthrough(const MachineBasicBlock &MBB) {
137 // Get the next machine basic block in the function.
138 MachineFunction::const_iterator MBBI(MBB);
139
140 // Can't fall off end of function.
141 auto NextBB = std::next(MBBI);
142 if (NextBB == MBB.getParent()->end())
143 return false;
144
145 return MBB.isSuccessor(&*NextBB);
146121 }
147122
148123 /// scanFunction - Do the initial scan of the function, building up
227202 // Note the new unconditional branch is not being recorded.
228203 // There doesn't seem to be meaningful DebugInfo available; this doesn't
229204 // correspond to anything in the source.
230 insertUnconditionalBranch(*OrigBB, *NewBB, DebugLoc());
205 TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc());
231206
232207 // Insert an entry into BlockInfo to align it properly with the block numbers.
233208 BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo());
292267 }
293268 }
294269
295 static unsigned getOppositeConditionOpcode(unsigned Opc) {
296 switch (Opc) {
297 default:
298 llvm_unreachable("unexpected opcode!");
299 case AArch64::TBNZW: return AArch64::TBZW;
300 case AArch64::TBNZX: return AArch64::TBZX;
301 case AArch64::TBZW: return AArch64::TBNZW;
302 case AArch64::TBZX: return AArch64::TBNZX;
303 case AArch64::CBNZW: return AArch64::CBZW;
304 case AArch64::CBNZX: return AArch64::CBZX;
305 case AArch64::CBZW: return AArch64::CBNZW;
306 case AArch64::CBZX: return AArch64::CBNZX;
307 case AArch64::Bcc: return AArch64::Bcc; // Condition is an operand for Bcc.
308 }
309 }
310
311 static inline void invertBccCondition(MachineInstr &MI) {
312 assert(MI.getOpcode() == AArch64::Bcc && "Unexpected opcode!");
313 MachineOperand &CCOp = MI.getOperand(0);
314
315 AArch64CC::CondCode CC = static_cast(CCOp.getImm());
316 CCOp.setImm(AArch64CC::getInvertedCondCode(CC));
317 }
318
319 /// Insert a conditional branch at the end of \p MBB to \p NewDestBB, using the
320 /// inverse condition of branch \p OldBr.
321 /// \returns The number of bytes added to the block.
322 unsigned AArch64BranchRelaxation::insertInvertedConditionalBranch(
323 MachineBasicBlock &SrcMBB,
324 MachineBasicBlock::iterator InsPt,
325 const DebugLoc &DL,
326 const MachineInstr &OldBr,
327 MachineBasicBlock &NewDestBB) const {
328 unsigned OppositeCondOpc = getOppositeConditionOpcode(OldBr.getOpcode());
329
330 MachineInstrBuilder MIB =
331 BuildMI(SrcMBB, InsPt, DL, TII->get(OppositeCondOpc))
332 .addOperand(OldBr.getOperand(0));
333
334 unsigned Opc = OldBr.getOpcode();
335
336 if (Opc == AArch64::TBZW || Opc == AArch64::TBNZW ||
337 Opc == AArch64::TBZX || Opc == AArch64::TBNZX)
338 MIB.addOperand(OldBr.getOperand(1));
339
340 if (OldBr.getOpcode() == AArch64::Bcc)
341 invertBccCondition(*MIB);
342
343 MIB.addMBB(&NewDestBB);
344
345 return TII->getInstSizeInBytes(*MIB);
346 }
347
348 /// Insert an unconditional branch at the end of \p MBB to \p DestBB.
349 /// \returns the number of bytes emitted.
350 unsigned AArch64BranchRelaxation::insertUnconditionalBranch(
351 MachineBasicBlock &MBB,
352 MachineBasicBlock &DestBB,
353 const DebugLoc &DL) const {
354 MachineInstr *MI = BuildMI(&MBB, DL, TII->get(AArch64::B))
355 .addMBB(&DestBB);
356
357 return TII->getInstSizeInBytes(*MI);
358 }
359
360 static void changeBranchDestBlock(MachineInstr &MI,
361 MachineBasicBlock &NewDestBB) {
362 unsigned OpNum = 0;
363 unsigned Opc = MI.getOpcode();
364
365 if (Opc != AArch64::B) {
366 OpNum = (Opc == AArch64::TBZW ||
367 Opc == AArch64::TBNZW ||
368 Opc == AArch64::TBZX ||
369 Opc == AArch64::TBNZX) ? 2 : 1;
370 }
371
372 MI.getOperand(OpNum).setMBB(&NewDestBB);
373 }
374
375270 /// fixupConditionalBranch - Fix up a conditional branch whose destination is
376271 /// too far away to fit in its displacement field. It is converted to an inverse
377272 /// conditional branch + an unconditional branch to the destination.
378273 bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
379 MachineBasicBlock *DestBB = getDestBlock(MI);
274 DebugLoc DL = MI.getDebugLoc();
275 MachineBasicBlock *MBB = MI.getParent();
276 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
277 SmallVector Cond;
278
279 bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond);
280 assert(!Fail && "branches to be relaxed must be analyzable");
281 (void)Fail;
380282
381283 // Add an unconditional branch to the destination and invert the branch
382284 // condition to jump over it:
386288 // b L1
387289 // L2:
388290
389 // If the branch is at the end of its MBB and that has a fall-through block,
390 // direct the updated conditional branch to the fall-through block. Otherwise,
391 // split the MBB before the next instruction.
392 MachineBasicBlock *MBB = MI.getParent();
393 MachineInstr *BMI = &MBB->back();
394 bool NeedSplit = (BMI != &MI) || !hasFallthrough(*MBB);
395
396 if (BMI != &MI) {
397 if (std::next(MachineBasicBlock::iterator(MI)) ==
398 std::prev(MBB->getLastNonDebugInstr()) &&
399 BMI->isUnconditionalBranch()) {
400 // Last MI in the BB is an unconditional branch. We can simply invert the
401 // condition and swap destinations:
402 // beq L1
403 // b L2
404 // =>
405 // bne L2
406 // b L1
407 MachineBasicBlock *NewDest = getDestBlock(*BMI);
408 if (isBlockInRange(MI, *NewDest)) {
409 DEBUG(dbgs() << " Invert condition and swap its destination with "
410 << *BMI);
411 changeBranchDestBlock(*BMI, *DestBB);
412
413 int NewSize =
414 insertInvertedConditionalBranch(*MBB, MI.getIterator(),
415 MI.getDebugLoc(), MI, *NewDest);
416 int OldSize = TII->getInstSizeInBytes(MI);
417 BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
418 MI.eraseFromParent();
419 return true;
420 }
421 }
422 }
423
424 if (NeedSplit) {
425 // Analyze the branch so we know how to update the successor lists.
426 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
427 SmallVector Cond;
428 bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond, false);
429 assert(!Fail && "branches to relax should be analyzable");
430 (void)Fail;
431
432 MachineBasicBlock *NewBB = splitBlockBeforeInstr(MI);
433 // No need for the branch to the next block. We're adding an unconditional
434 // branch to the destination.
435 int delta = TII->getInstSizeInBytes(MBB->back());
436 BlockInfo[MBB->getNumber()].Size -= delta;
437 MBB->back().eraseFromParent();
438 // BlockInfo[SplitBB].Offset is wrong temporarily, fixed below
291 if (FBB && isBlockInRange(MI, *FBB)) {
292 // Last MI in the BB is an unconditional branch. We can simply invert the
293 // condition and swap destinations:
294 // beq L1
295 // b L2
296 // =>
297 // bne L2
298 // b L1
299 DEBUG(dbgs() << " Invert condition and swap "
300 "its destination with " << MBB->back());
301
302 TII->ReverseBranchCondition(Cond);
303 int OldSize = 0, NewSize = 0;
304 TII->RemoveBranch(*MBB, &OldSize);
305 TII->InsertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
306
307 BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
308 return true;
309 } else if (FBB) {
310 // We need to split the basic block here to obtain two long-range
311 // unconditional branches.
312 auto &NewBB = *MF->CreateMachineBasicBlock(MBB->getBasicBlock());
313 MF->insert(++MBB->getIterator(), &NewBB);
314
315 // Insert an entry into BlockInfo to align it properly with the block
316 // numbers.
317 BlockInfo.insert(BlockInfo.begin() + NewBB.getNumber(), BasicBlockInfo());
318
319 unsigned &NewBBSize = BlockInfo[NewBB.getNumber()].Size;
320 int NewBrSize;
321 TII->insertUnconditionalBranch(NewBB, FBB, DL, &NewBrSize);
322 NewBBSize += NewBrSize;
439323
440324 // Update the successor lists according to the transformation to follow.
441325 // Do it here since if there's no split, no update is needed.
442 MBB->replaceSuccessor(FBB, NewBB);
443 NewBB->addSuccessor(FBB);
444 }
445
326 MBB->replaceSuccessor(FBB, &NewBB);
327 NewBB.addSuccessor(FBB);
328 }
329
330 // We now have an appropriate fall-through block in place (either naturally or
331 // just created), so we can invert the condition.
446332 MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB));
447333
448 DEBUG(dbgs() << " Insert B to BB#" << DestBB->getNumber()
334 DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber()
449335 << ", invert condition and change dest. to BB#"
450336 << NextBB.getNumber() << '\n');
451337
452338 unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size;
453339
454340 // Insert a new conditional branch and a new unconditional branch.
455 MBBSize += insertInvertedConditionalBranch(*MBB, MBB->end(),
456 MI.getDebugLoc(), MI, NextBB);
457
458 MBBSize += insertUnconditionalBranch(*MBB, *DestBB, MI.getDebugLoc());
459
460 // Remove the old conditional branch. It may or may not still be in MBB.
461 MBBSize -= TII->getInstSizeInBytes(MI);
462 MI.eraseFromParent();
341 int RemovedSize = 0;
342 TII->ReverseBranchCondition(Cond);
343 TII->RemoveBranch(*MBB, &RemovedSize);
344 MBBSize -= RemovedSize;
345
346 int AddedSize = 0;
347 TII->InsertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
348 MBBSize += AddedSize;
463349
464350 // Finally, keep the block offsets up to date.
465351 adjustBlockOffsets(*MBB);
297297 return false;
298298 }
299299
300 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
300 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
301 int *BytesRemoved) const {
301302 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
302303 if (I == MBB.end())
303304 return 0;
311312
312313 I = MBB.end();
313314
314 if (I == MBB.begin())
315 if (I == MBB.begin()) {
316 if (BytesRemoved)
317 *BytesRemoved = 4;
315318 return 1;
319 }
316320 --I;
317 if (!isCondBranchOpcode(I->getOpcode()))
321 if (!isCondBranchOpcode(I->getOpcode())) {
322 if (BytesRemoved)
323 *BytesRemoved = 4;
318324 return 1;
325 }
319326
320327 // Remove the branch.
321328 I->eraseFromParent();
329 if (BytesRemoved)
330 *BytesRemoved = 8;
331
322332 return 2;
323333 }
324334
343353 MachineBasicBlock *TBB,
344354 MachineBasicBlock *FBB,
345355 ArrayRef Cond,
346 const DebugLoc &DL) const {
356 const DebugLoc &DL,
357 int *BytesAdded) const {
347358 // Shouldn't be a fall through.
348359 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
349360
352363 BuildMI(&MBB, DL, get(AArch64::B)).addMBB(TBB);
353364 else
354365 instantiateCondBranch(MBB, DL, TBB, Cond);
366
367 if (BytesAdded)
368 *BytesAdded = 4;
369
355370 return 1;
356371 }
357372
358373 // Two-way conditional branch.
359374 instantiateCondBranch(MBB, DL, TBB, Cond);
360375 BuildMI(&MBB, DL, get(AArch64::B)).addMBB(FBB);
376
377 if (BytesAdded)
378 *BytesAdded = 8;
379
361380 return 2;
362381 }
363382
182182 MachineBasicBlock *&FBB,
183183 SmallVectorImpl &Cond,
184184 bool AllowModify = false) const override;
185 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
185 unsigned RemoveBranch(MachineBasicBlock &MBB,
186 int *BytesRemoved = nullptr) const override;
186187 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
187188 MachineBasicBlock *FBB, ArrayRef Cond,
188 const DebugLoc &DL) const override;
189 const DebugLoc &DL,
190 int *BytesAdded = nullptr) const override;
189191 bool
190192 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
191193 bool canInsertSelect(const MachineBasicBlock &, ArrayRef Cond,
734734 MachineBasicBlock *TBB,
735735 MachineBasicBlock *FBB,
736736 ArrayRef Cond,
737 const DebugLoc &DL) const {
737 const DebugLoc &DL,
738 int *BytesAdded) const {
738739 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
740 assert(!BytesAdded && "code size not handled");
739741
740742 if (!FBB) {
741743 if (Cond.empty()) {
775777 }
776778 }
777779
778 unsigned
779 R600InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
780 unsigned R600InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
781 int *BytesRemoved) const {
782 assert(!BytesRemoved && "code size not handled");
780783
781784 // Note : we leave PRED* instructions there.
782785 // They may be needed when predicating instructions.
168168
169169 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
170170 MachineBasicBlock *FBB, ArrayRef Cond,
171 const DebugLoc &DL) const override;
172
173 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
171 const DebugLoc &DL,
172 int *BytesAdded = nullptr) const override;
173
174 unsigned RemoveBranch(MachineBasicBlock &MBB,
175 int *BytesRemvoed = nullptr) const override;
174176
175177 bool isPredicated(const MachineInstr &MI) const override;
176178
11041104 return true;
11051105 }
11061106
1107 unsigned SIInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
1107 unsigned SIInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
1108 int *BytesRemoved) const {
11081109 MachineBasicBlock::iterator I = MBB.getFirstTerminator();
11091110
11101111 unsigned Count = 0;
1112 unsigned RemovedSize = 0;
11111113 while (I != MBB.end()) {
11121114 MachineBasicBlock::iterator Next = std::next(I);
1115 RemovedSize += getInstSizeInBytes(*I);
11131116 I->eraseFromParent();
11141117 ++Count;
11151118 I = Next;
11161119 }
1120
1121 if (BytesRemoved)
1122 *BytesRemoved = RemovedSize;
11171123
11181124 return Count;
11191125 }
11221128 MachineBasicBlock *TBB,
11231129 MachineBasicBlock *FBB,
11241130 ArrayRef Cond,
1125 const DebugLoc &DL) const {
1131 const DebugLoc &DL,
1132 int *BytesAdded) const {
11261133
11271134 if (!FBB && Cond.empty()) {
11281135 BuildMI(&MBB, DL, get(AMDGPU::S_BRANCH))
11291136 .addMBB(TBB);
1137 if (BytesAdded)
1138 *BytesAdded = 4;
11301139 return 1;
11311140 }
11321141
11381147 if (!FBB) {
11391148 BuildMI(&MBB, DL, get(Opcode))
11401149 .addMBB(TBB);
1150
1151 if (BytesAdded)
1152 *BytesAdded = 4;
11411153 return 1;
11421154 }
11431155
11471159 .addMBB(TBB);
11481160 BuildMI(&MBB, DL, get(AMDGPU::S_BRANCH))
11491161 .addMBB(FBB);
1162
1163 if (BytesAdded)
1164 *BytesAdded = 8;
11501165
11511166 return 2;
11521167 }
162162 SmallVectorImpl &Cond,
163163 bool AllowModify) const override;
164164
165 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
165 unsigned RemoveBranch(MachineBasicBlock &MBB,
166 int *BytesRemoved = nullptr) const override;
166167
167168 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
168169 MachineBasicBlock *FBB, ArrayRef Cond,
169 const DebugLoc &DL) const override;
170 const DebugLoc &DL,
171 int *BytesAdded = nullptr) const override;
170172
171173 bool ReverseBranchCondition(
172174 SmallVectorImpl &Cond) const override;
381381 }
382382
383383
384 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
384 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
385 int *BytesRemoved) const {
386 assert(!BytesRemoved && "code size not handled");
387
385388 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
386389 if (I == MBB.end())
387390 return 0;
409412 MachineBasicBlock *TBB,
410413 MachineBasicBlock *FBB,
411414 ArrayRef Cond,
412 const DebugLoc &DL) const {
415 const DebugLoc &DL,
416 int *BytesAdded) const {
417 assert(!BytesAdded && "code size not handled");
413418 ARMFunctionInfo *AFI = MBB.getParent()->getInfo();
414419 int BOpc = !AFI->isThumbFunction()
415420 ? ARM::B : (AFI->isThumb2Function() ? ARM::t2B : ARM::tB);
123123 MachineBasicBlock *&FBB,
124124 SmallVectorImpl &Cond,
125125 bool AllowModify = false) const override;
126 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
126 unsigned RemoveBranch(MachineBasicBlock &MBB,
127 int *BytesRemoved = nullptr) const override;
127128 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
128129 MachineBasicBlock *FBB, ArrayRef Cond,
129 const DebugLoc &DL) const override;
130 const DebugLoc &DL,
131 int *BytesAdded = nullptr) const override;
130132
131133 bool
132134 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
376376 MachineBasicBlock *TBB,
377377 MachineBasicBlock *FBB,
378378 ArrayRef Cond,
379 const DebugLoc &DL) const {
379 const DebugLoc &DL,
380 int *BytesAdded) const {
381 assert(!BytesAdded && "code size not handled");
382
380383 // Shouldn't be a fall through.
381384 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
382385 assert((Cond.size() == 1 || Cond.size() == 0) &&
403406 return Count;
404407 }
405408
406 unsigned AVRInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
409 unsigned AVRInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
410 int *BytesRemoved) const {
411 assert(!BytesRemoved && "code size not handled");
412
407413 MachineBasicBlock::iterator I = MBB.end();
408414 unsigned Count = 0;
409415
9595 bool AllowModify = false) const override;
9696 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
9797 MachineBasicBlock *FBB, ArrayRef Cond,
98 const DebugLoc &DL) const override;
99 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
98 const DebugLoc &DL,
99 int *BytesAdded = nullptr) const override;
100 unsigned RemoveBranch(MachineBasicBlock &MBB,
101 int *BytesRemoved = nullptr) const override;
100102 bool
101103 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
102104
133133 MachineBasicBlock *TBB,
134134 MachineBasicBlock *FBB,
135135 ArrayRef Cond,
136 const DebugLoc &DL) const {
136 const DebugLoc &DL,
137 int *BytesAdded) const {
138 assert(!BytesAdded && "code size not handled");
139
137140 // Shouldn't be a fall through.
138141 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
139142
147150 llvm_unreachable("Unexpected conditional branch");
148151 }
149152
150 unsigned BPFInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
153 unsigned BPFInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
154 int *BytesRemoved) const {
155 assert(!BytesRemoved && "code size not handled");
156
151157 MachineBasicBlock::iterator I = MBB.end();
152158 unsigned Count = 0;
153159
4848 SmallVectorImpl &Cond,
4949 bool AllowModify) const override;
5050
51 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
51 unsigned RemoveBranch(MachineBasicBlock &MBB,
52 int *BytesRemoved = nullptr) const override;
5253 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
5354 MachineBasicBlock *FBB, ArrayRef Cond,
54 const DebugLoc &DL) const override;
55 const DebugLoc &DL,
56 int *BytesAdded = nullptr) const override;
5557 };
5658 }
5759
536536 }
537537
538538
539 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
539 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
540 int *BytesRemoved) const {
541 assert(!BytesRemoved && "code size not handled");
542
540543 DEBUG(dbgs() << "\nRemoving branches out of BB#" << MBB.getNumber());
541544 MachineBasicBlock::iterator I = MBB.end();
542545 unsigned Count = 0;
560563 MachineBasicBlock *TBB,
561564 MachineBasicBlock *FBB,
562565 ArrayRef Cond,
563 const DebugLoc &DL) const {
566 const DebugLoc &DL,
567 int *BytesAdded) const {
564568 unsigned BOpc = Hexagon::J2_jump;
565569 unsigned BccOpc = Hexagon::J2_jumpt;
566570 assert(validateBranchCond(Cond) && "Invalid branching condition");
567571 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
572 assert(!BytesAdded && "code size not handled");
568573
569574 // Check if ReverseBranchCondition has asked to reverse this branch
570575 // If we want to reverse the branch an odd number of times, we want
8686 /// Remove the branching code at the end of the specific MBB.
8787 /// This is only invoked in cases where AnalyzeBranch returns success. It
8888 /// returns the number of instructions that were removed.
89 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
89 unsigned RemoveBranch(MachineBasicBlock &MBB,
90 int *BytesRemoved = nullptr) const override;
9091
9192 /// Insert branch code into the end of the specified MachineBasicBlock.
9293 /// The operands to this method are the same as those
100101 /// merging needs to be disabled.
101102 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
102103 MachineBasicBlock *FBB, ArrayRef Cond,
103 const DebugLoc &DL) const override;
104 const DebugLoc &DL,
105 int *BytesAdded = nullptr) const override;
104106
105107 /// Analyze the loop code, return true if it cannot be understood. Upon
106108 /// success, this function returns false and returns information about the
661661 MachineBasicBlock *TrueBlock,
662662 MachineBasicBlock *FalseBlock,
663663 ArrayRef Condition,
664 const DebugLoc &DL) const {
664 const DebugLoc &DL,
665 int *BytesAdded) const {
665666 // Shouldn't be a fall through.
666667 assert(TrueBlock && "InsertBranch must not be told to insert a fallthrough");
668 assert(!BytesAdded && "code size not handled");
667669
668670 // If condition is empty then an unconditional branch is being inserted.
669671 if (Condition.empty()) {
687689 return 2;
688690 }
689691
690 unsigned LanaiInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
692 unsigned LanaiInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
693 int *BytesRemoved) const {
694 assert(!BytesRemoved && "code size not handled");
695
691696 MachineBasicBlock::iterator Instruction = MBB.end();
692697 unsigned Count = 0;
693698
8585 SmallVectorImpl &Condition,
8686 bool AllowModify) const override;
8787
88 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
88 unsigned RemoveBranch(MachineBasicBlock &MBB,
89 int *BytesRemoved = nullptr) const override;
8990
9091 // For a comparison instruction, return the source registers in SrcReg and
9192 // SrcReg2 if having two register operands, and the value it compares against
134135 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock,
135136 MachineBasicBlock *FalseBlock,
136137 ArrayRef Condition,
137 const DebugLoc &DL) const override;
138 const DebugLoc &DL,
139 int *BytesAdded = nullptr) const override;
138140 };
139141
140142 static inline bool isSPLSOpcode(unsigned Opcode) {
103103 .addReg(SrcReg, getKillRegState(KillSrc));
104104 }
105105
106 unsigned MSP430InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
106 unsigned MSP430InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
107 int *BytesRemoved) const {
108 assert(!BytesRemoved && "code size not handled");
109
107110 MachineBasicBlock::iterator I = MBB.end();
108111 unsigned Count = 0;
109112
263266 MachineBasicBlock *TBB,
264267 MachineBasicBlock *FBB,
265268 ArrayRef Cond,
266 const DebugLoc &DL) const {
269 const DebugLoc &DL,
270 int *BytesAdded) const {
267271 // Shouldn't be a fall through.
268272 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
269273 assert((Cond.size() == 1 || Cond.size() == 0) &&
270274 "MSP430 branch conditions have one component!");
275 assert(!BytesAdded && "code size not handled");
271276
272277 if (Cond.empty()) {
273278 // Unconditional branch?
7878 SmallVectorImpl &Cond,
7979 bool AllowModify) const override;
8080
81 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
81 unsigned RemoveBranch(MachineBasicBlock &MBB,
82 int *BytesRemoved = nullptr) const override;
8283 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
8384 MachineBasicBlock *FBB, ArrayRef Cond,
84 const DebugLoc &DL) const override;
85 const DebugLoc &DL,
86 int *BytesAdded = nullptr) const override;
8587 };
8688
8789 }
116116 MachineBasicBlock *TBB,
117117 MachineBasicBlock *FBB,
118118 ArrayRef Cond,
119 const DebugLoc &DL) const {
119 const DebugLoc &DL,
120 int *BytesAdded) const {
120121 // Shouldn't be a fall through.
121122 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
123 assert(!BytesAdded && "code size not handled");
122124
123125 // # of condition operands:
124126 // Unconditional branches: 0
144146 return 1;
145147 }
146148
147 unsigned MipsInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
149 unsigned MipsInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
150 int *BytesRemoved) const {
151 assert(!BytesRemoved && "code size not handled");
152
148153 MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
149154 unsigned removed;
150155
5454 SmallVectorImpl &Cond,
5555 bool AllowModify) const override;
5656
57 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
57 unsigned RemoveBranch(MachineBasicBlock &MBB,
58 int *BytesRemoved = nullptr) const override;
5859
5960 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
6061 MachineBasicBlock *FBB, ArrayRef Cond,
61 const DebugLoc &DL) const override;
62 const DebugLoc &DL,
63 int *BytesAdded = nullptr) const override;
6264
6365 bool
6466 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
204204 return true;
205205 }
206206
207 unsigned NVPTXInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
207 unsigned NVPTXInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
208 int *BytesRemoved) const {
209 assert(!BytesRemoved && "code size not handled");
208210 MachineBasicBlock::iterator I = MBB.end();
209211 if (I == MBB.begin())
210212 return 0;
232234 MachineBasicBlock *TBB,
233235 MachineBasicBlock *FBB,
234236 ArrayRef Cond,
235 const DebugLoc &DL) const {
237 const DebugLoc &DL,
238 int *BytesAdded) const {
239 assert(!BytesAdded && "code size not handled");
240
236241 // Shouldn't be a fall through.
237242 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
238243 assert((Cond.size() == 1 || Cond.size() == 0) &&
6262 MachineBasicBlock *&FBB,
6363 SmallVectorImpl &Cond,
6464 bool AllowModify) const override;
65 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
65 unsigned RemoveBranch(MachineBasicBlock &MBB,
66 int *BytesRemoved = nullptr) const override;
6667 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
6768 MachineBasicBlock *FBB, ArrayRef Cond,
68 const DebugLoc &DL) const override;
69 const DebugLoc &DL,
70 int *BytesAdded = nullptr) const override;
6971 unsigned getLdStCodeAddrSpace(const MachineInstr &MI) const {
7072 return MI.getOperand(2).getImm();
7173 }
604604 return true;
605605 }
606606
607 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
607 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
608 int *BytesRemoved) const {
609 assert(!BytesRemoved && "code size not handled");
610
608611 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
609612 if (I == MBB.end())
610613 return 0;
637640 MachineBasicBlock *TBB,
638641 MachineBasicBlock *FBB,
639642 ArrayRef Cond,
640 const DebugLoc &DL) const {
643 const DebugLoc &DL,
644 int *BytesAdded) const {
641645 // Shouldn't be a fall through.
642646 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
643647 assert((Cond.size() == 2 || Cond.size() == 0) &&
644648 "PPC branch conditions have two components!");
649 assert(!BytesAdded && "code size not handled");
645650
646651 bool isPPC64 = Subtarget.isPPC64();
647652
167167 MachineBasicBlock *&FBB,
168168 SmallVectorImpl &Cond,
169169 bool AllowModify) const override;
170 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
170 unsigned RemoveBranch(MachineBasicBlock &MBB,
171 int *BytesRemoved = nullptr) const override;
171172 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
172173 MachineBasicBlock *FBB, ArrayRef Cond,
173 const DebugLoc &DL) const override;
174 const DebugLoc &DL,
175 int *BytesAdded = nullptr) const override;
174176
175177 // Select analysis.
176178 bool canInsertSelect(const MachineBasicBlock &, ArrayRef Cond,
243243 MachineBasicBlock *TBB,
244244 MachineBasicBlock *FBB,
245245 ArrayRef Cond,
246 const DebugLoc &DL) const {
246 const DebugLoc &DL,
247 int *BytesAdded) const {
247248 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
248249 assert((Cond.size() == 1 || Cond.size() == 0) &&
249250 "Sparc branch conditions should have one component!");
251 assert(!BytesAdded && "code size not handled");
250252
251253 if (Cond.empty()) {
252254 assert(!FBB && "Unconditional branch with multiple successors!");
268270 return 2;
269271 }
270272
271 unsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const
272 {
273 unsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
274 int *BytesRemoved) const {
275 assert(!BytesRemoved && "code size not handled");
276
273277 MachineBasicBlock::iterator I = MBB.end();
274278 unsigned Count = 0;
275279 while (I != MBB.begin()) {
6969 SmallVectorImpl &Cond,
7070 bool AllowModify = false) const override;
7171
72 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
72 unsigned RemoveBranch(MachineBasicBlock &MBB,
73 int *BytesRemoved = nullptr) const override;
7374
7475 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
7576 MachineBasicBlock *FBB, ArrayRef Cond,
76 const DebugLoc &DL) const override;
77 const DebugLoc &DL,
78 int *BytesAdded = nullptr) const override;
7779
7880 bool
7981 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
362362 return false;
363363 }
364364
365 unsigned SystemZInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
365 unsigned SystemZInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
366 int *BytesRemoved) const {
367 assert(!BytesRemoved && "code size not handled");
368
366369 // Most of the code and comments here are boilerplate.
367370 MachineBasicBlock::iterator I = MBB.end();
368371 unsigned Count = 0;
395398 MachineBasicBlock *TBB,
396399 MachineBasicBlock *FBB,
397400 ArrayRef Cond,
398 const DebugLoc &DL) const {
401 const DebugLoc &DL,
402 int *BytesAdded) const {
399403 // In this function we output 32-bit branches, which should always
400404 // have enough range. They can be shortened and relaxed by later code
401405 // in the pipeline, if desired.
404408 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
405409 assert((Cond.size() == 2 || Cond.size() == 0) &&
406410 "SystemZ branch conditions have one component!");
411 assert(!BytesAdded && "code size not handled");
407412
408413 if (Cond.empty()) {
409414 // Unconditional branch?
163163 MachineBasicBlock *&FBB,
164164 SmallVectorImpl &Cond,
165165 bool AllowModify) const override;
166 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
166 unsigned RemoveBranch(MachineBasicBlock &MBB,
167 int *BytesRemoved = nullptr) const override;
167168 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
168169 MachineBasicBlock *FBB, ArrayRef Cond,
169 const DebugLoc &DL) const override;
170 const DebugLoc &DL,
171 int *BytesAdded = nullptr) const override;
170172 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
171173 unsigned &SrcReg2, int &Mask, int &Value) const override;
172174 bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
141141 return false;
142142 }
143143
144 unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
144 unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
145 int *BytesRemoved) const {
146 assert(!BytesRemoved && "code size not handled");
147
145148 MachineBasicBlock::instr_iterator I = MBB.instr_end();
146149 unsigned Count = 0;
147150
164167 MachineBasicBlock *TBB,
165168 MachineBasicBlock *FBB,
166169 ArrayRef Cond,
167 const DebugLoc &DL) const {
170 const DebugLoc &DL,
171 int *BytesAdded) const {
172 assert(!BytesAdded && "code size not handled");
173
168174 if (Cond.empty()) {
169175 if (!TBB)
170176 return 0;
4747 MachineBasicBlock *&FBB,
4848 SmallVectorImpl &Cond,
4949 bool AllowModify = false) const override;
50 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
50 unsigned RemoveBranch(MachineBasicBlock &MBB,
51 int *BytesRemoved = nullptr) const override;
5152 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
5253 MachineBasicBlock *FBB, ArrayRef Cond,
53 const DebugLoc &DL) const override;
54 const DebugLoc &DL,
55 int *BytesAdded = nullptr) const override;
5456 bool
5557 ReverseBranchCondition(SmallVectorImpl &Cond) const override;
5658 };
44404440 return true;
44414441 }
44424442
4443 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
4443 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
4444 int *BytesRemoved) const {
4445 assert(!BytesRemoved && "code size not handled");
4446
44444447 MachineBasicBlock::iterator I = MBB.end();
44454448 unsigned Count = 0;
44464449
44644467 MachineBasicBlock *TBB,
44654468 MachineBasicBlock *FBB,
44664469 ArrayRef Cond,
4467 const DebugLoc &DL) const {
4470 const DebugLoc &DL,
4471 int *BytesAdded) const {
44684472 // Shouldn't be a fall through.
44694473 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
44704474 assert((Cond.size() == 1 || Cond.size() == 0) &&
44714475 "X86 branch conditions have one component!");
4476 assert(!BytesAdded && "code size not handled");
44724477
44734478 if (Cond.empty()) {
44744479 // Unconditional branch?
334334 TargetInstrInfo::MachineBranchPredicate &MBP,
335335 bool AllowModify = false) const override;
336336
337 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
337 unsigned RemoveBranch(MachineBasicBlock &MBB,
338 int *BytesRemoved = nullptr) const override;
338339 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
339340 MachineBasicBlock *FBB, ArrayRef Cond,
340 const DebugLoc &DL) const override;
341 const DebugLoc &DL,
342 int *BytesAdded = nullptr) const override;
341343 bool canInsertSelect(const MachineBasicBlock&, ArrayRef Cond,
342344 unsigned, unsigned, int&, int&, int&) const override;
343345 void insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
272272 MachineBasicBlock *TBB,
273273 MachineBasicBlock *FBB,
274274 ArrayRef Cond,
275 const DebugLoc &DL) const {
275 const DebugLoc &DL,
276 int *BytesAdded) const {
276277 // Shouldn't be a fall through.
277278 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
278279 assert((Cond.size() == 2 || Cond.size() == 0) &&
279280 "Unexpected number of components!");
280
281 assert(!BytesAdded && "code size not handled");
282
281283 if (!FBB) { // One way branch.
282284 if (Cond.empty()) {
283285 // Unconditional branch
301303 }
302304
303305 unsigned
304 XCoreInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
306 XCoreInstrInfo::RemoveBranch(MachineBasicBlock &MBB, int *BytesRemoved) const {
307 assert(!BytesRemoved && "code size not handled");
308
305309 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
306310 if (I == MBB.end())
307311 return 0;
5656
5757 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
5858 MachineBasicBlock *FBB, ArrayRef Cond,
59 const DebugLoc &DL) const override;
59 const DebugLoc &DL,
60 int *BytesAdded = nullptr) const override;
6061
61 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
62 unsigned RemoveBranch(MachineBasicBlock &MBB,
63 int *BytesRemoved = nullptr) const override;
6264
6365 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
6466 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,