llvm.org GIT mirror llvm / ab21db7
rename indbr -> indirectbr to appease the residents of #llvm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 10 years ago
21 changed file(s) with 110 addition(s) and 108 deletion(s). Raw diff Collapse all Expand all
110110
  • 'ret' Instruction
  • 111111
  • 'br' Instruction
  • 112112
  • 'switch' Instruction
  • 113
  • 'indbr' Instruction
  • 113
  • 'indirectbr' Instruction
  • 114114
  • 'invoke' Instruction
  • 115115
  • 'unwind' Instruction
  • 116116
  • 'unreachable' Instruction
  • 21822182 the address of the entry block is illegal.

    21832183
    21842184

    This value only has defined behavior when used as an operand to the

    2185 'indbr' instruction or for comparisons
    2185 'indirectbr' instruction or for comparisons
    21862186 against null. Pointer equality tests between labels addresses is undefined
    21872187 behavior - though, again, comparison against null is ok, and no label is
    21882188 equal to the null pointer. This may also be passed around as an opaque
    21892189 pointer sized value as long as the bits are not inspected. This allows
    21902190 ptrtoint and arithmetic to be performed on these values so long as
    2191 the original value is reconstituted before the indbr.

    2191 the original value is reconstituted before the indirectbr.

    21922192
    21932193

    Finally, some targets may provide defined semantics when

    21942194 using the value as the operand to an inline assembly, but that is target
    25402540 'ret' instruction, the
    25412541 'br' instruction, the
    25422542 'switch' instruction, the
    2543 ''indbr' Instruction, the
    2543 ''indirectbr' Instruction, the
    25442544 'invoke' instruction, the
    25452545 'unwind' instruction, and the
    25462546 'unreachable' instruction.

    27022702
    27032703
    27042704
    2705 'indbr' Instruction
    2706
    2707
    2708
    2709
    2710
    Syntax:
    2711
    
                      
                    
    2712 indbr <somety>* <address>, [ label <dest1>, label <dest2>, ... ]
    2713
    2714
    2715
    Overview:
    2716
    2717

    The 'indbr' instruction implements an indirect branch to a label

    2705 'indirectbr' Instruction
    2706
    2707
    2708
    2709
    2710
    Syntax:
    2711
    
                      
                    
    2712 indirectbr <somety>* <address>, [ label <dest1>, label <dest2>, ... ]
    2713
    2714
    2715
    Overview:
    2716
    2717

    The 'indirectbr' instruction implements an indirect branch to a label

    27182718 within the current function, whose address is specified by
    27192719 "address". Address must be derived from a
    27202720 href="#blockaddress">blockaddress constant.

    27422742
    27432743
    Example:
    27442744
    
                      
                    
    2745 indbr i8* %Addr, [ label %bb1, label %bb2, label %bb3 ]
    2745 indirectbr i8* %Addr, [ label %bb1, label %bb2, label %bb3 ]
    27462746
    27472747
    27482748
    236236 // new select on i1 or [N x i1]
    237237 FUNC_CODE_INST_VSELECT = 29, // VSELECT: [ty,opval,opval,predty,pred]
    238238 FUNC_CODE_INST_INBOUNDS_GEP= 30, // INBOUNDS_GEP: [n x operands]
    239 FUNC_CODE_INST_INDBR = 31 // INDBR: [opty, op0, op1, ...]
    239 FUNC_CODE_INST_INDIRECTBR = 31 // INDIRECTBR: [opty, op0, op1, ...]
    240240 };
    241241 } // End bitc namespace
    242242 } // End llvm namespace
    9696 HANDLE_TERM_INST ( 1, Ret , ReturnInst)
    9797 HANDLE_TERM_INST ( 2, Br , BranchInst)
    9898 HANDLE_TERM_INST ( 3, Switch , SwitchInst)
    99 HANDLE_TERM_INST ( 4, IndBr , IndBrInst)
    99 HANDLE_TERM_INST ( 4, IndirectBr , IndirectBrInst)
    100100 HANDLE_TERM_INST ( 5, Invoke , InvokeInst)
    101101 HANDLE_TERM_INST ( 6, Unwind , UnwindInst)
    102102 HANDLE_TERM_INST ( 7, Unreachable, UnreachableInst)
    22192219
    22202220
    22212221 //===----------------------------------------------------------------------===//
    2222 // IndBrInst Class
    2222 // IndirectBrInst Class
    22232223 //===----------------------------------------------------------------------===//
    22242224
    22252225 //===---------------------------------------------------------------------------
    2226 /// IndBrInst - Indirect Branch Instruction.
    2226 /// IndirectBrInst - Indirect Branch Instruction.
    22272227 ///
    2228 class IndBrInst : public TerminatorInst {
    2228 class IndirectBrInst : public TerminatorInst {
    22292229 void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
    22302230 unsigned ReservedSpace;
    22312231 // Operand[0] = Value to switch on
    22322232 // Operand[1] = Default basic block destination
    22332233 // Operand[2n ] = Value to match
    22342234 // Operand[2n+1] = BasicBlock to go to on match
    2235 IndBrInst(const IndBrInst &IBI);
    2235 IndirectBrInst(const IndirectBrInst &IBI);
    22362236 void init(Value *Address, unsigned NumDests);
    22372237 void resizeOperands(unsigned No);
    22382238 // allocate space for exactly zero operands
    22392239 void *operator new(size_t s) {
    22402240 return User::operator new(s, 0);
    22412241 }
    2242 /// IndBrInst ctor - Create a new indbr instruction, specifying an Address to
    2243 /// jump to. The number of expected destinations can be specified here to
    2244 /// make memory allocation more efficient. This constructor can also
    2242 /// IndirectBrInst ctor - Create a new indirectbr instruction, specifying an
    2243 /// Address to jump to. The number of expected destinations can be specified
    2244 /// here to make memory allocation more efficient. This constructor can also
    22452245 /// autoinsert before another instruction.
    2246 IndBrInst(Value *Address, unsigned NumDests, Instruction *InsertBefore);
    2246 IndirectBrInst(Value *Address, unsigned NumDests, Instruction *InsertBefore);
    22472247
    2248 /// IndBrInst ctor - Create a new indbr instruction, specifying an Address to
    2249 /// jump to. The number of expected destinations can be specified here to
    2250 /// make memory allocation more efficient. This constructor also autoinserts
    2251 /// at the end of the specified BasicBlock.
    2252 IndBrInst(Value *Address, unsigned NumDests, BasicBlock *InsertAtEnd);
    2253 protected:
    2254 virtual IndBrInst *clone_impl() const;
    2255 public:
    2256 static IndBrInst *Create(Value *Address, unsigned NumDests,
    2257 Instruction *InsertBefore = 0) {
    2258 return new IndBrInst(Address, NumDests, InsertBefore);
    2259 }
    2260 static IndBrInst *Create(Value *Address, unsigned NumDests,
    2261 BasicBlock *InsertAtEnd) {
    2262 return new IndBrInst(Address, NumDests, InsertAtEnd);
    2263 }
    2264 ~IndBrInst();
    2248 /// IndirectBrInst ctor - Create a new indirectbr instruction, specifying an
    2249 /// Address to jump to. The number of expected destinations can be specified
    2250 /// here to make memory allocation more efficient. This constructor also
    2251 /// autoinserts at the end of the specified BasicBlock.
    2252 IndirectBrInst(Value *Address, unsigned NumDests, BasicBlock *InsertAtEnd);
    2253 protected:
    2254 virtual IndirectBrInst *clone_impl() const;
    2255 public:
    2256 static IndirectBrInst *Create(Value *Address, unsigned NumDests,
    2257 Instruction *InsertBefore = 0) {
    2258 return new IndirectBrInst(Address, NumDests, InsertBefore);
    2259 }
    2260 static IndirectBrInst *Create(Value *Address, unsigned NumDests,
    2261 BasicBlock *InsertAtEnd) {
    2262 return new IndirectBrInst(Address, NumDests, InsertAtEnd);
    2263 }
    2264 ~IndirectBrInst();
    22652265
    22662266 /// Provide fast operand accessors.
    22672267 DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value);
    22682268
    2269 // Accessor Methods for IndBr instruction.
    2269 // Accessor Methods for IndirectBrInst instruction.
    22702270 Value *getAddress() { return getOperand(0); }
    22712271 const Value *getAddress() const { return getOperand(0); }
    22722272 void setAddress(Value *V) { setOperand(0, V); }
    22732273
    22742274
    22752275 /// getNumDestinations - return the number of possible destinations in this
    2276 /// indbr instruction.
    2276 /// indirectbr instruction.
    22772277 unsigned getNumDestinations() const { return getNumOperands()-1; }
    22782278
    22792279 /// getDestination - Return the specified destination.
    22852285 void addDestination(BasicBlock *Dest);
    22862286
    22872287 /// removeDestination - This method removes the specified successor from the
    2288 /// indbr instruction.
    2288 /// indirectbr instruction.
    22892289 void removeDestination(unsigned i);
    22902290
    22912291 unsigned getNumSuccessors() const { return getNumOperands()-1; }
    22972297 }
    22982298
    22992299 // Methods for support type inquiry through isa, cast, and dyn_cast:
    2300 static inline bool classof(const IndBrInst *) { return true; }
    2301 static inline bool classof(const Instruction *I) {
    2302 return I->getOpcode() == Instruction::IndBr;
    2300 static inline bool classof(const IndirectBrInst *) { return true; }
    2301 static inline bool classof(const Instruction *I) {
    2302 return I->getOpcode() == Instruction::IndirectBr;
    23032303 }
    23042304 static inline bool classof(const Value *V) {
    23052305 return isa(V) && classof(cast(V));
    23112311 };
    23122312
    23132313 template <>
    2314 struct OperandTraits : public HungoffOperandTraits<1> {
    2315 };
    2316
    2317 DEFINE_TRANSPARENT_OPERAND_ACCESSORS(IndBrInst, Value)
    2314 struct OperandTraits : public HungoffOperandTraits<1> {
    2315 };
    2316
    2317 DEFINE_TRANSPARENT_OPERAND_ACCESSORS(IndirectBrInst, Value)
    23182318
    23192319
    23202320 //===----------------------------------------------------------------------===//
    159159 RetTy visitReturnInst(ReturnInst &I) { DELEGATE(TerminatorInst);}
    160160 RetTy visitBranchInst(BranchInst &I) { DELEGATE(TerminatorInst);}
    161161 RetTy visitSwitchInst(SwitchInst &I) { DELEGATE(TerminatorInst);}
    162 RetTy visitIndBrInst(IndBrInst &I) { DELEGATE(TerminatorInst);}
    162 RetTy visitIndirectBrInst(IndirectBrInst &I) { DELEGATE(TerminatorInst);}
    163163 RetTy visitInvokeInst(InvokeInst &I) { DELEGATE(TerminatorInst);}
    164164 RetTy visitUnwindInst(UnwindInst &I) { DELEGATE(TerminatorInst);}
    165165 RetTy visitUnreachableInst(UnreachableInst &I) { DELEGATE(TerminatorInst);}
    3030 // Eliminating a switch is a big win, proportional to the number of edges
    3131 // deleted.
    3232 Reduction += (SI->getNumSuccessors()-1) * 40;
    33 else if (isaBrInst>(*UI))
    33 else if (isairectBrInst>(*UI))
    3434 // Eliminating an indirect branch is a big win.
    3535 Reduction += 200;
    3636 else if (CallInst *CI = dyn_cast(*UI)) {
    165165 return;
    166166 }
    167167
    168 if (isaBrInst>(TI)) {
    168 if (isairectBrInst>(TI)) {
    169169 Succs.assign(Succs.size(), true);
    170170 return;
    171171 }
    644644 INSTKEYWORD(ret, Ret);
    645645 INSTKEYWORD(br, Br);
    646646 INSTKEYWORD(switch, Switch);
    647 INSTKEYWORD(indbr, IndBr);
    647 INSTKEYWORD(indirectbr, IndirectBr);
    648648 INSTKEYWORD(invoke, Invoke);
    649649 INSTKEYWORD(unwind, Unwind);
    650650 INSTKEYWORD(unreachable, Unreachable);
    27302730 case lltok::kw_ret: return ParseRet(Inst, BB, PFS);
    27312731 case lltok::kw_br: return ParseBr(Inst, PFS);
    27322732 case lltok::kw_switch: return ParseSwitch(Inst, PFS);
    2733 case lltok::kw_indbr: return ParseIndBr(Inst, PFS);
    2733 case lltok::kw_indirectbr: return ParseIndirectBr(Inst, PFS);
    27342734 case lltok::kw_invoke: return ParseInvoke(Inst, PFS);
    27352735 // Binary Operators.
    27362736 case lltok::kw_add:
    30033003 return false;
    30043004 }
    30053005
    3006 /// ParseIndBr
    3006 /// ParseIndirectBr
    30073007 /// Instruction
    3008 /// ::= 'indbr' TypeAndValue ',' '[' LabelList ']'
    3009 bool LLParser::ParseIndBr(Instruction *&Inst, PerFunctionState &PFS) {
    3008 /// ::= 'indirectbr' TypeAndValue ',' '[' LabelList ']'
    3009 bool LLParser::ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS) {
    30103010 LocTy AddrLoc;
    30113011 Value *Address;
    30123012 if (ParseTypeAndValue(Address, AddrLoc, PFS) ||
    3013 ParseToken(lltok::comma, "expected ',' after indbr address") ||
    3014 ParseToken(lltok::lsquare, "expected '[' with indbr"))
    3013 ParseToken(lltok::comma, "expected ',' after indirectbr address") ||
    3014 ParseToken(lltok::lsquare, "expected '[' with indirectbr"))
    30153015 return true;
    30163016
    30173017 if (!isa(Address->getType()))
    3018 return Error(AddrLoc, "indbr address must have pointer type");
    3018 return Error(AddrLoc, "indirectbr address must have pointer type");
    30193019
    30203020 // Parse the destination list.
    30213021 SmallVector DestList;
    30363036 if (ParseToken(lltok::rsquare, "expected ']' at end of block list"))
    30373037 return true;
    30383038
    3039 IndBrInst *IBI = IndBrInst::Create(Address, DestList.size());
    3039 IndirectBrInst *IBI = IndirectBrInst::Create(Address, DestList.size());
    30403040 for (unsigned i = 0, e = DestList.size(); i != e; ++i)
    30413041 IBI->addDestination(DestList[i]);
    30423042 Inst = IBI;
    269269 bool ParseRet(Instruction *&Inst, BasicBlock *BB, PerFunctionState &PFS);
    270270 bool ParseBr(Instruction *&Inst, PerFunctionState &PFS);
    271271 bool ParseSwitch(Instruction *&Inst, PerFunctionState &PFS);
    272 bool ParseIndBr(Instruction *&Inst, PerFunctionState &PFS);
    272 bool ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS);
    273273 bool ParseInvoke(Instruction *&Inst, PerFunctionState &PFS);
    274274
    275275 bool ParseArithmetic(Instruction *&I, PerFunctionState &PFS, unsigned Opc,
    110110 kw_fptoui, kw_fptosi, kw_inttoptr, kw_ptrtoint, kw_bitcast,
    111111 kw_select, kw_va_arg,
    112112
    113 kw_ret, kw_br, kw_switch, kw_indbr, kw_invoke, kw_unwind, kw_unreachable,
    113 kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_unwind,
    114 kw_unreachable,
    114115
    115116 kw_malloc, kw_alloca, kw_free, kw_load, kw_store, kw_getelementptr,
    116117
    19741974 I = SI;
    19751975 break;
    19761976 }
    1977 case bitc::FUNC_CODE_INST_INDBR: { // INDBR: [opty, op0, op1, ...]
    1977 case bitc::FUNC_CODE_INST_INDIRECTBR: { // INDIRECTBR: [opty, op0, op1, ...]
    19781978 if (Record.size() < 2)
    1979 return Error("Invalid INDBR record");
    1979 return Error("Invalid INDIRECTBR record");
    19801980 const Type *OpTy = getTypeByID(Record[0]);
    19811981 Value *Address = getFnValueByID(Record[1], OpTy);
    19821982 if (OpTy == 0 || Address == 0)
    1983 return Error("Invalid INDBR record");
    1983 return Error("Invalid INDIRECTBR record");
    19841984 unsigned NumDests = Record.size()-2;
    1985 IndBrInst *IBI = IndBrInst::Create(Address, NumDests);
    1985 IndirectBrInst *IBI = IndirectBrInst::Create(Address, NumDests);
    19861986 InstructionList.push_back(IBI);
    19871987 for (unsigned i = 0, e = NumDests; i != e; ++i) {
    19881988 if (BasicBlock *DestBB = getBasicBlock(Record[2+i])) {
    19891989 IBI->addDestination(DestBB);
    19901990 } else {
    19911991 delete IBI;
    1992 return Error("Invalid INDBR record!");
    1992 return Error("Invalid INDIRECTBR record!");
    19931993 }
    19941994 }
    19951995 I = IBI;
    10141014 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
    10151015 Vals.push_back(VE.getValueID(I.getOperand(i)));
    10161016 break;
    1017 case Instruction::IndBr:
    1018 Code = bitc::FUNC_CODE_INST_INDBR;
    1017 case Instruction::IndirectBr:
    1018 Code = bitc::FUNC_CODE_INST_INDIRECTBR;
    10191019 Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
    10201020 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
    10211021 Vals.push_back(VE.getValueID(I.getOperand(i)));
    21302130 }
    21312131 }
    21322132
    2133 void SelectionDAGLowering::visitIndBr(IndBrInst &I) {
    2133 void SelectionDAGLowering::visitIndirectBr(IndirectBrInst &I) {
    21342134 // Update machine-CFG edges.
    21352135 for (unsigned i = 0, e = I.getNumSuccessors(); i != e; ++i)
    21362136 CurMBB->addSuccessor(FuncInfo.MBBMap[I.getSuccessor(i)]);
    4848 class GCFunctionInfo;
    4949 class ICmpInst;
    5050 class IntToPtrInst;
    51 class IndBrInst;
    51 class IndirectBrInst;
    5252 class InvokeInst;
    5353 class InsertElementInst;
    5454 class InsertValueInst;
    448448 void visitRet(ReturnInst &I);
    449449 void visitBr(BranchInst &I);
    450450 void visitSwitch(SwitchInst &I);
    451 void visitIndBr(IndBrInst &I);
    451 void visitIndirectBr(IndirectBrInst &I);
    452452 void visitUnreachable(UnreachableInst &I) { /* noop */ }
    453453
    454454 // Helpers for visitSwitch
    281281 void visitReturnInst(ReturnInst &I);
    282282 void visitBranchInst(BranchInst &I);
    283283 void visitSwitchInst(SwitchInst &I);
    284 void visitIndBrInst(IndBrInst &I);
    284 void visitIndirectBrInst(IndirectBrInst &I);
    285285 void visitInvokeInst(InvokeInst &I) {
    286286 llvm_unreachable("Lowerinvoke pass didn't work!");
    287287 }
    25782578 Out << " }\n";
    25792579 }
    25802580
    2581 void CWriter::visitIndBrInst(IndBrInst &IBI) {
    2581 void CWriter::visitIndirectBrInst(IndirectBrInst &IBI) {
    25822582 Out << " goto *(void*)(";
    25832583 writeOperand(IBI.getOperand(0));
    25842584 Out << ");\n";
    11311131 }
    11321132 break;
    11331133 }
    1134 case Instruction::IndBr: {
    1135 const IndBrInst *IBI = cast(I);
    1136 Out << "IndBrInst *" << iName << " = IndBrInst::Create("
    1134 case Instruction::IndirectBr: {
    1135 const IndirectBrInst *IBI = cast(I);
    1136 Out << "IndirectBrInst *" << iName << " = IndirectBrInst::Create("
    11371137 << opNames[0] << ", " << IBI->getNumDestinations() << ");";
    11381138 nl(Out);
    11391139 for (unsigned i = 1; i != IBI->getNumOperands(); ++i) {
    18451845 writeOperand(I.getOperand(op+1), true);
    18461846 }
    18471847 Out << "\n ]";
    1848 } else if (isa(I)) {
    1849 // Special case indbr instruction to get formatting nice and correct.
    1848 } else if (isa(I)) {
    1849 // Special case indirectbr instruction to get formatting nice and correct.
    18501850 Out << ' ';
    18511851 writeOperand(Operand, true);
    18521852 Out << ", ";
    102102 case Ret: return "ret";
    103103 case Br: return "br";
    104104 case Switch: return "switch";
    105 case IndBr: return "indbr";
    105 case IndirectBr: return "indirectbr";
    106106 case Invoke: return "invoke";
    107107 case Unwind: return "unwind";
    108108 case Unreachable: return "unreachable";
    30893089 // SwitchInst Implementation
    30903090 //===----------------------------------------------------------------------===//
    30913091
    3092 void IndBrInst::init(Value *Address, unsigned NumDests) {
    3092 void IndirectBrInst::init(Value *Address, unsigned NumDests) {
    30933093 assert(Address);
    30943094 ReservedSpace = 1+NumDests;
    30953095 NumOperands = 1;
    31063106 /// 2. If NumOps > NumOperands, reserve space for NumOps operands.
    31073107 /// 3. If NumOps == NumOperands, trim the reserved space.
    31083108 ///
    3109 void IndBrInst::resizeOperands(unsigned NumOps) {
    3109 void IndirectBrInst::resizeOperands(unsigned NumOps) {
    31103110 unsigned e = getNumOperands();
    31113111 if (NumOps == 0) {
    31123112 NumOps = e*2;
    31283128 if (OldOps) Use::zap(OldOps, OldOps + e, true);
    31293129 }
    31303130
    3131 IndBrInst::IndBrInst(Value *Address, unsigned NumCases,
    3132 Instruction *InsertBefore)
    3133 : TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr,
    3131 IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases,
    3132 Instruction *InsertBefore)
    3133 : TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr,
    31343134 0, 0, InsertBefore) {
    31353135 init(Address, NumCases);
    31363136 }
    31373137
    3138 IndBrInst::IndBrInst(Value *Address, unsigned NumCases, BasicBlock *InsertAtEnd)
    3139 : TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr,
    3138 IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases,
    3139 BasicBlock *InsertAtEnd)
    3140 : TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr,
    31403141 0, 0, InsertAtEnd) {
    31413142 init(Address, NumCases);
    31423143 }
    31433144
    3144 IndBrInst::IndBrInst(const IndBrInst &IBI)
    3145 : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndBr,
    3145 IndirectBrInst::IndirectBrInst(const IndirectBrInst &IBI)
    3146 : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndirectBr,
    31463147 allocHungoffUses(IBI.getNumOperands()),
    31473148 IBI.getNumOperands()) {
    31483149 Use *OL = OperandList, *InOL = IBI.OperandList;
    31513152 SubclassOptionalData = IBI.SubclassOptionalData;
    31523153 }
    31533154
    3154 IndBrInst::~IndBrInst() {
    3155 IndirectBrInst::~IndirectBrInst() {
    31553156 dropHungoffUses(OperandList);
    31563157 }
    31573158
    31583159 /// addDestination - Add a destination.
    31593160 ///
    3160 void IndBrInst::addDestination(BasicBlock *DestBB) {
    3161 void IndirectBrInst::addDestination(BasicBlock *DestBB) {
    31613162 unsigned OpNo = NumOperands;
    31623163 if (OpNo+1 > ReservedSpace)
    31633164 resizeOperands(0); // Get more space!
    31683169 }
    31693170
    31703171 /// removeDestination - This method removes the specified successor from the
    3171 /// indbr instruction.
    3172 void IndBrInst::removeDestination(unsigned idx) {
    3172 /// indirectbr instruction.
    3173 void IndirectBrInst::removeDestination(unsigned idx) {
    31733174 assert(idx < getNumOperands()-1 && "Successor index out of range!");
    31743175
    31753176 unsigned NumOps = getNumOperands();
    31833184 NumOperands = NumOps-1;
    31843185 }
    31853186
    3186 BasicBlock *IndBrInst::getSuccessorV(unsigned idx) const {
    3187 BasicBlock *IndirectBrInst::getSuccessorV(unsigned idx) const {
    31873188 return getSuccessor(idx);
    31883189 }
    3189 unsigned IndBrInst::getNumSuccessorsV() const {
    3190 unsigned IndirectBrInst::getNumSuccessorsV() const {
    31903191 return getNumSuccessors();
    31913192 }
    3192 void IndBrInst::setSuccessorV(unsigned idx, BasicBlock *B) {
    3193 void IndirectBrInst::setSuccessorV(unsigned idx, BasicBlock *B) {
    31933194 setSuccessor(idx, B);
    31943195 }
    31953196
    33343335 return new SwitchInst(*this);
    33353336 }
    33363337
    3337 IndBrInst *IndBrInst::clone_impl() const {
    3338 return new IndBrInst(*this);
    3338 IndirectBrInst *IndirectBrInst::clone_impl() const {
    3339 return new IndirectBrInst(*this);
    33393340 }
    33403341
    33413342
    2626
    2727
    2828 define i32 @indbrtest(i8* %P, i32* %Q) {
    29 indbr i8* %P, [label %BB1, label %BB2, label %BB3]
    29 indirectbr i8* %P, [label %BB1, label %BB2, label %BB3]
    3030 BB1:
    31 indbr i32* %Q, []
    31 indirectbr i32* %Q, []
    3232 BB2:
    33 indbr i32* %Q, [label %BB1, label %BB2]
    33 indirectbr i32* %Q, [label %BB1, label %BB2]
    3434 BB3:
    3535 ret i32 2
    3636 }