llvm.org GIT mirror llvm / a932c3f
AMDGPU: Set correct sched model on v_mad_u64_u32 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317645 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 1 year, 11 months ago
2 changed file(s) with 16 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
398398 } // End Constraints = "@earlyclobber $vdst"
399399
400400 let isCommutable = 1 in {
401 let SchedRW = [WriteDouble, WriteSALU] in {
401402 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
402403 def V_MAD_I64_I32 : VOP3Inst <"v_mad_i64_i32", VOP3b_I64_I1_I32_I32_I64>;
404 } // End SchedRW = [WriteDouble, WriteSALU]
403405 } // End isCommutable = 1
404406
405407 } // End SubtargetPredicate = isCIVI
226226
227227
228228 ; VI: s_mul_i32
229 ; VI: v_mul_hi_u32
230 ; VI: v_mad_u64_u32
229231 ; VI: s_mul_i32
230232 ; VI: v_mul_hi_u32
231 ; VI: v_mul_hi_u32
232 ; VI: v_mad_u64_u32
233233 ; VI: v_mad_u64_u32
234234 ; VI: v_mad_u64_u32
235235
253253 ; GCN-DAG: v_mul_hi_u32
254254 ; GCN-DAG: v_mul_lo_i32
255255 ; GCN-DAG: v_mul_lo_i32
256 ; GCN: v_add_i32_e32
257
258 ; SI-DAG: v_mul_hi_u32
259 ; SI-DAG: v_mul_lo_i32
260 ; SI-DAG: v_mul_hi_u32
261 ; SI-DAG: v_mul_lo_i32
262 ; SI-DAG: v_mul_lo_i32
263 ; SI-DAG: v_mul_lo_i32
264 ; SI-DAG: v_mul_lo_i32
265 ; SI-DAG: v_mul_lo_i32
266
267 ; VI: v_mad_u64_u32
256 ; GCN-DAG: v_add_i32_e32
257
258 ; SI-DAG: v_mul_hi_u32
259 ; SI-DAG: v_mul_lo_i32
260 ; SI-DAG: v_mul_hi_u32
261 ; SI-DAG: v_mul_lo_i32
262 ; SI-DAG: v_mul_lo_i32
263 ; SI-DAG: v_mul_lo_i32
264 ; SI-DAG: v_mul_lo_i32
265 ; SI-DAG: v_mul_lo_i32
266
267 ; VI-DAG: v_mad_u64_u32
268268 ; VI: v_mad_u64_u32
269269 ; VI: v_mad_u64_u32
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