llvm.org GIT mirror llvm / a8a1767
AMDGPU: [AMDGPU] Assembler: add .hsa_code_object_metadata directive for functime metadata V2.0 Summary: Added pair of directives .hsa_code_object_metadata/.end_hsa_code_object_metadata. Between them user can put YAML string that would be directly put to the generated note. E.g.: ''' .hsa_code_object_metadata { amd.MDVersion: [ 2, 0 ] } .end_hsa_code_object_metadata ''' Based on D25046 Reviewers: vpykhtin, nhaustov, yaxunl, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, mgorny, tony-tye Differential Revision: https://reviews.llvm.org/D27619 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290097 91177308-0d34-0410-b5e6-96231b3b80d8 Sam Kolton 3 years ago
6 changed file(s) with 203 addition(s) and 76 deletion(s). Raw diff Collapse all Expand all
118118 "AMD", "AMDGPU");
119119
120120 // Emit runtime metadata.
121 TS->emitRuntimeMetadata(M);
121 TS->EmitRuntimeMetadata(M);
122122 }
123123
124124 bool AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough(
2222 #include "llvm/ADT/StringSwitch.h"
2323 #include "llvm/ADT/Twine.h"
2424 #include "llvm/CodeGen/MachineValueType.h"
25 #include "llvm/MC/MCAsmInfo.h"
2526 #include "llvm/MC/MCContext.h"
2627 #include "llvm/MC/MCExpr.h"
2728 #include "llvm/MC/MCInst.h"
4445 #include "llvm/Support/raw_ostream.h"
4546 #include "llvm/Support/SMLoc.h"
4647 #include "llvm/Support/TargetRegistry.h"
48 #include "llvm/Support/raw_ostream.h"
49 #include "llvm/Support/MathExtras.h"
4750 #include
4851 #include
4952 #include
677680 bool ParseDirectiveMajorMinor(uint32_t &Major, uint32_t &Minor);
678681 bool ParseDirectiveHSACodeObjectVersion();
679682 bool ParseDirectiveHSACodeObjectISA();
683 bool ParseDirectiveRuntimeMetadata();
680684 bool ParseAMDKernelCodeTValue(StringRef ID, amd_kernel_code_t &Header);
681685 bool ParseDirectiveAMDKernelCodeT();
682686 bool ParseSectionDirectiveHSAText();
17461750 return false;
17471751 }
17481752
1753 bool AMDGPUAsmParser::ParseDirectiveRuntimeMetadata() {
1754 std::string Metadata;
1755 raw_string_ostream MS(Metadata);
1756
1757 getLexer().setSkipSpace(false);
1758
1759 bool FoundEnd = false;
1760 while (!getLexer().is(AsmToken::Eof)) {
1761 while (getLexer().is(AsmToken::Space)) {
1762 MS << ' ';
1763 Lex();
1764 }
1765
1766 if (getLexer().is(AsmToken::Identifier)) {
1767 StringRef ID = getLexer().getTok().getIdentifier();
1768 if (ID == ".end_amdgpu_runtime_metadata") {
1769 Lex();
1770 FoundEnd = true;
1771 break;
1772 }
1773 }
1774
1775 MS << Parser.parseStringToEndOfStatement()
1776 << getContext().getAsmInfo()->getSeparatorString();
1777
1778 Parser.eatToEndOfStatement();
1779 }
1780
1781 getLexer().setSkipSpace(true);
1782
1783 if (getLexer().is(AsmToken::Eof) && !FoundEnd)
1784 return TokError("expected directive .end_amdgpu_runtime_metadata not found");
1785
1786 MS.flush();
1787
1788 getTargetStreamer().EmitRuntimeMetadata(Metadata);
1789
1790 return false;
1791 }
1792
17491793 bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,
17501794 amd_kernel_code_t &Header) {
17511795 SmallString<40> ErrStr;
18511895
18521896 if (IDVal == ".hsa_code_object_isa")
18531897 return ParseDirectiveHSACodeObjectISA();
1898
1899 if (IDVal == ".amdgpu_runtime_metadata")
1900 return ParseDirectiveRuntimeMetadata();
18541901
18551902 if (IDVal == ".amd_kernel_code_t")
18561903 return ParseDirectiveAMDKernelCodeT();
9292 OS << "\t.amdgpu_hsa_program_global " << GlobalName << '\n';
9393 }
9494
95 void AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(Module &M) {
96 OS << "\t.amdgpu_runtime_metadata\n";
97 OS << getRuntimeMDYAMLString(M);
98 OS << "\n\t.end_amdgpu_runtime_metadata\n";
99 }
100
101 void AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(StringRef Metadata) {
102 OS << "\t.amdgpu_runtime_metadata";
103 OS << Metadata;
104 OS << "\t.end_amdgpu_runtime_metadata\n";
105 }
106
95107 //===----------------------------------------------------------------------===//
96108 // AMDGPUTargetELFStreamer
97109 //===----------------------------------------------------------------------===//
104116 }
105117
106118 void
119 AMDGPUTargetELFStreamer::EmitAMDGPUNote(const MCExpr* DescSZ,
120 PT_NOTE::NoteType Type,
121 std::function EmitDesc) {
122 auto &S = getStreamer();
123 auto &Context = S.getContext();
124
125 auto NameSZ = sizeof(PT_NOTE::NoteName);
126
127 S.PushSection();
128 S.SwitchSection(Context.getELFSection(
129 PT_NOTE::SectionName, ELF::SHT_NOTE, ELF::SHF_ALLOC));
130 S.EmitIntValue(NameSZ, 4); // namesz
131 S.EmitValue(DescSZ, 4); // descz
132 S.EmitIntValue(Type, 4); // type
133 S.EmitBytes(StringRef(PT_NOTE::NoteName, NameSZ)); // name
134 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
135 EmitDesc(S); // desc
136 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
137 S.PopSection();
138 }
139
140 void
107141 AMDGPUTargetELFStreamer::EmitDirectiveHSACodeObjectVersion(uint32_t Major,
108142 uint32_t Minor) {
109 MCStreamer &OS = getStreamer();
110 MCSectionELF *Note =
111 OS.getContext().getELFSection(PT_NOTE::SectionName, ELF::SHT_NOTE,
112 ELF::SHF_ALLOC);
113
114 auto NameSZ = sizeof(PT_NOTE::NoteName);
115 OS.PushSection();
116 OS.SwitchSection(Note);
117 OS.EmitIntValue(NameSZ, 4); // namesz
118 OS.EmitIntValue(8, 4); // descz
119 OS.EmitIntValue(PT_NOTE::NT_AMDGPU_HSA_CODE_OBJECT_VERSION, 4); // type
120 OS.EmitBytes(StringRef(PT_NOTE::NoteName, NameSZ)); // name
121 OS.EmitValueToAlignment(4);
122 OS.EmitIntValue(Major, 4); // desc
123 OS.EmitIntValue(Minor, 4);
124 OS.EmitValueToAlignment(4);
125 OS.PopSection();
143
144 EmitAMDGPUNote(
145 MCConstantExpr::create(8, getContext()),
146 PT_NOTE::NT_AMDGPU_HSA_CODE_OBJECT_VERSION,
147 [&](MCELFStreamer &OS){
148 OS.EmitIntValue(Major, 4);
149 OS.EmitIntValue(Minor, 4);
150 }
151 );
126152 }
127153
128154 void
131157 uint32_t Stepping,
132158 StringRef VendorName,
133159 StringRef ArchName) {
134 MCStreamer &OS = getStreamer();
135 MCSectionELF *Note =
136 OS.getContext().getELFSection(PT_NOTE::SectionName, ELF::SHT_NOTE,
137 ELF::SHF_ALLOC);
138
139160 uint16_t VendorNameSize = VendorName.size() + 1;
140161 uint16_t ArchNameSize = ArchName.size() + 1;
162
141163 unsigned DescSZ = sizeof(VendorNameSize) + sizeof(ArchNameSize) +
142 sizeof(Major) + sizeof(Minor) + sizeof(Stepping) +
143 VendorNameSize + ArchNameSize;
144
145 OS.PushSection();
146 OS.SwitchSection(Note);
147 auto NameSZ = sizeof(PT_NOTE::NoteName);
148 OS.EmitIntValue(NameSZ, 4); // namesz
149 OS.EmitIntValue(DescSZ, 4); // descsz
150 OS.EmitIntValue(PT_NOTE::NT_AMDGPU_HSA_ISA, 4); // type
151 OS.EmitBytes(StringRef(PT_NOTE::NoteName, NameSZ)); // name
152 OS.EmitValueToAlignment(4);
153 OS.EmitIntValue(VendorNameSize, 2); // desc
154 OS.EmitIntValue(ArchNameSize, 2);
155 OS.EmitIntValue(Major, 4);
156 OS.EmitIntValue(Minor, 4);
157 OS.EmitIntValue(Stepping, 4);
158 OS.EmitBytes(VendorName);
159 OS.EmitIntValue(0, 1); // NULL terminate VendorName
160 OS.EmitBytes(ArchName);
161 OS.EmitIntValue(0, 1); // NULL terminte ArchName
162 OS.EmitValueToAlignment(4);
163 OS.PopSection();
164 sizeof(Major) + sizeof(Minor) + sizeof(Stepping) +
165 VendorNameSize + ArchNameSize;
166
167 EmitAMDGPUNote(
168 MCConstantExpr::create(DescSZ, getContext()),
169 PT_NOTE::NT_AMDGPU_HSA_ISA,
170 [&](MCELFStreamer &OS) {
171 OS.EmitIntValue(VendorNameSize, 2);
172 OS.EmitIntValue(ArchNameSize, 2);
173 OS.EmitIntValue(Major, 4);
174 OS.EmitIntValue(Minor, 4);
175 OS.EmitIntValue(Stepping, 4);
176 OS.EmitBytes(VendorName);
177 OS.EmitIntValue(0, 1); // NULL terminate VendorName
178 OS.EmitBytes(ArchName);
179 OS.EmitIntValue(0, 1); // NULL terminte ArchName
180 }
181 );
164182 }
165183
166184 void
197215 Symbol->setBinding(ELF::STB_GLOBAL);
198216 }
199217
200 void AMDGPUTargetELFStreamer::emitRuntimeMetadata(Module &M) {
201 auto &S = getStreamer();
202 auto &Context = S.getContext();
203
204 auto NameSZ = sizeof(PT_NOTE::NoteName); // Size of note name including trailing null.
205
206 S.PushSection();
207 S.SwitchSection(Context.getELFSection(
208 PT_NOTE::SectionName, ELF::SHT_NOTE, ELF::SHF_ALLOC));
209
218 void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(StringRef Metadata) {
210219 // Create two labels to mark the beginning and end of the desc field
211220 // and a MCExpr to calculate the size of the desc field.
221 auto &Context = getContext();
212222 auto *DescBegin = Context.createTempSymbol();
213223 auto *DescEnd = Context.createTempSymbol();
214224 auto *DescSZ = MCBinaryExpr::createSub(
215 MCSymbolRefExpr::create(DescEnd, Context),
216 MCSymbolRefExpr::create(DescBegin, Context), Context);
217
218 // Emit the note element for runtime metadata.
219 // Name and desc should be padded to 4 byte boundary but size of name and
220 // desc should not include padding 0's.
221 S.EmitIntValue(NameSZ, 4); // namesz
222 S.EmitValue(DescSZ, 4); // descz
223 S.EmitIntValue(PT_NOTE::NT_AMDGPU_HSA_RUNTIME_METADATA, 4); // type
224 S.EmitBytes(StringRef(PT_NOTE::NoteName, NameSZ)); // name
225 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
226 S.EmitLabel(DescBegin);
227 S.EmitBytes(getRuntimeMDYAMLString(M)); // desc
228 S.EmitLabel(DescEnd);
229 S.EmitValueToAlignment(4, 0, 1, 0); // padding 0
230 S.PopSection();
231 }
225 MCSymbolRefExpr::create(DescEnd, Context),
226 MCSymbolRefExpr::create(DescBegin, Context), Context);
227
228 EmitAMDGPUNote(
229 DescSZ,
230 PT_NOTE::NT_AMDGPU_HSA_RUNTIME_METADATA,
231 [&](MCELFStreamer &OS) {
232 OS.EmitLabel(DescBegin);
233 OS.EmitBytes(Metadata);
234 OS.EmitLabel(DescEnd);
235 }
236 );
237 }
238
239 void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(Module &M) {
240 EmitRuntimeMetadata(getRuntimeMDYAMLString(M));
241 }
1313 #include "llvm/MC/MCStreamer.h"
1414
1515 namespace llvm {
16 #include "AMDGPUPTNote.h"
1617
1718 class DataLayout;
1819 class Function;
2324 class Type;
2425
2526 class AMDGPUTargetStreamer : public MCTargetStreamer {
27 protected:
28 MCContext &getContext() const { return Streamer.getContext(); }
29
2630 public:
2731 AMDGPUTargetStreamer(MCStreamer &S);
2832 virtual void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
4145
4246 virtual void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) = 0;
4347
44 virtual void emitRuntimeMetadata(Module &M) = 0;
48 virtual void EmitRuntimeMetadata(Module &M) = 0;
49
50 virtual void EmitRuntimeMetadata(StringRef Metadata) = 0;
4551 };
4652
4753 class AMDGPUTargetAsmStreamer : public AMDGPUTargetStreamer {
6369
6470 void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) override;
6571
66 void emitRuntimeMetadata(Module &M) override {}
72 void EmitRuntimeMetadata(Module &M) override;
73
74 void EmitRuntimeMetadata(StringRef Metadata) override;
6775 };
6876
6977 class AMDGPUTargetELFStreamer : public AMDGPUTargetStreamer {
7078 MCStreamer &Streamer;
79
80 void EmitAMDGPUNote(const MCExpr* DescSize,
81 AMDGPU::PT_NOTE::NoteType Type,
82 std::function EmitDesc);
7183
7284 public:
7385 AMDGPUTargetELFStreamer(MCStreamer &S);
89101
90102 void EmitAMDGPUHsaProgramScopeGlobal(StringRef GlobalName) override;
91103
92 void emitRuntimeMetadata(Module &M) override;
104 void EmitRuntimeMetadata(Module &M) override;
105
106 void EmitRuntimeMetadata(StringRef Metadata) override;
93107 };
94108
95109 }
1313 // ELF: 0020: 03000000 414D4400 04000700 07000000
1414 // ELF: 0030: 00000000 00000000 414D4400 414D4447
1515 // ELF: 0040: 50550000
16 // We can't check binary representation of metadata note: it is different on
17 // Windows and Linux because of carriage return on Windows
1618
1719 // ELF: Symbol {
1820 // ELF: Name: amd_kernel_code_t_minimal
3436 .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
3537 // ASM: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
3638
39 .amdgpu_runtime_metadata
40 {
41 amd.MDVersion: [ 2, 0 ]
42 amd.Kernels: [
43 { amd.KernelName: amd_kernel_code_t_test_all },
44 { amd.KernelName: amd_kernel_code_t_minimal }
45 ]
46 }
47 .end_amdgpu_runtime_metadata
48
49 // ASM: .amdgpu_runtime_metadata
50 // ASM: {
51 // ASM: amd.MDVersion: [ 2, 0 ]
52 // ASM: amd.Kernels: [
53 // ASM: { amd.KernelName: amd_kernel_code_t_test_all },
54 // ASM: { amd.KernelName: amd_kernel_code_t_minimal }
55 // ASM: ]
56 // ASM: }
57 // ASM: .end_amdgpu_runtime_metadata
58
3759 .amdgpu_hsa_kernel amd_kernel_code_t_test_all
3860 .amdgpu_hsa_kernel amd_kernel_code_t_minimal
39
4061
4162 amd_kernel_code_t_test_all:
4263 ; Test all amd_kernel_code_t members with non-default values.
0 // RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
1
2 .amdgpu_runtime_metadata
3 { amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
4
5 - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
6 - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
7 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
8 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
9 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
10 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
11
12 - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
13 - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
14 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
15 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
16 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
17 - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
18 }
19 .end_amdgpu_runtime_metadata
20
21 // ASM: { amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
22 // ASM: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
23 // ASM: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
24 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
25 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
26 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
27 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
28 // ASM: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
29 // ASM: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
30 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
31 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
32 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
33 // ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
34 // ASM: }