llvm.org GIT mirror llvm / a894ae1
Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62617 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
3 changed file(s) with 31 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
145145 /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
146146 /// uses. Pay special attention to the sub-register uses which may come below
147147 /// the last use of the whole register.
148 bool HandlePhysRegKill(unsigned Reg);
148 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
149149
150150 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
151151 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
334334 return true;
335335 }
336336
337 bool LiveVariables::HandlePhysRegKill(unsigned Reg) {
337 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
338338 if (!PhysRegUse[Reg] && !PhysRegDef[Reg])
339339 return false;
340340
372372 }
373373 }
374374 }
375 if (LastRefOrPartRef == PhysRegDef[Reg])
376 // Not used at all.
375
376 if (LastRefOrPartRef == PhysRegDef[Reg] && LastRefOrPartRef != MI)
377 // If the last reference is the last def, then it's not used at all.
378 // That is, unless we are currently processing the last reference itself.
377379 LastRefOrPartRef->addRegisterDead(Reg, TRI, true);
378380
379381 /* Partial uses. Mark register def dead and add implicit def of
426428
427429 // Start from the largest piece, find the last time any part of the register
428430 // is referenced.
429 if (!HandlePhysRegKill(Reg)) {
431 if (!HandlePhysRegKill(Reg, MI)) {
430432 // Only some of the sub-registers are used.
431433 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
432434 unsigned SubReg = *SubRegs; ++SubRegs) {
433435 if (!Live.count(SubReg))
434436 // Skip if this sub-register isn't defined.
435437 continue;
436 if (HandlePhysRegKill(SubReg)) {
438 if (HandlePhysRegKill(SubReg, MI)) {
437439 Live.erase(SubReg);
438440 for (const unsigned *SS = TRI->getSubRegisters(SubReg); *SS; ++SS)
439441 Live.erase(*SS);
474476 }
475477 } else {
476478 // Otherwise, the super register is killed.
477 if (HandlePhysRegKill(SuperReg)) {
479 if (HandlePhysRegKill(SuperReg, MI)) {
478480 PhysRegDef[SuperReg] = NULL;
479481 PhysRegUse[SuperReg] = NULL;
480482 for (const unsigned *SS = TRI->getSubRegisters(SuperReg); *SS; ++SS) {
557559 SmallVector DefRegs;
558560 for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
559561 const MachineOperand &MO = MI->getOperand(i);
560 if (MO.isReg() && MO.getReg()) {
561 unsigned MOReg = MO.getReg();
562 if (MO.isUse())
563 UseRegs.push_back(MOReg);
564 if (MO.isDef())
565 DefRegs.push_back(MOReg);
566 }
562 if (!MO.isReg() || MO.getReg() == 0)
563 continue;
564 unsigned MOReg = MO.getReg();
565 if (MO.isUse())
566 UseRegs.push_back(MOReg);
567 if (MO.isDef())
568 DefRegs.push_back(MOReg);
567569 }
568570
569571 // Process all uses.
0 ; RUN: llvm-as < %s | llc -march=x86
1 ; PR3243
2
3 declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize
4
5 define i32 @func_120(i32 %p_121) nounwind optsize {
6 entry:
7 %0 = trunc i32 %p_121 to i16 ; [#uses=1]
8 %1 = urem i16 %0, -15461 ; [#uses=1]
9 %phitmp1 = trunc i16 %1 to i8 ; [#uses=1]
10 %phitmp2 = urem i8 %phitmp1, -1 ; [#uses=1]
11 %phitmp3 = zext i8 %phitmp2 to i16 ; [#uses=1]
12 %2 = tail call signext i16 @safe_mul_func_int16_t_s_s(i16 signext %phitmp3, i32 1) nounwind ; [#uses=0]
13 unreachable
14 }