llvm.org GIT mirror llvm / a7ac47c
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 11 years ago
50 changed file(s) with 216 addition(s) and 174 deletion(s). Raw diff Collapse all Expand all
101101
102102 /// AsmInfo - Contains target specific asm information.
103103 ///
104 mutable const TargetAsmInfo *AsmInfo;
105
106 /// createTargetAsmInfo - Create a new instance of target specific asm
107 /// information.
108 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
109
104 const TargetAsmInfo *AsmInfo;
105
110106 public:
111107 virtual ~TargetMachine();
112108
125121
126122 /// getTargetAsmInfo - Return target specific asm information.
127123 ///
128 const TargetAsmInfo *getTargetAsmInfo() const {
129 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
130 return AsmInfo;
131 }
124 const TargetAsmInfo *getTargetAsmInfo() const { return AsmInfo; }
132125
133126 /// getSubtarget - This method returns a pointer to the specified type of
134127 /// TargetSubtarget. In debug builds, it verifies that the object being
290283 ///
291284 class LLVMTargetMachine : public TargetMachine {
292285 protected: // Can only create subclasses.
293 LLVMTargetMachine(const Target &T, const std::string &TargetTriple)
294 : TargetMachine(T) { }
295
286 LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
287
296288 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
297289 /// both emitting to assembly files or machine code output.
298290 ///
4242 /// will be zero initialized), and pass that instance to the TargetRegistry as
4343 /// part of their initialization.
4444 class Target {
45 private:
45 public:
46 friend struct TargetRegistry;
47
4648 typedef unsigned (*TripleMatchQualityFnTy)(const std::string &TT);
4749
48 typedef TargetMachine *(*TargetMachineCtorTy)(const Target &,
49 const std::string &,
50 const std::string &);
50 typedef const TargetAsmInfo *(*AsmInfoCtorFnTy)(const Target &T,
51 const StringRef &TT);
52 typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
53 const std::string &TT,
54 const std::string &Features);
5155 typedef FunctionPass *(*AsmPrinterCtorTy)(formatted_raw_ostream &,
5256 TargetMachine &,
5357 bool);
5458 typedef TargetAsmParser *(*AsmParserCtorTy)(const Target &,
5559 MCAsmParser &);
56
57 friend struct TargetRegistry;
58
60 private:
5961 /// Next - The next registered target in the linked list, maintained by the
6062 /// TargetRegistry.
6163 Target *Next;
7375 /// HasJIT - Whether this target supports the JIT.
7476 bool HasJIT;
7577
78 AsmInfoCtorFnTy AsmInfoCtorFn;
79
7680 /// TargetMachineCtorFn - Construction function for this target's
7781 /// TargetMachine, if registered.
7882 TargetMachineCtorTy TargetMachineCtorFn;
106110 /// hasAsmParser - Check if this target supports .s parsing.
107111 bool hasAsmParser() const { return AsmParserCtorFn != 0; }
108112
113
114 /// createAsmInfo - Create a TargetAsmInfo implementation for the specified
115 /// target triple.
116 ///
117 /// \arg Triple - This argument is used to determine the target machine
118 /// feature set; it should always be provided. Generally this should be
119 /// either the target triple from the module, or the target triple of the
120 /// host if that does not exist.
121 const TargetAsmInfo *createAsmInfo(const StringRef &Triple) const {
122 if (!AsmInfoCtorFn)
123 return 0;
124 return AsmInfoCtorFn(*this, Triple);
125 }
126
109127 /// createTargetMachine - Create a target specific machine implementation
110 /// for the module \arg M and \arg Triple.
111 ///
112 /// \arg M - This argument is used for some machines to access the target
113 /// data.
128 /// for the specified \arg Triple.
129 ///
114130 /// \arg Triple - This argument is used to determine the target machine
115131 /// feature set; it should always be provided. Generally this should be
116132 /// either the target triple from the module, or the target triple of the
227243 const char *ShortDesc,
228244 Target::TripleMatchQualityFnTy TQualityFn,
229245 bool HasJIT = false);
230
246
247 /// RegisterAsmInfo - Register a TargetAsmInfo implementation for the
248 /// given target.
249 ///
250 /// Clients are responsible for ensuring that registration doesn't occur
251 /// while another thread is attempting to access the registry. Typically
252 /// this is done by initializing all targets at program startup.
253 ///
254 /// @param T - The target being registered.
255 /// @param Fn - A function to construct a TargetAsmInfo for the target.
256 static void RegisterAsmInfo(Target &T, Target::AsmInfoCtorFnTy Fn) {
257 // Ignore duplicate registration.
258 if (!T.AsmInfoCtorFn)
259 T.AsmInfoCtorFn = Fn;
260 }
261
231262 /// RegisterTargetMachine - Register a TargetMachine implementation for the
232263 /// given target.
233264 ///
304335 }
305336 };
306337
338 /// RegisterAsmInfo - Helper template for registering a target assembly info
339 /// implementation. This invokes the static "Create" method on the class to
340 /// actually do the construction. Usage:
341 ///
342 /// extern "C" void LLVMInitializeFooTarget() {
343 /// extern Target TheFooTarget;
344 /// RegisterAsmInfo X(TheFooTarget);
345 /// }
346 template
347 struct RegisterAsmInfo {
348 RegisterAsmInfo(Target &T) {
349 TargetRegistry::RegisterAsmInfo(T, &Allocator);
350 }
351 private:
352 static const TargetAsmInfo *Allocator(const Target &T, const StringRef &TT){
353 return new TargetAsmInfoImpl(T, TT);
354 }
355
356 };
357
358 /// RegisterAsmInfoFn - Helper template for registering a target assembly info
359 /// implementation. This invokes the specified function to do the
360 /// construction. Usage:
361 ///
362 /// extern "C" void LLVMInitializeFooTarget() {
363 /// extern Target TheFooTarget;
364 /// RegisterAsmInfoFn X(TheFooTarget, TheFunction);
365 /// }
366 struct RegisterAsmInfoFn {
367 RegisterAsmInfoFn(Target &T, Target::AsmInfoCtorFnTy Fn) {
368 TargetRegistry::RegisterAsmInfo(T, Fn);
369 }
370 };
371
372
307373 /// RegisterTargetMachine - Helper template for registering a target machine
308374 /// implementation, for use in the target machine initialization
309375 /// function. Usage:
5454 EnableFastISelOption("fast-isel", cl::Hidden,
5555 cl::desc("Enable the experimental \"fast\" instruction selector"));
5656
57
58 LLVMTargetMachine::LLVMTargetMachine(const Target &T,
59 const std::string &TargetTriple)
60 : TargetMachine(T) {
61 AsmInfo = T.createAsmInfo(TargetTriple);
62 }
63
64
65
5766 FileModel::Model
5867 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
5968 formatted_raw_ostream &Out,
2626 static cl::opt DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
2727 cl::desc("Disable if-conversion pass"));
2828
29 static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
30 const StringRef &TT) {
31 Triple TheTriple(TT);
32 switch (TheTriple.getOS()) {
33 case Triple::Darwin:
34 return new ARMDarwinTargetAsmInfo();
35 default:
36 return new ARMELFTargetAsmInfo();
37 }
38 }
39
40
2941 extern "C" void LLVMInitializeARMTarget() {
3042 // Register the target.
3143 RegisterTargetMachine X(TheARMTarget);
3244 RegisterTargetMachine Y(TheThumbTarget);
45
46 // Register the target asm info.
47 RegisterAsmInfoFn A(TheARMTarget, createTargetAsmInfo);
48 RegisterAsmInfoFn B(TheThumbTarget, createTargetAsmInfo);
3349 }
3450
3551 /// TargetMachine ctor - Create an ARM architecture model.
7187 InstrInfo = new Thumb1InstrInfo(Subtarget);
7288 }
7389
74
75 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
76 switch (Subtarget.TargetType) {
77 default: llvm_unreachable("Unknown ARM subtarget kind");
78 case ARMSubtarget::isDarwin:
79 return new ARMDarwinTargetAsmInfo();
80 case ARMSubtarget::isELF:
81 return new ARMELFTargetAsmInfo();
82 }
83 }
8490
8591
8692 // Pass Pipeline Configuration
4545 virtual const InstrItineraryData getInstrItineraryData() const {
4646 return InstrItins;
4747 }
48
49 virtual const TargetAsmInfo *createTargetAsmInfo() const;
5048
5149 // Pass Pipeline Configuration
5250 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
1313 #include "AlphaTargetAsmInfo.h"
1414 using namespace llvm;
1515
16 AlphaTargetAsmInfo::AlphaTargetAsmInfo() {
16 AlphaTargetAsmInfo::AlphaTargetAsmInfo(const Target &T, const StringRef &TT) {
1717 AlignmentIsInBytes = false;
1818 PrivateGlobalPrefix = "$";
1919 PICJumpTableDirective = ".gprel32";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
1921
2022 struct AlphaTargetAsmInfo : public TargetAsmInfo {
21 explicit AlphaTargetAsmInfo();
23 explicit AlphaTargetAsmInfo(const Target &T, const StringRef &TT);
2224 };
2325
2426 } // namespace llvm
1616 #include "llvm/PassManager.h"
1717 #include "llvm/Support/FormattedStream.h"
1818 #include "llvm/Target/TargetRegistry.h"
19
2019 using namespace llvm;
2120
2221 extern "C" void LLVMInitializeAlphaTarget() {
2322 // Register the target.
2423 RegisterTargetMachine X(TheAlphaTarget);
25 }
26
27 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
28 return new AlphaTargetAsmInfo();
24 RegisterAsmInfo Y(TheAlphaTarget);
2925 }
3026
3127 AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
3232 AlphaJITInfo JITInfo;
3333 AlphaSubtarget Subtarget;
3434 AlphaTargetLowering TLInfo;
35
36 protected:
37 virtual const TargetAsmInfo *createTargetAsmInfo() const;
3835
3936 public:
4037 AlphaTargetMachine(const Target &T, const std::string &TT,
1414
1515 using namespace llvm;
1616
17 BlackfinTargetAsmInfo::BlackfinTargetAsmInfo() {
17 BlackfinTargetAsmInfo::BlackfinTargetAsmInfo(const Target &T,
18 const StringRef &TT) {
1819 GlobalPrefix = "_";
1920 CommentString = "//";
2021 }
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
1921
2022 struct BlackfinTargetAsmInfo : public TargetAsmInfo {
21 explicit BlackfinTargetAsmInfo();
23 explicit BlackfinTargetAsmInfo(const Target &T, const StringRef &TT);
2224 };
2325
2426 } // namespace llvm
1919
2020 extern "C" void LLVMInitializeBlackfinTarget() {
2121 RegisterTargetMachine X(TheBlackfinTarget);
22 }
22 RegisterAsmInfo Y(TheBlackfinTarget);
2323
24 const TargetAsmInfo* BlackfinTargetMachine::createTargetAsmInfo() const {
25 return new BlackfinTargetAsmInfo();
2624 }
2725
2826 BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
2828 BlackfinTargetLowering TLInfo;
2929 BlackfinInstrInfo InstrInfo;
3030 TargetFrameInfo FrameInfo;
31
32 protected:
33 virtual const TargetAsmInfo *createTargetAsmInfo() const;
34
3531 public:
3632 BlackfinTargetMachine(const Target &T, const std::string &TT,
3733 const std::string &FS);
1313 #include "SPUTargetAsmInfo.h"
1414 using namespace llvm;
1515
16 SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo() {
16 SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo(const Target &T, const StringRef &TT) {
1717 ZeroDirective = "\t.space\t";
1818 SetDirective = "\t.set";
1919 Data64bitsDirective = "\t.quad\t";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19
19 class Target;
20 class StringRef;
21
2022 struct SPULinuxTargetAsmInfo : public TargetAsmInfo {
21 explicit SPULinuxTargetAsmInfo();
23 explicit SPULinuxTargetAsmInfo(const Target &T, const StringRef &TT);
2224 };
2325 } // namespace llvm
2426
2424 extern "C" void LLVMInitializeCellSPUTarget() {
2525 // Register the target.
2626 RegisterTargetMachine X(TheCellSPUTarget);
27 RegisterAsmInfo Y(TheCellSPUTarget);
2728 }
2829
2930 const std::pair *
3031 SPUFrameInfo::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
3132 NumEntries = 1;
3233 return &LR[0];
33 }
34
35 const TargetAsmInfo *SPUTargetMachine::createTargetAsmInfo() const {
36 return new SPULinuxTargetAsmInfo();
3734 }
3835
3936 SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
3434 SPUFrameInfo FrameInfo;
3535 SPUTargetLowering TLInfo;
3636 InstrItineraryData InstrItins;
37
38 protected:
39 virtual const TargetAsmInfo *createTargetAsmInfo() const;
40
4137 public:
4238 SPUTargetMachine(const Target &T, const std::string &TT,
4339 const std::string &FS);
1414 #define DEBUG_TYPE "asm-printer"
1515 #include "MSP430.h"
1616 #include "MSP430InstrInfo.h"
17 #include "MSP430TargetAsmInfo.h"
1718 #include "MSP430TargetMachine.h"
1819 #include "llvm/Constants.h"
1920 #include "llvm/DerivedTypes.h"
2425 #include "llvm/CodeGen/MachineFunctionPass.h"
2526 #include "llvm/CodeGen/MachineConstantPool.h"
2627 #include "llvm/CodeGen/MachineInstr.h"
27 #include "llvm/Target/TargetAsmInfo.h"
2828 #include "llvm/Target/TargetData.h"
2929 #include "llvm/Target/TargetLoweringObjectFile.h"
3030 #include "llvm/Target/TargetRegistry.h"
245245 // Register the target.
246246 RegisterTargetMachine X(TheMSP430Target);
247247 RegisterAsmPrinter Y(TheMSP430Target);
248 }
248 RegisterAsmInfo Z(TheMSP430Target);
249 }
1313 #include "MSP430TargetAsmInfo.h"
1414 using namespace llvm;
1515
16 MSP430TargetAsmInfo::MSP430TargetAsmInfo() {
16 MSP430TargetAsmInfo::MSP430TargetAsmInfo(const Target &T, const StringRef &TT) {
1717 AlignmentIsInBytes = false;
1818 }
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
1921 struct MSP430TargetAsmInfo : public TargetAsmInfo {
20 explicit MSP430TargetAsmInfo();
22 explicit MSP430TargetAsmInfo(const Target &T, const StringRef &TT);
2123 };
2224
2325 } // namespace llvm
2828 InstrInfo(*this), TLInfo(*this),
2929 FrameInfo(TargetFrameInfo::StackGrowsDown, 2, -2) { }
3030
31 const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
32 return new MSP430TargetAsmInfo();
33 }
3431
3532 bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM,
3633 CodeGenOpt::Level OptLevel) {
3636 // any MSP430 specific FrameInfo class.
3737 TargetFrameInfo FrameInfo;
3838
39 protected:
40 virtual const TargetAsmInfo *createTargetAsmInfo() const;
41
4239 public:
4340 MSP430TargetMachine(const Target &T, const std::string &TT,
4441 const std::string &FS);
1313 #include "MipsTargetAsmInfo.h"
1414 using namespace llvm;
1515
16 MipsTargetAsmInfo::MipsTargetAsmInfo() {
16 MipsTargetAsmInfo::MipsTargetAsmInfo(const Target &T, const StringRef &TT) {
1717 AlignmentIsInBytes = false;
1818 COMMDirectiveTakesAlignment = true;
1919 Data16bitsDirective = "\t.half\t";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
21
1922 class MipsTargetAsmInfo : public TargetAsmInfo {
2023 public:
21 explicit MipsTargetAsmInfo();
24 explicit MipsTargetAsmInfo(const Target &T, const StringRef &TT);
2225 };
2326
2427 } // namespace llvm
2121 // Register the target.
2222 RegisterTargetMachine X(TheMipsTarget);
2323 RegisterTargetMachine Y(TheMipselTarget);
24 }
25
26 const TargetAsmInfo *MipsTargetMachine::createTargetAsmInfo() const {
27 return new MipsTargetAsmInfo();
24 RegisterAsmInfo A(TheMipsTarget);
25 RegisterAsmInfo B(TheMipselTarget);
2826 }
2927
3028 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
2929 MipsInstrInfo InstrInfo;
3030 TargetFrameInfo FrameInfo;
3131 MipsTargetLowering TLInfo;
32
33 protected:
34 virtual const TargetAsmInfo *createTargetAsmInfo() const;
35
3632 public:
3733 MipsTargetMachine(const Target &T, const std::string &TT,
3834 const std::string &FS, bool isLittle);
479479 RegisterTargetMachine B(TheCooperTarget);
480480 RegisterAsmPrinter C(ThePIC16Target);
481481 RegisterAsmPrinter D(TheCooperTarget);
482 }
482
483 RegisterAsmInfo E(ThePIC16Target);
484 RegisterAsmInfo F(TheCooperTarget);
485 }
1818 #include "PIC16ISelLowering.h"
1919 using namespace llvm;
2020
21 PIC16TargetAsmInfo::
22 PIC16TargetAsmInfo() {
21 PIC16TargetAsmInfo::PIC16TargetAsmInfo(const Target &T, const StringRef &TT) {
2322 CommentString = ";";
2423 GlobalPrefix = PAN::getTagName(PAN::PREFIX_SYMBOL);
2524 GlobalDirective = "\tglobal\t";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
21
1922 class PIC16TargetAsmInfo : public TargetAsmInfo {
2023 const char *RomData8bitsDirective;
2124 const char *RomData16bitsDirective;
2225 const char *RomData32bitsDirective;
2326 public:
24 PIC16TargetAsmInfo();
27 PIC16TargetAsmInfo(const Target &T, const StringRef &TT);
2528
2629 virtual const char *getDataASDirective(unsigned size, unsigned AS) const;
2730 };
3535 : PIC16TargetMachine(T, TT, FS, true) {}
3636
3737
38 const TargetAsmInfo *PIC16TargetMachine::createTargetAsmInfo() const {
39 return new PIC16TargetAsmInfo();
40 }
41
4238 bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM,
4339 CodeGenOpt::Level OptLevel) {
4440 // Install an instruction selector.
3636 // any PIC16 specific FrameInfo class.
3737 TargetFrameInfo FrameInfo;
3838
39 protected:
40 virtual const TargetAsmInfo *createTargetAsmInfo() const;
41
4239 public:
4340 PIC16TargetMachine(const Target &T, const std::string &TT,
4441 const std::string &FS, bool Cooper = false);
1919 #include "llvm/Support/FormattedStream.h"
2020 using namespace llvm;
2121
22 static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
23 const StringRef &TT) {
24 Triple TheTriple(TT);
25 bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
26 if (TheTriple.getOS() == Triple::Darwin)
27 return new PPCDarwinTargetAsmInfo(isPPC64);
28 return new PPCLinuxTargetAsmInfo(isPPC64);
29
30 }
31
2232 extern "C" void LLVMInitializePowerPCTarget() {
2333 // Register the targets
2434 RegisterTargetMachine A(ThePPC32Target);
2535 RegisterTargetMachine B(ThePPC64Target);
36
37 RegisterAsmInfoFn C(ThePPC32Target, createTargetAsmInfo);
38 RegisterAsmInfoFn D(ThePPC64Target, createTargetAsmInfo);
2639 }
2740
28 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
29 if (Subtarget.isDarwin())
30 return new PPCDarwinTargetAsmInfo(Subtarget.isPPC64());
31 return new PPCLinuxTargetAsmInfo(Subtarget.isPPC64());
32 }
3341
3442 PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
3543 const std::string &FS, bool is64Bit)
3737 PPCTargetLowering TLInfo;
3838 InstrItineraryData InstrItins;
3939 PPCMachOWriterInfo MachOWriterInfo;
40
41 protected:
42 virtual const TargetAsmInfo *createTargetAsmInfo() const;
4340
4441 public:
4542 PPCTargetMachine(const Target &T, const std::string &TT,
1414 #include "llvm/ADT/SmallVector.h"
1515 using namespace llvm;
1616
17 SparcELFTargetAsmInfo::SparcELFTargetAsmInfo() {
17 SparcELFTargetAsmInfo::SparcELFTargetAsmInfo(const Target &T,
18 const StringRef &TT) {
1819 Data16bitsDirective = "\t.half\t";
1920 Data32bitsDirective = "\t.word\t";
2021 Data64bitsDirective = 0; // .xword is only supported by V9.
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19
19 class Target;
20 class StringRef;
2021 struct SparcELFTargetAsmInfo : public TargetAsmInfo {
21 explicit SparcELFTargetAsmInfo();
22 explicit SparcELFTargetAsmInfo(const Target &T, const StringRef &TT);
2223 };
2324
2425 } // namespace llvm
1919 extern "C" void LLVMInitializeSparcTarget() {
2020 // Register the target.
2121 RegisterTargetMachine X(TheSparcTarget);
22 }
22 RegisterAsmInfo Y(TheSparcTarget);
2323
24 const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
25 // FIXME: Handle Solaris subtarget someday :)
26 return new SparcELFTargetAsmInfo();
2724 }
2825
2926 /// SparcTargetMachine ctor - Create an ILP32 architecture model
2828 SparcTargetLowering TLInfo;
2929 SparcInstrInfo InstrInfo;
3030 TargetFrameInfo FrameInfo;
31
32 protected:
33 virtual const TargetAsmInfo *createTargetAsmInfo() const;
34
3531 public:
3632 SparcTargetMachine(const Target &T, const std::string &TT,
3733 const std::string &FS);
1313 #include "SystemZTargetAsmInfo.h"
1414 using namespace llvm;
1515
16 SystemZTargetAsmInfo::SystemZTargetAsmInfo() {
16 SystemZTargetAsmInfo::SystemZTargetAsmInfo(const Target &T,
17 const StringRef &TT) {
1718 AlignmentIsInBytes = true;
1819
1920 PrivateGlobalPrefix = ".L";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
1921
2022 struct SystemZTargetAsmInfo : public TargetAsmInfo {
21 explicit SystemZTargetAsmInfo();
23 explicit SystemZTargetAsmInfo(const Target &T, const StringRef &TT);
2224 };
2325
2426 } // namespace llvm
33 //
44 // This file is distributed under the University of Illinois Open Source
55 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
96 //
107 //===----------------------------------------------------------------------===//
118
1916 extern "C" void LLVMInitializeSystemZTarget() {
2017 // Register the target.
2118 RegisterTargetMachine X(TheSystemZTarget);
22 }
23
24 const TargetAsmInfo *SystemZTargetMachine::createTargetAsmInfo() const {
25 return new SystemZTargetAsmInfo();
19 RegisterAsmInfo Y(TheSystemZTarget);
2620 }
2721
2822 /// SystemZTargetMachine ctor - Create an ILP64 architecture model
3535 // SystemZ does not have any call stack frame, therefore not having
3636 // any SystemZ specific FrameInfo class.
3737 TargetFrameInfo FrameInfo;
38
39 protected:
40 virtual const TargetAsmInfo *createTargetAsmInfo() const;
41
4238 public:
4339 SystemZTargetMachine(const Target &T, const std::string &TT,
4440 const std::string &FS);
1212
1313 #include "X86TargetAsmInfo.h"
1414 #include "X86TargetMachine.h"
15 #include "llvm/ADT/Triple.h"
1516 #include "llvm/Support/CommandLine.h"
1617 using namespace llvm;
1718
4142 "{cc}", "cc",
4243 0,0};
4344
44 X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM) {
45 X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const Triple &Triple) {
4546 AsmTransCBE = x86_asm_table;
4647 AssemblerDialect = AsmWriterFlavor;
4748
48 const X86Subtarget *Subtarget = &TM.getSubtarget();
49 bool is64Bit = Subtarget->is64Bit();
49 bool is64Bit = Triple.getArch() == Triple::x86_64;
5050
5151 TextAlignFillValue = 0x90;
5252
5454 Data64bitsDirective = 0; // we can't emit a 64-bit unit
5555
5656 // Leopard and above support aligned common symbols.
57 COMMDirectiveTakesAlignment = (Subtarget->getDarwinVers() >= 9);
57 COMMDirectiveTakesAlignment = Triple.getDarwinMajorNumber() >= 9;
5858
5959 if (is64Bit) {
6060 PersonalityPrefix = "";
7575 AbsoluteEHSectionOffsets = false;
7676 }
7777
78 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM) {
78 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const Triple &Triple) {
7979 AsmTransCBE = x86_asm_table;
8080 AssemblerDialect = AsmWriterFlavor;
8181
9696 AbsoluteEHSectionOffsets = false;
9797
9898 // On Linux we must declare when we can use a non-executable stack.
99 if (TM.getSubtarget().isLinux())
99 if (Triple.getOS() == Triple::Linux)
100100 NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\",@progbits";
101101 }
102102
103 X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM) {
103 X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const Triple &Triple) {
104104 AsmTransCBE = x86_asm_table;
105105 AssemblerDialect = AsmWriterFlavor;
106106 }
107107
108108
109 X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM) {
109 X86WinTargetAsmInfo::X86WinTargetAsmInfo(const Triple &Triple) {
110110 AsmTransCBE = x86_asm_table;
111111 AssemblerDialect = AsmWriterFlavor;
112112
1313 #ifndef X86TARGETASMINFO_H
1414 #define X86TARGETASMINFO_H
1515
16 #include "X86TargetMachine.h"
1716 #include "llvm/Target/TargetAsmInfo.h"
1817 #include "llvm/Target/COFFTargetAsmInfo.h"
1918 #include "llvm/Target/DarwinTargetAsmInfo.h"
2019
2120 namespace llvm {
21 class Triple;
2222
2323 struct X86DarwinTargetAsmInfo : public DarwinTargetAsmInfo {
24 explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
24 explicit X86DarwinTargetAsmInfo(const Triple &Triple);
2525 };
2626
2727 struct X86ELFTargetAsmInfo : public TargetAsmInfo {
28 explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
28 explicit X86ELFTargetAsmInfo(const Triple &Triple);
2929 };
3030
3131 struct X86COFFTargetAsmInfo : public COFFTargetAsmInfo {
32 explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
32 explicit X86COFFTargetAsmInfo(const Triple &Triple);
3333 };
3434
3535 struct X86WinTargetAsmInfo : public TargetAsmInfo {
36 explicit X86WinTargetAsmInfo(const X86TargetMachine &TM);
36 explicit X86WinTargetAsmInfo(const Triple &Triple);
3737 };
3838
3939 } // namespace llvm
2121 #include "llvm/Target/TargetRegistry.h"
2222 using namespace llvm;
2323
24 static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
25 const StringRef &TT) {
26 Triple TheTriple(TT);
27 switch (TheTriple.getOS()) {
28 case Triple::Darwin:
29 return new X86DarwinTargetAsmInfo(TheTriple);
30 case Triple::MinGW32:
31 case Triple::MinGW64:
32 case Triple::Cygwin:
33 return new X86COFFTargetAsmInfo(TheTriple);
34 case Triple::Win32:
35 return new X86WinTargetAsmInfo(TheTriple);
36 default:
37 return new X86ELFTargetAsmInfo(TheTriple);
38 }
39 }
40
2441 extern "C" void LLVMInitializeX86Target() {
2542 // Register the target.
2643 RegisterTargetMachine X(TheX86_32Target);
2744 RegisterTargetMachine Y(TheX86_64Target);
28 }
29
30 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
31 switch (Subtarget.TargetType) {
32 default: llvm_unreachable("unknown subtarget type");
33 case X86Subtarget::isDarwin:
34 return new X86DarwinTargetAsmInfo(*this);
35 case X86Subtarget::isELF:
36 return new X86ELFTargetAsmInfo(*this);
37 case X86Subtarget::isMingw:
38 case X86Subtarget::isCygwin:
39 return new X86COFFTargetAsmInfo(*this);
40 case X86Subtarget::isWindows:
41 return new X86WinTargetAsmInfo(*this);
42 }
43 }
45
46 // Register the target asm info.
47 RegisterAsmInfoFn A(TheX86_32Target, createTargetAsmInfo);
48 RegisterAsmInfoFn B(TheX86_64Target, createTargetAsmInfo);
49 }
50
4451
4552 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
4653 const std::string &FS)
3636 X86TargetLowering TLInfo;
3737 X86ELFWriterInfo ELFWriterInfo;
3838 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
39
40 protected:
41 virtual const TargetAsmInfo *createTargetAsmInfo() const;
4239
4340 public:
4441 X86TargetMachine(const Target &T, const std::string &TT,
1515 #include "XCore.h"
1616 #include "XCoreInstrInfo.h"
1717 #include "XCoreSubtarget.h"
18 #include "XCoreTargetAsmInfo.h"
1819 #include "XCoreTargetMachine.h"
1920 #include "llvm/Constants.h"
2021 #include "llvm/DerivedTypes.h"
2526 #include "llvm/CodeGen/MachineFunctionPass.h"
2627 #include "llvm/CodeGen/MachineConstantPool.h"
2728 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/Target/TargetAsmInfo.h"
2929 #include "llvm/Target/TargetData.h"
3030 #include "llvm/Target/TargetLoweringObjectFile.h"
3131 #include "llvm/Target/TargetRegistry.h"
379379 extern "C" void LLVMInitializeXCoreTarget() {
380380 RegisterTargetMachine X(TheXCoreTarget);
381381 RegisterAsmPrinter Y(TheXCoreTarget);
382 }
382 RegisterAsmInfo Z(TheXCoreTarget);
383 }
99 #include "XCoreTargetAsmInfo.h"
1010 using namespace llvm;
1111
12 XCoreTargetAsmInfo::XCoreTargetAsmInfo() {
12 XCoreTargetAsmInfo::XCoreTargetAsmInfo(const Target &T, const StringRef &TT) {
1313 SupportsDebugInformation = true;
1414 Data16bitsDirective = "\t.short\t";
1515 Data32bitsDirective = "\t.long\t";
1616 #include "llvm/Target/TargetAsmInfo.h"
1717
1818 namespace llvm {
19 class Target;
20 class StringRef;
1921 class XCoreTargetAsmInfo : public TargetAsmInfo {
2022 public:
21 explicit XCoreTargetAsmInfo();
23 explicit XCoreTargetAsmInfo(const Target &T, const StringRef &TT);
2224 };
2325
2426 } // namespace llvm
1616 #include "llvm/PassManager.h"
1717 using namespace llvm;
1818
19 const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
20 return new XCoreTargetAsmInfo();
21 }
22
2319 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
2420 ///
2521 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,
2828 XCoreInstrInfo InstrInfo;
2929 XCoreFrameInfo FrameInfo;
3030 XCoreTargetLowering TLInfo;
31
32 protected:
33 virtual const TargetAsmInfo *createTargetAsmInfo() const;
34
3531 public:
3632 XCoreTargetMachine(const Target &T, const std::string &TT,
3733 const std::string &FS);