llvm.org GIT mirror llvm / a6c4c1e
Do away with kill / dead maps. Move kill / dead info onto MI's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31759 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
2 changed file(s) with 149 addition(s) and 182 deletion(s). Raw diff Collapse all Expand all
106106 ///
107107 std::vector VirtRegInfo;
108108
109 /// RegistersKilled - This map keeps track of all of the registers that
110 /// are dead immediately after an instruction reads its operands. If an
111 /// instruction does not have an entry in this map, it kills no registers.
112 ///
113 std::map > RegistersKilled;
114
115 /// RegistersDead - This map keeps track of all of the registers that are
116 /// dead immediately after an instruction executes, which are not dead after
117 /// the operands are evaluated. In practice, this only contains registers
118 /// which are defined by an instruction, but never used.
119 ///
120 std::map > RegistersDead;
121
122 /// Dummy - An always empty vector used for instructions without dead or
123 /// killed operands.
124 std::vector Dummy;
125
126109 /// AllocatablePhysicalRegisters - This vector keeps track of which registers
127110 /// are actually register allocatable by the target machine. We can not track
128111 /// liveness for values that are not in this set.
139122 std::vector > PHIVarInfoMap;
140123
141124 PHIVarInfoMap PHIVarInfo;
125
126
127 /// addRegisterKilled - We have determined MI kills a register. Look for the
128 /// operand that uses it and mark it as IsKill.
129 void addRegisterKilled(unsigned IncomingReg, MachineInstr *MI);
130
131 /// addRegisterDead - We have determined MI defined a register without a use.
132 /// Look for the operand that defines it and mark it as IsDead.
133 void addRegisterDead(unsigned IncomingReg, MachineInstr *MI);
142134
143135 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
144136 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
152144
153145 virtual bool runOnMachineFunction(MachineFunction &MF);
154146
155 /// killed_iterator - Iterate over registers killed by a machine instruction
156 ///
157 typedef std::vector::iterator killed_iterator;
158
159 std::vector &getKillsVector(MachineInstr *MI) {
160 std::map >::iterator I =
161 RegistersKilled.find(MI);
162 return I != RegistersKilled.end() ? I->second : Dummy;
163 }
164 std::vector &getDeadDefsVector(MachineInstr *MI) {
165 std::map >::iterator I =
166 RegistersDead.find(MI);
167 return I != RegistersDead.end() ? I->second : Dummy;
168 }
169
170
171 /// killed_begin/end - Get access to the range of registers killed by a
172 /// machine instruction.
173 killed_iterator killed_begin(MachineInstr *MI) {
174 return getKillsVector(MI).begin();
175 }
176 killed_iterator killed_end(MachineInstr *MI) {
177 return getKillsVector(MI).end();
178 }
179 std::pair
180 killed_range(MachineInstr *MI) {
181 std::vector &V = getKillsVector(MI);
182 return std::make_pair(V.begin(), V.end());
183 }
184
185147 /// KillsRegister - Return true if the specified instruction kills the
186148 /// specified register.
187149 bool KillsRegister(MachineInstr *MI, unsigned Reg) const;
188150
189 killed_iterator dead_begin(MachineInstr *MI) {
190 return getDeadDefsVector(MI).begin();
191 }
192 killed_iterator dead_end(MachineInstr *MI) {
193 return getDeadDefsVector(MI).end();
194 }
195 std::pair
196 dead_range(MachineInstr *MI) {
197 std::vector &V = getDeadDefsVector(MI);
198 return std::make_pair(V.begin(), V.end());
199 }
200
201151 /// RegisterDefIsDead - Return true if the specified instruction defines the
202152 /// specified register, but that definition is dead.
203153 bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
154
155 /// ModifiesRegister - Return true if the specified instruction modifies the
156 /// specified register.
157 bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const;
204158
205159 //===--------------------------------------------------------------------===//
206160 // API to update live variable information
216170 /// instruction.
217171 ///
218172 void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
219 std::vector &V = RegistersKilled[MI];
220 // Insert in a sorted order.
221 if (V.empty() || IncomingReg > V.back()) {
222 V.push_back(IncomingReg);
223 } else {
224 std::vector::iterator I = V.begin();
225 for (; *I < IncomingReg; ++I)
226 /*empty*/;
227 if (*I != IncomingReg) // Don't insert duplicates.
228 V.insert(I, IncomingReg);
229 }
230 getVarInfo(IncomingReg).Kills.push_back(MI);
231 }
173 addRegisterKilled(IncomingReg, MI);
174 getVarInfo(IncomingReg).Kills.push_back(MI);
175 }
232176
233177 /// removeVirtualRegisterKilled - Remove the specified virtual
234178 /// register from the live variable information. Returns true if the
240184 if (!getVarInfo(reg).removeKill(MI))
241185 return false;
242186
243 std::vector &V = getKillsVector(MI);
244 for (unsigned i = 0, e = V.size(); i != e; ++i)
245 if (V[i] == reg) {
246 V.erase(V.begin()+i);
247 return true;
187 bool Removed = false;
188 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
189 MachineOperand &MO = MI->getOperand(i);
190 if (MO.isReg() && MO.isUse() && MO.getReg() == reg) {
191 MO.unsetIsKill();
192 Removed = true;
193 break;
248194 }
195 }
196
197 assert(Removed && "Register is not used by this instruction!");
249198 return true;
250199 }
251200
257206 /// register is dead after being used by the specified instruction.
258207 ///
259208 void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
260 std::vector &V = RegistersDead[MI];
261 // Insert in a sorted order.
262 if (V.empty() || IncomingReg > V.back()) {
263 V.push_back(IncomingReg);
264 } else {
265 std::vector::iterator I = V.begin();
266 for (; *I < IncomingReg; ++I)
267 /*empty*/;
268 if (*I != IncomingReg) // Don't insert duplicates.
269 V.insert(I, IncomingReg);
270 }
209 addRegisterDead(IncomingReg, MI);
271210 getVarInfo(IncomingReg).Kills.push_back(MI);
272211 }
273212
281220 if (!getVarInfo(reg).removeKill(MI))
282221 return false;
283222
284 std::vector &V = getDeadDefsVector(MI);
285 for (unsigned i = 0, e = V.size(); i != e; ++i)
286 if (V[i] == reg) {
287 V.erase(V.begin()+i);
288 return true;
223 bool Removed = false;
224 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
225 MachineOperand &MO = MI->getOperand(i);
226 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
227 MO.unsetIsDead();
228 Removed = true;
229 break;
289230 }
231 }
232 assert(Removed && "Register is not defined by this instruction!");
290233 return true;
291234 }
292235
300243
301244 virtual void releaseMemory() {
302245 VirtRegInfo.clear();
303 RegistersKilled.clear();
304 RegistersDead.clear();
305246 }
306247
307248 /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
7171 return VirtRegInfo[RegIdx];
7272 }
7373
74 /// registerOverlap - Returns true if register 1 is equal to register 2
75 /// or if register 1 is equal to any of alias of register 2.
76 static bool registerOverlap(unsigned Reg1, unsigned Reg2,
77 const MRegisterInfo *RegInfo) {
78 bool isVirt1 = MRegisterInfo::isVirtualRegister(Reg1);
79 bool isVirt2 = MRegisterInfo::isVirtualRegister(Reg2);
80 if (isVirt1 != isVirt2)
81 return false;
82 if (Reg1 == Reg2)
83 return true;
84 else if (isVirt1)
85 return false;
86 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg2);
87 unsigned Alias = *AliasSet; ++AliasSet) {
88 if (Reg1 == Alias)
89 return true;
90 }
91 return false;
92 }
93
7494 bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
75 std::map >::const_iterator I =
76 RegistersKilled.find(MI);
77 if (I == RegistersKilled.end()) return false;
78
79 // Do a binary search, as these lists can grow pretty big, particularly for
80 // call instructions on targets with lots of call-clobbered registers.
81 return std::binary_search(I->second.begin(), I->second.end(), Reg);
95 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
96 MachineOperand &MO = MI->getOperand(i);
97 if (MO.isReg() && MO.isKill()) {
98 if (registerOverlap(Reg, MO.getReg(), RegInfo))
99 return true;
100 }
101 }
102 return false;
82103 }
83104
84105 bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const {
85 std::map >::const_iterator I =
86 RegistersDead.find(MI);
87 if (I == RegistersDead.end()) return false;
88
89 // Do a binary search, as these lists can grow pretty big, particularly for
90 // call instructions on targets with lots of call-clobbered registers.
91 return std::binary_search(I->second.begin(), I->second.end(), Reg);
106 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
107 MachineOperand &MO = MI->getOperand(i);
108 if (MO.isReg() && MO.isDead())
109 if (registerOverlap(Reg, MO.getReg(), RegInfo))
110 return true;
111 }
112 return false;
113 }
114
115 bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const {
116 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
117 MachineOperand &MO = MI->getOperand(i);
118 if (MO.isReg() && MO.isDef()) {
119 if (registerOverlap(Reg, MO.getReg(), RegInfo))
120 return true;
121 }
122 }
123 return false;
92124 }
93125
94126 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
148180 MarkVirtRegAliveInBlock(VRInfo, *PI);
149181 }
150182
183 void LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
184 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
185 MachineOperand &MO = MI->getOperand(i);
186 if (MO.isReg() && MO.isUse() && MO.getReg() == IncomingReg) {
187 MO.setIsKill();
188 break;
189 }
190 }
191 }
192
193 void LiveVariables::addRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
194 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
195 MachineOperand &MO = MI->getOperand(i);
196 if (MO.isReg() && MO.isDef() && MO.getReg() == IncomingReg) {
197 MO.setIsDead();
198 break;
199 }
200 }
201 }
202
151203 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
152204 PhysRegInfo[Reg] = MI;
153205 PhysRegUsed[Reg] = true;
163215 // Does this kill a previous version of this register?
164216 if (MachineInstr *LastUse = PhysRegInfo[Reg]) {
165217 if (PhysRegUsed[Reg])
166 RegistersKilled[LastUse].push_back(Reg);
218 addRegisterKilled(Reg, LastUse);
167219 else
168 RegistersDead[LastUse].push_back(Reg);
220 addRegisterDead(Reg, LastUse);
169221 }
170222 PhysRegInfo[Reg] = MI;
171223 PhysRegUsed[Reg] = false;
174226 unsigned Alias = *AliasSet; ++AliasSet) {
175227 if (MachineInstr *LastUse = PhysRegInfo[Alias]) {
176228 if (PhysRegUsed[Alias])
177 RegistersKilled[LastUse].push_back(Alias);
229 addRegisterKilled(Alias, LastUse);
178230 else
179 RegistersDead[LastUse].push_back(Alias);
231 addRegisterDead(Alias, LastUse);
180232 }
181233 PhysRegInfo[Alias] = MI;
182234 PhysRegUsed[Alias] = false;
285337 }
286338 }
287339
288 // Finally, if the last block in the function is a return, make sure to mark
340 // Finally, if the last instruction in the block is a return, make sure to mark
289341 // it as using all of the live-out values in the function.
290342 if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
291343 MachineInstr *Ret = &MBB->back();
294346 assert(MRegisterInfo::isPhysicalRegister(*I) &&
295347 "Cannot have a live-in virtual register!");
296348 HandlePhysRegUse(*I, Ret);
349 // Add live-out registers as implicit uses.
350 Ret->addRegOperand(*I, false, true);
297351 }
298352 }
299353
304358 HandlePhysRegDef(i, 0);
305359 }
306360
307 // Convert the information we have gathered into VirtRegInfo and transform it
308 // into a form usable by RegistersKilled.
361 // Convert and transfer the dead / killed information we have gathered into
362 // VirtRegInfo onto MI's.
309363 //
310364 for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i)
311365 for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) {
312366 if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst)
313 RegistersDead[VirtRegInfo[i].Kills[j]].push_back(
314 i + MRegisterInfo::FirstVirtualRegister);
315
367 addRegisterDead(i + MRegisterInfo::FirstVirtualRegister,
368 VirtRegInfo[i].Kills[j]);
316369 else
317 RegistersKilled[VirtRegInfo[i].Kills[j]].push_back(
318 i + MRegisterInfo::FirstVirtualRegister);
319 }
320
321 // Walk through the RegistersKilled/Dead sets, and sort the registers killed
322 // or dead. This allows us to use efficient binary search for membership
323 // testing.
324 for (std::map >::iterator
325 I = RegistersKilled.begin(), E = RegistersKilled.end(); I != E; ++I)
326 std::sort(I->second.begin(), I->second.end());
327 for (std::map >::iterator
328 I = RegistersDead.begin(), E = RegistersDead.end(); I != E; ++I)
329 std::sort(I->second.begin(), I->second.end());
330
370 addRegisterKilled(i + MRegisterInfo::FirstVirtualRegister,
371 VirtRegInfo[i].Kills[j]);
372 }
373
331374 // Check to make sure there are no unreachable blocks in the MC CFG for the
332375 // function. If so, it is due to a bug in the instruction selector or some
333376 // other part of the code generator if this happens.
346389 /// the records for NewMI.
347390 void LiveVariables::instructionChanged(MachineInstr *OldMI,
348391 MachineInstr *NewMI) {
349 // If the instruction defines any virtual registers, update the VarInfo for
350 // the instruction.
392 // If the instruction defines any virtual registers, update the VarInfo,
393 // kill and dead information for the instruction.
351394 for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) {
352395 MachineOperand &MO = OldMI->getOperand(i);
353396 if (MO.isRegister() && MO.getReg() &&
355398 unsigned Reg = MO.getReg();
356399 VarInfo &VI = getVarInfo(Reg);
357400 if (MO.isDef()) {
401 if (MO.isDead()) {
402 MO.unsetIsDead();
403 addVirtualRegisterDead(Reg, NewMI);
404 }
358405 // Update the defining instruction.
359406 if (VI.DefInst == OldMI)
360407 VI.DefInst = NewMI;
361408 }
362409 if (MO.isUse()) {
410 if (MO.isKill()) {
411 MO.unsetIsKill();
412 addVirtualRegisterKilled(Reg, NewMI);
413 }
363414 // If this is a kill of the value, update the VI kills list.
364415 if (VI.removeKill(OldMI))
365416 VI.Kills.push_back(NewMI); // Yes, there was a kill of it
366417 }
367418 }
368419 }
369
370 // Move the killed information over...
371 killed_iterator I, E;
372 tie(I, E) = killed_range(OldMI);
373 if (I != E) {
374 std::vector &V = RegistersKilled[NewMI];
375 bool WasEmpty = V.empty();
376 V.insert(V.end(), I, E);
377 if (!WasEmpty)
378 std::sort(V.begin(), V.end()); // Keep the reg list sorted.
379 RegistersKilled.erase(OldMI);
380 }
381
382 // Move the dead information over...
383 tie(I, E) = dead_range(OldMI);
384 if (I != E) {
385 std::vector &V = RegistersDead[NewMI];
386 bool WasEmpty = V.empty();
387 V.insert(V.end(), I, E);
388 if (!WasEmpty)
389 std::sort(V.begin(), V.end()); // Keep the reg list sorted.
390 RegistersDead.erase(OldMI);
391 }
392420 }
393421
394422 /// removeVirtualRegistersKilled - Remove all killed info for the specified
395423 /// instruction.
396424 void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
397 std::map >::iterator I =
398 RegistersKilled.find(MI);
399 if (I == RegistersKilled.end()) return;
400
401 std::vector &Regs = I->second;
402 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
403 if (MRegisterInfo::isVirtualRegister(Regs[i])) {
404 bool removed = getVarInfo(Regs[i]).removeKill(MI);
405 assert(removed && "kill not in register's VarInfo?");
406 }
407 }
408 RegistersKilled.erase(I);
425 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
426 MachineOperand &MO = MI->getOperand(i);
427 if (MO.isReg() && MO.isKill()) {
428 MO.unsetIsKill();
429 unsigned Reg = MO.getReg();
430 if (MRegisterInfo::isVirtualRegister(Reg)) {
431 bool removed = getVarInfo(Reg).removeKill(MI);
432 assert(removed && "kill not in register's VarInfo?");
433 }
434 }
435 }
409436 }
410437
411438 /// removeVirtualRegistersDead - Remove all of the dead registers for the
412439 /// specified instruction from the live variable information.
413440 void LiveVariables::removeVirtualRegistersDead(MachineInstr *MI) {
414 std::map >::iterator I =
415 RegistersDead.find(MI);
416 if (I == RegistersDead.end()) return;
417
418 std::vector &Regs = I->second;
419 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
420 if (MRegisterInfo::isVirtualRegister(Regs[i])) {
421 bool removed = getVarInfo(Regs[i]).removeKill(MI);
422 assert(removed && "kill not in register's VarInfo?");
423 }
424 }
425 RegistersDead.erase(I);
441 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
442 MachineOperand &MO = MI->getOperand(i);
443 if (MO.isReg() && MO.isDead()) {
444 MO.unsetIsDead();
445 unsigned Reg = MO.getReg();
446 if (MRegisterInfo::isVirtualRegister(Reg)) {
447 bool removed = getVarInfo(Reg).removeKill(MI);
448 assert(removed && "kill not in register's VarInfo?");
449 }
450 }
451 }
426452 }
427453
428454 /// analyzePHINodes - Gather information about the PHI nodes in here. In