llvm.org GIT mirror llvm / a618486
[AArch64] Add support for Cortex-A76 and Cortex-A76AE - Add LLVM backend support for Cortex-A76 and Cortex-A76AE - Documentation can be found at https://developer.arm.com/products/processors/cortex-a/cortex-a76 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354788 91177308-0d34-0410-b5e6-96231b3b80d8 Luke Cheeseman 8 months ago
15 changed file(s) with 81 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
9292 (AArch64::AEK_CRC))
9393 AARCH64_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
9494 (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC))
95 AARCH64_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
96 (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
97 AArch64::AEK_SSBS))
98 AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
99 (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
100 AArch64::AEK_SSBS))
95101 AARCH64_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
96102 (AArch64::AEK_NONE))
97103 AARCH64_CPU_NAME("exynos-m1", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
260260 ARM_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
261261 ARM_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
262262 (ARM::AEK_FP16 | ARM::AEK_DOTPROD))
263 ARM_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
264 (ARM::AEK_FP16 | ARM::AEK_DOTPROD))
265 ARM_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
266 (ARM::AEK_FP16 | ARM::AEK_DOTPROD))
263267 ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
264268 ARM_CPU_NAME("exynos-m1", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
265269 ARM_CPU_NAME("exynos-m2", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
480480 FeatureRCPC,
481481 FeaturePerfMon
482482 ]>;
483
484 def ProcA76 : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
485 "Cortex-A76 ARM processors", [
486 HasV8_2aOps,
487 FeatureFPARMv8,
488 FeatureNEON,
489 FeatureRCPC,
490 FeatureCrypto,
491 FeatureFullFP16,
492 FeatureDotProd,
493 FeatureSSBS
494 ]>;
483495
484496 // Note that cyclone does not fuse AES instructions, but newer apple chips do
485497 // perform the fusion and cyclone is used by default when targetting apple OSes.
692704 def : ProcessorModel<"cortex-a53", CortexA53Model, [ProcA53]>;
693705 def : ProcessorModel<"cortex-a55", CortexA53Model, [ProcA55]>;
694706 def : ProcessorModel<"cortex-a57", CortexA57Model, [ProcA57]>;
695 // FIXME: Cortex-A72, Cortex-A73 and Cortex-A75 are currently modeled as a Cortex-A57.
696707 def : ProcessorModel<"cortex-a72", CortexA57Model, [ProcA72]>;
697708 def : ProcessorModel<"cortex-a73", CortexA57Model, [ProcA73]>;
698709 def : ProcessorModel<"cortex-a75", CortexA57Model, [ProcA75]>;
710 def : ProcessorModel<"cortex-a76", CortexA57Model, [ProcA76]>;
711 def : ProcessorModel<"cortex-a76ae", CortexA57Model, [ProcA76]>;
699712 def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
700713 def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
701714 def : ProcessorModel<"exynos-m2", ExynosM1Model, [ProcExynosM2]>;
8181 case CortexA72:
8282 case CortexA73:
8383 case CortexA75:
84 case CortexA76:
8485 PrefFunctionAlignment = 4;
8586 break;
8687 case Cyclone:
4444 CortexA72,
4545 CortexA73,
4646 CortexA75,
47 CortexA76,
4748 Cyclone,
4849 ExynosM1,
4950 ExynosM3,
493493 "Cortex-A73 ARM processors", []>;
494494 def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
495495 "Cortex-A75 ARM processors", []>;
496 def ProcA76 : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
497 "Cortex-A76 ARM processors", []>;
496498
497499 def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
498500 "Qualcomm Krait processors", []>;
10581060 FeatureHWDivARM,
10591061 FeatureDotProd]>;
10601062
1063 def : ProcNoItin<"cortex-a76", [ARMv82a, ProcA76,
1064 FeatureHWDivThumb,
1065 FeatureHWDivARM,
1066 FeatureCrypto,
1067 FeatureCRC,
1068 FeatureFullFP16,
1069 FeatureDotProd]>;
1070
1071 def : ProcNoItin<"cortex-a76ae", [ARMv82a, ProcA76,
1072 FeatureHWDivThumb,
1073 FeatureHWDivARM,
1074 FeatureCrypto,
1075 FeatureCRC,
1076 FeatureFullFP16,
1077 FeatureDotProd]>;
1078
10611079 def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
10621080 FeatureHasRetAddrStack,
10631081 FeatureNEONForFP,
283283 case CortexA72:
284284 case CortexA73:
285285 case CortexA75:
286 case CortexA76:
286287 case CortexR4:
287288 case CortexR4F:
288289 case CortexR5:
5858 CortexA72,
5959 CortexA73,
6060 CortexA75,
61 CortexA76,
6162 CortexA8,
6263 CortexA9,
6364 CortexM3,
88 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
99 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
1010 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a75 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a76ae 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a76 2>&1 | FileCheck %s
1113 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
1214 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m2 2>&1 | FileCheck %s
1315 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m3 2>&1 | FileCheck %s
0 // RUN: llvm-mc -triple aarch64 -mattr=+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
11 // RUN: llvm-mc -triple aarch64 -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
2 // RUN: llvm-mc -triple aarch64 -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
23 // RUN: llvm-mc -triple aarch64 -mcpu=cortex-a55 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
34 // RUN: llvm-mc -triple aarch64 -mcpu=tsv110 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
45 // RUN: not llvm-mc -triple aarch64 -mattr=+v8.2a -show-encoding < %s 2> %t
0 // RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+ssbs < %s | FileCheck %s
11 // RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8.5a < %s | FileCheck %s
2 // RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-a76 < %s | FileCheck %s
3 // RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-a76ae < %s | FileCheck %s
24 // RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-ssbs < %s 2>&1 | FileCheck %s --check-prefix=NOSPECID
35
46 mrs x2, SSBS
0 // RUN: llvm-mc -triple arm -mattr=+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK
11 // RUN: llvm-mc -triple arm -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
2 // RUN: llvm-mc -triple arm -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
23 // RUN: llvm-mc -triple arm -mcpu=cortex-a55 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
34
45 // RUN: not llvm-mc -triple arm -mattr=-dotprod -show-encoding < %s 2> %t
0 // RUN: llvm-mc -triple thumb -mattr=+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK
11 // RUN: llvm-mc -triple thumb -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
2 // RUN: llvm-mc -triple thumb -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
23 // RUN: llvm-mc -triple thumb -mcpu=cortex-a55 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
34
45 // RUN: not llvm-mc -triple thumb -mattr=-dotprod -show-encoding < %s 2> %t
0 # RUN: llvm-mc -triple=aarch64 -mattr=+ssbs -disassemble < %s | FileCheck %s
11 # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s
2 # RUN: llvm-mc -triple=aarch64 -mcpu=cortex-a76 -disassemble < %s | FileCheck %s
3 # RUN: llvm-mc -triple=aarch64 -mcpu=cortex-a76ae -disassemble < %s | FileCheck %s
24 # RUN: llvm-mc -triple=aarch64 -mattr=-ssbs -disassemble < %s | FileCheck %s --check-prefix=NOSPECID
35
46 [0x3f 0x41 0x03 0xd5]
243243 ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_FP16 |
244244 ARM::AEK_RAS | ARM::AEK_DOTPROD,
245245 "8.2-A"));
246 EXPECT_TRUE(testARMCPU("cortex-a76", "armv8.2-a", "crypto-neon-fp-armv8",
247 ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
248 ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
249 ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_FP16 |
250 ARM::AEK_RAS | ARM::AEK_DOTPROD,
251 "8.2-A"));
252 EXPECT_TRUE(testARMCPU("cortex-a76ae", "armv8.2-a", "crypto-neon-fp-armv8",
253 ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
254 ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
255 ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_FP16 |
256 ARM::AEK_RAS | ARM::AEK_DOTPROD,
257 "8.2-A"));
246258 EXPECT_TRUE(testARMCPU("cyclone", "armv8-a", "crypto-neon-fp-armv8",
247259 ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
248260 ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
282294 "7-S"));
283295 }
284296
285 static constexpr unsigned NumARMCPUArchs = 82;
297 static constexpr unsigned NumARMCPUArchs = 84;
286298
287299 TEST(TargetParserTest, testARMCPUArchList) {
288300 SmallVector List;
743755 AArch64::AEK_RDM | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
744756 AArch64::AEK_RCPC, "8.2-A"));
745757 EXPECT_TRUE(testAArch64CPU(
758 "cortex-a76", "armv8.2-a", "crypto-neon-fp-armv8",
759 AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
760 AArch64::AEK_RDM | AArch64::AEK_SIMD | AArch64::AEK_RAS |
761 AArch64::AEK_LSE | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
762 AArch64::AEK_RCPC| AArch64::AEK_SSBS, "8.2-A"));
763 EXPECT_TRUE(testAArch64CPU(
764 "cortex-a76ae", "armv8.2-a", "crypto-neon-fp-armv8",
765 AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
766 AArch64::AEK_RDM | AArch64::AEK_SIMD | AArch64::AEK_RAS |
767 AArch64::AEK_LSE | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
768 AArch64::AEK_RCPC| AArch64::AEK_SSBS, "8.2-A"));
769 EXPECT_TRUE(testAArch64CPU(
746770 "cyclone", "armv8-a", "crypto-neon-fp-armv8",
747771 AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD, "8-A"));
748772 EXPECT_TRUE(testAArch64CPU(
804828 "8.2-A"));
805829 }
806830
807 static constexpr unsigned NumAArch64CPUArchs = 21;
831 static constexpr unsigned NumAArch64CPUArchs = 23;
808832
809833 TEST(TargetParserTest, testAArch64CPUArchList) {
810834 SmallVector List;