llvm.org GIT mirror llvm / a5f79d9
Fix PREL31 relocation on ARM Summary: This is a 31bits relative relocation instead of a 32bits absolute relocation. Reviewers: t.p.northover, peter.smith, rengolin Subscribers: aemerson, llvm-commits, samparker Differential Revision: https://reviews.llvm.org/D25069 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284780 91177308-0d34-0410-b5e6-96231b3b80d8 Keno Fischer 3 years ago
2 changed file(s) with 27 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
462462
463463 case ELF::R_ARM_NONE:
464464 break;
465 // Write a 31bit signed offset
465466 case ELF::R_ARM_PREL31:
467 *TargetPtr &= 0x80000000;
468 *TargetPtr |= (Value - FinalAddress) & ~0x80000000;
469 break;
466470 case ELF::R_ARM_TARGET1:
467471 case ELF::R_ARM_ABS32:
468472 *TargetPtr = Value;
0 # RUN: llvm-mc -triple=arm-linux-gnueabihf -filetype=obj -o %T/reloc.o %s
1 # RUN: llvm-rtdyld -triple=arm-linux-gnueabihf -verify -map-section reloc.o,.ARM.exidx=0x6000 -map-section reloc.o,.text=0x4000 -dummy-extern __aeabi_unwind_cpp_pr0=0x1234 -check=%s %T/reloc.o
2
3 .text
4 .syntax unified
5 .eabi_attribute 67, "2.09" @ Tag_conformance
6 .cpu cortex-a8
7 .fpu neon
8 .file "reloc.c"
9 .globl g
10 .align 2
11 .type g,%function
12 g:
13 .fnstart
14 movw r0, #1
15 bx lr
16 .Lfunc_end0:
17 .size g, .Lfunc_end0-g
18 .fnend
19
20 # rtdyld-check: *{4}(section_addr(reloc.o, .ARM.exidx)) = (g - (section_addr(reloc.o, .ARM.exidx))) & 0x7fffffff
21 # Compat unwind info: finish(0xb0), finish(0xb0), finish(0xb0)
22 # rtdyld-check: *{4}(section_addr(reloc.o, .ARM.exidx) + 0x4) = 0x80b0b0b0