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Merging r341512: ------------------------------------------------------------------------ r341512 | ctopper | 2018-09-06 04:03:14 +0200 (Thu, 06 Sep 2018) | 7 lines [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. This basically reverts a change made in r336217, but improves the text of the error message for not allowing IP-relative addressing in 32-bit mode. Fixes PR38826. Patch by Iain Sandoe. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_70@341530 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 2 years ago
4 changed file(s) with 30 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
10531053 // RIP/EIP-relative addressing is only supported in 64-bit mode.
10541054 if (!Is64BitMode && BaseReg != 0 &&
10551055 (BaseReg == X86::RIP || BaseReg == X86::EIP)) {
1056 ErrMsg = "RIP-relative addressing requires 64-bit mode";
1056 ErrMsg = "IP-relative addressing requires 64-bit mode";
10571057 return true;
10581058 }
10591059
10981098 // checked.
10991099 // FIXME: Check AH, CH, DH, BH cannot be used in an instruction requiring a
11001100 // REX prefix.
1101 if (RegNo == X86::RIZ || RegNo == X86::RIP || RegNo == X86::EIP ||
1101 if (RegNo == X86::RIZ || RegNo == X86::RIP ||
11021102 X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo) ||
11031103 X86II::isX86_64NonExtLowByteReg(RegNo) ||
11041104 X86II::isX86_64ExtendedReg(RegNo))
0 ; RUN: not llc -mtriple i386-apple-- -o /dev/null < %s 2>&1| FileCheck %s
1 ; CHECK: :1:13: error: register %eip is only available in 64-bit mode
1 ; CHECK: :1:13: error: IP-relative addressing requires 64-bit mode
22 ; CHECK-NEXT: jmpl *_foo(%eip)
33
4 ; Make sure that we emit an error if we encounter RIP-relative instructions in
4 ; Make sure that we emit an error if we encounter IP-relative instructions in
55 ; 32-bit mode.
66
77 define i32 @foo() { ret i32 0 }
0 // RUN: llvm-mc %s -triple i386-unknown-unknown
1
2 // Make sure %eip is allowed as a register in cfi directives in 32-bit mode
3
4 .text
5 .align 4
6 .globl foo
7
8 foo:
9 .cfi_startproc
10
11 movl (%edx), %ecx
12 movl 4(%edx), %ebx
13 movl 8(%edx), %esi
14 movl 12(%edx), %edi
15 movl 16(%edx), %ebp
16 .cfi_def_cfa %edx, 0
17 .cfi_offset %eip, 24
18 .cfi_register %esp, %ecx
19 movl %ecx, %esp
20
21 jmp *24(%edx)
22
23 .cfi_endproc
102102 // 64: error: invalid 16-bit base register
103103 lea (%di,%bx), %ax
104104
105 // 32: error: register %eip is only available in 64-bit mode
105 // 32: error: invalid base+index expression
106106 // 64: error: invalid base+index expression
107107 mov (,%eip), %rbx
108108
109 // 32: error: register %eip is only available in 64-bit mode
109 // 32: error: invalid base+index expression
110110 // 64: error: invalid base+index expression
111111 mov (%eip,%eax), %rbx
112112