llvm.org GIT mirror llvm / a579389
Mips generic fallback instruction schedule support! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41149 91177308-0d34-0410-b5e6-96231b3b80d8 Bruno Cardoso Lopes 13 years ago
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0 //===- MipsSchedule.td - Mips Scheduling Definitions ------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file was developed by Bruno Cardoso Lopes and is distributed under the
5 // University of Illinois Open Source License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 //===----------------------------------------------------------------------===//
10 // Functional units across Mips chips sets. Based on GCC/Mips backend files.
11 //===----------------------------------------------------------------------===//
12 def ALU : FuncUnit;
13 def IMULDIV : FuncUnit;
14
15 //===----------------------------------------------------------------------===//
16 // Instruction Itinerary classes used for Mips
17 //===----------------------------------------------------------------------===//
18 def IIAlu : InstrItinClass;
19 def IILoad : InstrItinClass;
20 def IIStore : InstrItinClass;
21 def IIXfer : InstrItinClass;
22 def IIBranch : InstrItinClass;
23 def IIHiLo : InstrItinClass;
24 def IIImul : InstrItinClass;
25 def IIIdiv : InstrItinClass;
26 def IIFcvt : InstrItinClass;
27 def IIFmove : InstrItinClass;
28 def IIFcmp : InstrItinClass;
29 def IIFadd : InstrItinClass;
30 def IIFmulSingle : InstrItinClass;
31 def IIFmulDouble : InstrItinClass;
32 def IIFdivSingle : InstrItinClass;
33 def IIFdivDouble : InstrItinClass;
34 def IIFsqrtSingle : InstrItinClass;
35 def IIFsqrtDouble : InstrItinClass;
36 def IIFrecipFsqrtStep : InstrItinClass;
37 def IIPseudo : InstrItinClass;
38
39 //===----------------------------------------------------------------------===//
40 // Mips Generic instruction itineraries.
41 //===----------------------------------------------------------------------===//
42 def MipsGenericItineraries : ProcessorItineraries<[
43 InstrItinData]>,
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45 InstrItinData]>,
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62 ]>;