llvm.org GIT mirror llvm / a529a37
rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45647 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 11 years ago
2 changed file(s) with 107 addition(s) and 85 deletion(s). Raw diff Collapse all Expand all
137137 }
138138
139139 //===----------------------------------------------------------------------===//
140 // Main Output.
141 //===----------------------------------------------------------------------===//
142
143 // run - Emit the main instruction description records for the target...
144 void InstrInfoEmitter::run(std::ostream &OS) {
145 GatherItinClasses();
146
147 EmitSourceFileHeader("Target Instruction Descriptors", OS);
148 OS << "namespace llvm {\n\n";
149
150 CodeGenTarget Target;
151 const std::string &TargetName = Target.getName();
152 Record *InstrInfo = Target.getInstructionSet();
153
154 // Keep track of all of the def lists we have emitted already.
155 std::map, unsigned> EmittedLists;
156 unsigned ListNumber = 0;
157
158 // Emit all of the instruction's implicit uses and defs.
159 for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
160 E = Target.inst_end(); II != E; ++II) {
161 Record *Inst = II->second.TheDef;
162 std::vector Uses = Inst->getValueAsListOfDefs("Uses");
163 if (!Uses.empty()) {
164 unsigned &IL = EmittedLists[Uses];
165 if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS);
166 }
167 std::vector Defs = Inst->getValueAsListOfDefs("Defs");
168 if (!Defs.empty()) {
169 unsigned &IL = EmittedLists[Defs];
170 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS);
171 }
172 }
173
174 OperandInfoMapTy OperandInfoIDs;
175
176 // Emit all of the operand info records.
177 EmitOperandInfo(OS, OperandInfoIDs);
178
179 // Emit all of the TargetInstrDescriptor records in their ENUM ordering.
180 //
181 OS << "\nstatic const TargetInstrDescriptor " << TargetName
182 << "Insts[] = {\n";
183 std::vector NumberedInstructions;
184 Target.getInstructionsByEnumValue(NumberedInstructions);
185
186 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i)
187 emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists,
188 OperandInfoIDs, OS);
189 OS << "};\n";
190 OS << "} // End llvm namespace \n";
191 }
192
193 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
194 Record *InstrInfo,
195 std::map, unsigned> &EmittedLists,
196 const OperandInfoMapTy &OpInfo,
197 std::ostream &OS) {
198 int MinOperands;
199 if (!Inst.OperandList.empty())
200 // Each logical operand can be multiple MI operands.
201 MinOperands = Inst.OperandList.back().MIOperandNo +
202 Inst.OperandList.back().MINumOperands;
203 else
204 MinOperands = 0;
205
206 OS << " { ";
207 OS << Num << ",\t" << MinOperands << ",\t"
208 << Inst.NumDefs << ",\t\"";
209
210 if (Inst.Name.empty())
211 OS << Inst.TheDef->getName();
212 else
213 OS << Inst.Name;
214
215 OS << "\",\t" << getItinClassNumber(Inst.TheDef) << ", 0";
216
217 // Try to determine (from the pattern), if the instruction is a store.
218 bool isStore = false;
140 // Instruction Analysis
141 //===----------------------------------------------------------------------===//
142
143 void InstrInfoEmitter::InferFromPattern(const CodeGenInstruction &Inst,
144 bool &isStore, bool &isLoad,
145 bool &NeverHasSideEffects) {
146 isStore = Inst.isStore;
147 isLoad = Inst.isLoad;
148 NeverHasSideEffects = Inst.neverHasSideEffects;
149
150 const TreePattern *Pattern = CDP.getInstruction(Inst.TheDef).getPattern();
151 if (Pattern == 0) return; // No pattern.
152
153 // FIXME: Change this to use pattern info.
219154 if (dynamic_cast(Inst.TheDef->getValueInit("Pattern"))) {
220155 ListInit *LI = Inst.TheDef->getValueAsListInit("Pattern");
221156 if (LI && LI->getSize() > 0) {
231166 }
232167 }
233168 }
169
170 }
171
172
173 //===----------------------------------------------------------------------===//
174 // Main Output.
175 //===----------------------------------------------------------------------===//
176
177 // run - Emit the main instruction description records for the target...
178 void InstrInfoEmitter::run(std::ostream &OS) {
179 GatherItinClasses();
180
181 EmitSourceFileHeader("Target Instruction Descriptors", OS);
182 OS << "namespace llvm {\n\n";
183
184 CodeGenTarget Target;
185 const std::string &TargetName = Target.getName();
186 Record *InstrInfo = Target.getInstructionSet();
187
188 // Keep track of all of the def lists we have emitted already.
189 std::map, unsigned> EmittedLists;
190 unsigned ListNumber = 0;
191
192 // Emit all of the instruction's implicit uses and defs.
193 for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
194 E = Target.inst_end(); II != E; ++II) {
195 Record *Inst = II->second.TheDef;
196 std::vector Uses = Inst->getValueAsListOfDefs("Uses");
197 if (!Uses.empty()) {
198 unsigned &IL = EmittedLists[Uses];
199 if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS);
200 }
201 std::vector Defs = Inst->getValueAsListOfDefs("Defs");
202 if (!Defs.empty()) {
203 unsigned &IL = EmittedLists[Defs];
204 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS);
205 }
206 }
207
208 OperandInfoMapTy OperandInfoIDs;
209
210 // Emit all of the operand info records.
211 EmitOperandInfo(OS, OperandInfoIDs);
212
213 // Emit all of the TargetInstrDescriptor records in their ENUM ordering.
214 //
215 OS << "\nstatic const TargetInstrDescriptor " << TargetName
216 << "Insts[] = {\n";
217 std::vector NumberedInstructions;
218 Target.getInstructionsByEnumValue(NumberedInstructions);
219
220 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i)
221 emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists,
222 OperandInfoIDs, OS);
223 OS << "};\n";
224 OS << "} // End llvm namespace \n";
225 }
226
227 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
228 Record *InstrInfo,
229 std::map, unsigned> &EmittedLists,
230 const OperandInfoMapTy &OpInfo,
231 std::ostream &OS) {
232 // Determine properties of the instruction from its pattern.
233 bool isStore, isLoad, NeverHasSideEffects;
234 InferFromPattern(Inst, isStore, isLoad, NeverHasSideEffects);
235
236 if (NeverHasSideEffects && Inst.mayHaveSideEffects) {
237 std::cerr << "error: Instruction '" << Inst.getName()
238 << "' is marked with 'mayHaveSideEffects', but it can never have them!\n";
239 exit(1);
240 }
241
242 int MinOperands = 0;
243 if (!Inst.OperandList.empty())
244 // Each logical operand can be multiple MI operands.
245 MinOperands = Inst.OperandList.back().MIOperandNo +
246 Inst.OperandList.back().MINumOperands;
247
248 OS << " { ";
249 OS << Num << ",\t" << MinOperands << ",\t"
250 << Inst.NumDefs << ",\t\"" << Inst.getName();
251 OS << "\",\t" << getItinClassNumber(Inst.TheDef) << ", 0";
234252
235253 // Emit all of the target indepedent flags...
236254 if (Inst.isReturn) OS << "|M_RET_FLAG";
239257 if (Inst.isBarrier) OS << "|M_BARRIER_FLAG";
240258 if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
241259 if (Inst.isCall) OS << "|M_CALL_FLAG";
242 if (Inst.isLoad) OS << "|M_LOAD_FLAG";
243 if (Inst.isStore || isStore) OS << "|M_STORE_FLAG";
260 if (isLoad) OS << "|M_LOAD_FLAG";
261 if (isStore) OS << "|M_STORE_FLAG";
244262 if (Inst.isImplicitDef)OS << "|M_IMPLICIT_DEF_FLAG";
245263 if (Inst.isPredicable) OS << "|M_PREDICABLE";
246264 if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
247265 if (Inst.isCommutable) OS << "|M_COMMUTABLE";
248266 if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
249267 if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
250 if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE";
251 if (Inst.hasOptionalDef) OS << "|M_HAS_OPTIONAL_DEF";
268 if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE";
269 if (Inst.hasOptionalDef) OS << "|M_HAS_OPTIONAL_DEF";
252270 if (Inst.usesCustomDAGSchedInserter)
253271 OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
254272 if (Inst.hasVariableNumberOfOperands) OS << "|M_VARIABLE_OPS";
255 if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
256 if (Inst.neverHasSideEffects) OS << "|M_NEVER_HAS_SIDE_EFFECTS";
273 if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
274 if (NeverHasSideEffects) OS << "|M_NEVER_HAS_SIDE_EFFECTS";
257275 OS << ", 0";
258276
259277 // Emit all of the target-specific flags...
4040 private:
4141 typedef std::map, unsigned> OperandInfoMapTy;
4242
43 // Instruction analysis.
44 void InferFromPattern(const CodeGenInstruction &Inst,
45 bool &isStore, bool &isLoad, bool &NeverHasSideEffects);
46
4347 void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
4448 Record *InstrInfo,
4549 std::map, unsigned> &EL,