llvm.org GIT mirror llvm / a425e00
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_negdi2_s.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_lshrdi3_s.o ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:unknown:Undefined local symbol LBB21_11 {standard input}:unknown:Undefined local symbol LBB21_12 {standard input}:unknown:Undefined local symbol LBB21_13 {standard input}:unknown:Undefined local symbol LBB21_8 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 11 years ago
10 changed file(s) with 102 addition(s) and 133 deletion(s). Raw diff Collapse all Expand all
254254 def int_eh_typeid_for_i32 : Intrinsic<[llvm_i32_ty, llvm_ptr_ty]>;
255255 def int_eh_typeid_for_i64 : Intrinsic<[llvm_i64_ty, llvm_ptr_ty]>;
256256
257 def int_eh_return_i32 : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>;
258 def int_eh_return_i64 : Intrinsic<[llvm_void_ty, llvm_i64_ty, llvm_ptr_ty]>;
257 def int_eh_return : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>,
258 GCCBuiltin<"__builtin_eh_return">;
259259
260260 def int_eh_unwind_init: Intrinsic<[llvm_void_ty]>,
261261 GCCBuiltin<"__builtin_unwind_init">;
6767 };
6868 }
6969
70 // Stack canary model types.
71 namespace StackCanaries {
72 enum Model {
73 Default,
74 On,
75 Always
76 };
77 }
78
7079 //===----------------------------------------------------------------------===//
7180 ///
7281 /// TargetMachine - Primary interface to the complete machine description for
31143114 MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
31153115 MVT VT = (Intrinsic == Intrinsic::eh_typeid_for_i32 ?
31163116 MVT::i32 : MVT::i64);
3117
3117
31183118 if (MMI) {
31193119 // Find the type id for the given typeinfo.
31203120 GlobalVariable *GV = ExtractTypeInfo(I.getOperand(1));
31293129 return 0;
31303130 }
31313131
3132 case Intrinsic::eh_return_i32:
3133 case Intrinsic::eh_return_i64:
3134 if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
3132 case Intrinsic::eh_return: {
3133 MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
3134
3135 if (MMI) {
31353136 MMI->setCallsEHReturn(true);
31363137 DAG.setRoot(DAG.getNode(ISD::EH_RETURN,
31373138 MVT::Other,
31433144 }
31443145
31453146 return 0;
3146 case Intrinsic::eh_unwind_init:
3147 if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
3148 MMI->setCallsUnwindInit(true);
3149 }
3150
3151 return 0;
3152
3153 case Intrinsic::eh_dwarf_cfa: {
3154 MVT VT = getValue(I.getOperand(1)).getValueType();
3155 SDValue CfaArg;
3156 if (VT.bitsGT(TLI.getPointerTy()))
3157 CfaArg = DAG.getNode(ISD::TRUNCATE,
3158 TLI.getPointerTy(), getValue(I.getOperand(1)));
3159 else
3160 CfaArg = DAG.getNode(ISD::SIGN_EXTEND,
3161 TLI.getPointerTy(), getValue(I.getOperand(1)));
3162
3163 SDValue Offset = DAG.getNode(ISD::ADD,
3164 TLI.getPointerTy(),
3165 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET,
3166 TLI.getPointerTy()),
3167 CfaArg);
3168 setValue(&I, DAG.getNode(ISD::ADD,
3169 TLI.getPointerTy(),
3170 DAG.getNode(ISD::FRAMEADDR,
3171 TLI.getPointerTy(),
3172 DAG.getConstant(0,
3173 TLI.getPointerTy())),
3174 Offset));
3175 return 0;
3147 }
3148
3149 case Intrinsic::eh_unwind_init: {
3150 if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
3151 MMI->setCallsUnwindInit(true);
3152 }
3153
3154 return 0;
3155 }
3156
3157 case Intrinsic::eh_dwarf_cfa: {
3158 MVT VT = getValue(I.getOperand(1)).getValueType();
3159 SDValue CfaArg;
3160 if (VT.bitsGT(TLI.getPointerTy()))
3161 CfaArg = DAG.getNode(ISD::TRUNCATE,
3162 TLI.getPointerTy(), getValue(I.getOperand(1)));
3163 else
3164 CfaArg = DAG.getNode(ISD::SIGN_EXTEND,
3165 TLI.getPointerTy(), getValue(I.getOperand(1)));
3166
3167 SDValue Offset = DAG.getNode(ISD::ADD,
3168 TLI.getPointerTy(),
3169 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET,
3170 TLI.getPointerTy()),
3171 CfaArg);
3172 setValue(&I, DAG.getNode(ISD::ADD,
3173 TLI.getPointerTy(),
3174 DAG.getNode(ISD::FRAMEADDR,
3175 TLI.getPointerTy(),
3176 DAG.getConstant(0,
3177 TLI.getPointerTy())),
3178 Offset));
3179 return 0;
31763180 }
31773181
31783182 case Intrinsic::sqrt:
3939 bool RealignStack;
4040 bool VerboseAsm;
4141 bool DisableJumpTables;
42 StackCanaries::Model StackProtectors;
4243 }
4344
4445 static cl::opt PrintCode("print-machineinstrs",
162163 cl::location(DisableJumpTables),
163164 cl::init(false));
164165
166 static cl::opt
167 GenerateStackProtectors("stack-protector",
168 cl::desc("Generate stack protectors"),
169 cl::location(StackProtectors),
170 cl::init(StackCanaries::Default),
171 cl::values(
172 clEnumValN(StackCanaries::Default, "default",
173 " No stack protectors"),
174 clEnumValN(StackCanaries::On, "on",
175 " Generate stack protectors for functions that"
176 "need them"),
177 clEnumValN(StackCanaries::Always, "all",
178 " Generate stack protectors for all functions"),
179 clEnumValEnd));
180
165181 //---------------------------------------------------------------------------
166182 // TargetMachine Class
167183 //
315315 setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
316316 setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
317317 if (Subtarget->is64Bit()) {
318 // FIXME: Verify
318319 setExceptionPointerRegister(X86::RAX);
319320 setExceptionSelectorRegister(X86::RDX);
320321 } else {
55945595
55955596 SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
55965597 return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI,
5597 DAG.getIntPtrConstant(Subtarget->is64Bit() ? 8 : 4));
5598 DAG.getIntPtrConstant(!Subtarget->is64Bit() ? 4 : 8));
55985599 }
55995600
56005601 SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
56045605
56055606 SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
56065607 {
5608 assert(!Subtarget->is64Bit() &&
5609 "Lowering of eh_return builtin is not supported yet on x86-64");
5610
56075611 MachineFunction &MF = DAG.getMachineFunction();
56085612 SDValue Chain = Op.getOperand(0);
56095613 SDValue Offset = Op.getOperand(1);
56105614 SDValue Handler = Op.getOperand(2);
56115615
5612 SDValue Frame = DAG.getRegister(Subtarget->is64Bit() ? X86::RBP : X86::EBP,
5613 getPointerTy());
5614 unsigned StoreAddrReg = (Subtarget->is64Bit() ? X86::RCX : X86::ECX);
5616 SDValue Frame = DAG.getRegister(RegInfo->getFrameRegister(MF),
5617 getPointerTy());
56155618
56165619 SDValue StoreAddr = DAG.getNode(ISD::SUB, getPointerTy(), Frame,
5617 DAG.getIntPtrConstant(Subtarget->is64Bit() ?
5618 -8UL: -4UL));
5620 DAG.getIntPtrConstant(-4UL));
56195621 StoreAddr = DAG.getNode(ISD::ADD, getPointerTy(), StoreAddr, Offset);
56205622 Chain = DAG.getStore(Chain, Handler, StoreAddr, NULL, 0);
5621 Chain = DAG.getCopyToReg(Chain, StoreAddrReg, StoreAddr);
5622 MF.getRegInfo().addLiveOut(StoreAddrReg);
5623
5624 return DAG.getNode(X86ISD::EH_RETURN,
5625 MVT::Other,
5626 Chain, DAG.getRegister(StoreAddrReg, getPointerTy()));
5623 Chain = DAG.getCopyToReg(Chain, X86::ECX, StoreAddr);
5624 MF.getRegInfo().addLiveOut(X86::ECX);
5625
5626 return DAG.getNode(X86ISD::EH_RETURN, MVT::Other,
5627 Chain, DAG.getRegister(X86::ECX, getPointerTy()));
56275628 }
56285629
56295630 SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
126126 [(brind GR64:$dst)]>;
127127 def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst",
128128 [(brind (loadi64 addr:$dst))]>;
129 }
130
131 //===----------------------------------------------------------------------===//
132 // EH Pseudo Instructions
133 //
134 let isTerminator = 1, isReturn = 1, isBarrier = 1,
135 hasCtrlDep = 1 in {
136 def EH_RETURN64 : I<0xC3, RawFrm, (outs), (ins GR64:$addr),
137 "ret\t#eh_return, addr: $addr",
138 [(X86ehret GR64:$addr)]>;
139
140129 }
141130
142131 //===----------------------------------------------------------------------===//
158158
159159 const unsigned *
160160 X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
161 bool callsEHReturn = false;
162
163 if (MF) {
164 const MachineFrameInfo *MFI = MF->getFrameInfo();
165 const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
166 callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
167 }
168
169161 static const unsigned CalleeSavedRegs32Bit[] = {
170162 X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0
171163 };
176168
177169 static const unsigned CalleeSavedRegs64Bit[] = {
178170 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
179 };
180
181 static const unsigned CalleeSavedRegs64EHRet[] = {
182 X86::RAX, X86::RDX, X86::RBX, X86::R12,
183 X86::R13, X86::R14, X86::R15, X86::RBP, 0
184171 };
185172
186173 static const unsigned CalleeSavedRegsWin64[] = {
192179 if (IsWin64)
193180 return CalleeSavedRegsWin64;
194181 else
195 return (callsEHReturn ? CalleeSavedRegs64EHRet : CalleeSavedRegs64Bit);
182 return CalleeSavedRegs64Bit;
196183 } else {
197 return (callsEHReturn ? CalleeSavedRegs32EHRet : CalleeSavedRegs32Bit);
184 if (MF) {
185 const MachineFrameInfo *MFI = MF->getFrameInfo();
186 const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
187 if (MMI && MMI->callsEHReturn())
188 return CalleeSavedRegs32EHRet;
189 }
190 return CalleeSavedRegs32Bit;
198191 }
199192 }
200193
201194 const TargetRegisterClass* const*
202195 X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
203 bool callsEHReturn = false;
204
205 if (MF) {
206 const MachineFrameInfo *MFI = MF->getFrameInfo();
207 const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
208 callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
209 }
210
211196 static const TargetRegisterClass * const CalleeSavedRegClasses32Bit[] = {
212197 &X86::GR32RegClass, &X86::GR32RegClass,
213198 &X86::GR32RegClass, &X86::GR32RegClass, 0
222207 &X86::GR64RegClass, &X86::GR64RegClass,
223208 &X86::GR64RegClass, &X86::GR64RegClass, 0
224209 };
225 static const TargetRegisterClass * const CalleeSavedRegClasses64EHRet[] = {
226 &X86::GR64RegClass, &X86::GR64RegClass,
227 &X86::GR64RegClass, &X86::GR64RegClass,
228 &X86::GR64RegClass, &X86::GR64RegClass,
229 &X86::GR64RegClass, &X86::GR64RegClass, 0
230 };
231210 static const TargetRegisterClass * const CalleeSavedRegClassesWin64[] = {
232211 &X86::GR64RegClass, &X86::GR64RegClass,
233212 &X86::GR64RegClass, &X86::GR64RegClass,
239218 if (IsWin64)
240219 return CalleeSavedRegClassesWin64;
241220 else
242 return (callsEHReturn ?
243 CalleeSavedRegClasses64EHRet : CalleeSavedRegClasses64Bit);
221 return CalleeSavedRegClasses64Bit;
244222 } else {
245 return (callsEHReturn ?
246 CalleeSavedRegClasses32EHRet : CalleeSavedRegClasses32Bit);
247 }
223 if (MF) {
224 const MachineFrameInfo *MFI = MF->getFrameInfo();
225 const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
226 if (MMI && MMI->callsEHReturn())
227 return CalleeSavedRegClasses32EHRet;
228 }
229 return CalleeSavedRegClasses32Bit;
230 }
231
248232 }
249233
250234 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
802786 case X86::TCRETURNri64:
803787 case X86::TCRETURNdi64:
804788 case X86::EH_RETURN:
805 case X86::EH_RETURN64:
806789 case X86::TAILJMPd:
807790 case X86::TAILJMPr:
808791 case X86::TAILJMPm: break; // These are ok
876859 }
877860
878861 // We're returning from function via eh_return.
879 if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
862 if (RetOpcode == X86::EH_RETURN) {
880863 MBBI = prior(MBB.end());
881864 MachineOperand &DestAddr = MBBI->getOperand(0);
882865 assert(DestAddr.isRegister() && "Offset should be in register!");
883 BuildMI(MBB, MBBI,
884 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
885 StackPtr).addReg(DestAddr.getReg());
866 BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
867 addReg(DestAddr.getReg());
886868 // Tail call return: adjust the stack pointer and jump to callee
887869 } else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||
888870 RetOpcode== X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64) {
229229
230230 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
231231 X86TargetAsmInfo(TM), ELFTargetAsmInfo(TM) {
232 bool is64Bit = ETM->getSubtarget().is64Bit();
232233
233234 ReadOnlySection = ".rodata";
234235 FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\",@progbits,4";
259260 DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\",@progbits";
260261
261262 // Exceptions handling
262 SupportsExceptionHandling = true;
263 if (!is64Bit)
264 SupportsExceptionHandling = true;
263265 AbsoluteEHSectionOffsets = false;
264266 DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\",@progbits";
265267 DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\",@progbits";
None ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %ebp | count 9
2 ; RUN: llvm-as < %s | llc | grep %ecx | count 5
3
4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
5 target triple = "i386-pc-linux"
6
7 define i8* @test(i32 %a, i8* %b) {
8 entry:
9 call void @llvm.eh.unwind.init()
10 %foo = alloca i32
11 call void @llvm.eh.return.i32(i32 %a, i8* %b)
12 unreachable
13 }
14
15 declare void @llvm.eh.return.i32(i32, i8*)
16 declare void @llvm.eh.unwind.init()
None ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %rbp | count 7
2 ; RUN: llvm-as < %s | llc | grep %rcx | count 3
3
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
5 target triple = "x86_64-unknown-linux-gnu"
6
7 define i8* @test(i64 %a, i8* %b) {
8 entry:
9 call void @llvm.eh.unwind.init()
10 %foo = alloca i32
11 call void @llvm.eh.return.i64(i64 %a, i8* %b)
12 unreachable
13 }
14
15 declare void @llvm.eh.return.i64(i64, i8*)
16 declare void @llvm.eh.unwind.init()