llvm.org GIT mirror llvm / a3fb0f9
[x86] Fix 16-bit disassembly of JCXZ/JECXZ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199653 91177308-0d34-0410-b5e6-96231b3b80d8 David Woodhouse 6 years ago
2 changed file(s) with 21 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
985985
986986 if (getIDWithAttrMask(&instructionID, insn, attrMask))
987987 return -1;
988
989 /*
990 * JCXZ/JECXZ need special handling for 16-bit mode because the meaning
991 * of the AdSize prefix is inverted w.r.t. 32-bit mode.
992 */
993 if (insn->mode == MODE_16BIT && insn->opcode == 0xE3) {
994 const struct InstructionSpecifier *spec;
995 spec = specifierForUID(instructionID);
996
997 /*
998 * Check for Ii8PCRel instructions. We could alternatively do a
999 * string-compare on the names, but this is probably cheaper.
1000 */
1001 if (x86OperandSets[spec->operands][0].type == TYPE_REL8) {
1002 attrMask ^= ATTR_ADSIZE;
1003 if (getIDWithAttrMask(&instructionID, insn, attrMask))
1004 return -1;
1005 }
1006 }
9881007
9891008 /* The following clauses compensate for limitations of the tables. */
9901009
296296 # CHECK: lcalll $2, $4660
297297 0x66 0x9a 0x34 0x12 0x00 0x00 0x02 0x00
298298
299 # CHECKX: jcxz
299 # CHECK: jcxz
300300 0xe3 0x00
301301
302 # CHECKX: jecxz
302 # CHECK: jecxz
303303 0x67 0xe3 0x00
304304
305305 # CHECK: iretw