llvm.org GIT mirror llvm / a3f343f
Updating VC++ project. Adding one include file and correct one declaration from class to struct in order to make llvm compile on VC2005. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55279 91177308-0d34-0410-b5e6-96231b3b80d8 Cedric Venet 11 years ago
5 changed file(s) with 100 addition(s) and 83 deletion(s). Raw diff Collapse all Expand all
3535 template class StringMapEntry;
3636 typedef StringMapEntry ValueName;
3737 class raw_ostream;
38 class AssemblyAnnotationWriter;
38 struct AssemblyAnnotationWriter;
3939
4040 //===----------------------------------------------------------------------===//
4141 // Value Class
2525
2626 #if defined(_MSC_VER)
2727 #include
28 #include
2829 #ifndef STDIN_FILENO
2930 # define STDIN_FILENO 0
3031 #endif
8888 />
8989
9090
91 Name="Release|Win32"
92 OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
93 IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
94 ConfigurationType="4"
95 InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
96 CharacterSet="2"
97 >
98
99 Name="VCPreBuildEventTool"
100 />
101
102 Name="VCCustomBuildTool"
103 />
104
105 Name="VCXMLDataGeneratorTool"
106 />
107
108 Name="VCWebServiceProxyGeneratorTool"
109 />
110
111 Name="VCMIDLTool"
112 />
113
114 Name="VCCLCompilerTool"
115 AdditionalIncludeDirectories="..\..\include;.."
116 PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
117 StringPooling="true"
118 RuntimeLibrary="2"
119 ForceConformanceInForLoopScope="true"
120 RuntimeTypeInfo="true"
121 UsePrecompiledHeader="0"
122 ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
123 WarningLevel="3"
124 Detect64BitPortabilityProblems="false"
125 DebugInformationFormat="3"
126 DisableSpecificWarnings="4355,4146,4800"
127 />
128
129 Name="VCManagedResourceCompilerTool"
130 />
131
132 Name="VCResourceCompilerTool"
133 />
134
135 Name="VCPreLinkEventTool"
136 />
137
138 Name="VCLibrarianTool"
139 OutputFile="$(OutDir)/CodeGen.lib"
140 />
141
142 Name="VCALinkTool"
143 />
144
145 Name="VCXDCMakeTool"
146 />
147
148 Name="VCBscMakeTool"
149 />
150
151 Name="VCFxCopTool"
152 />
153
154 Name="VCPostBuildEventTool"
155 />
156
157
91158 Name="Debug|x64"
92159 OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
93160 IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
160227 />
161228
162229
163 Name="Release|Win32"
230 Name="Release|x64"
164231 OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
165232 IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
166233 ConfigurationType="4"
167 InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops;..\common.vsprops"
234 InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
168235 CharacterSet="2"
169236 >
170237
181248 />
182249
183250 Name="VCMIDLTool"
251 TargetEnvironment="3"
184252 />
185253
186254 Name="VCCLCompilerTool"
226294 Name="VCPostBuildEventTool"
227295 />
228296
229
230 Name="Release|x64"
231 OutputDirectory="$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)"
232 IntermediateDirectory="$(PlatformName)\$(ConfigurationName)"
233 ConfigurationType="4"
234 InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
235 CharacterSet="2"
236 >
237
238 Name="VCPreBuildEventTool"
239 />
240
241 Name="VCCustomBuildTool"
242 />
243
244 Name="VCXMLDataGeneratorTool"
245 />
246
247 Name="VCWebServiceProxyGeneratorTool"
248 />
249
250 Name="VCMIDLTool"
251 TargetEnvironment="3"
252 />
253
254 Name="VCCLCompilerTool"
255 AdditionalIncludeDirectories="..\..\include;.."
256 PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;_CRT_SECURE_NO_WARNINGS;_SCL_SECURE_NO_WARNINGS;_CRT_NONSTDC_NO_WARNINGS;WIN32;NDEBUG;_LIB;__STDC_LIMIT_MACROS"
257 StringPooling="true"
258 RuntimeLibrary="2"
259 ForceConformanceInForLoopScope="true"
260 RuntimeTypeInfo="true"
261 UsePrecompiledHeader="0"
262 ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb"
263 WarningLevel="3"
264 Detect64BitPortabilityProblems="false"
265 DebugInformationFormat="3"
266 DisableSpecificWarnings="4355,4146,4800"
267 />
268
269 Name="VCManagedResourceCompilerTool"
270 />
271
272 Name="VCResourceCompilerTool"
273 />
274
275 Name="VCPreLinkEventTool"
276 />
277
278 Name="VCLibrarianTool"
279 OutputFile="$(OutDir)/CodeGen.lib"
280 />
281
282 Name="VCALinkTool"
283 />
284
285 Name="VCXDCMakeTool"
286 />
287
288 Name="VCBscMakeTool"
289 />
290
291 Name="VCFxCopTool"
292 />
293
294 Name="VCPostBuildEventTool"
295 />
296
297297
298298
299299
503503 >
504504
505505
506 RelativePath="..\..\lib\CodeGen\SelectionDAG\FastISel.cpp"
507 >
508
509
506510 RelativePath="..\..\lib\CodeGen\SelectionDAG\LegalizeDAG.cpp"
507511 >
508512
548552
549553
550554 RelativePath="..\..\lib\CodeGen\SelectionDAG\SelectionDAGPrinter.cpp"
551 >
552
553
554 RelativePath="..\..\lib\CodeGen\SelectionDAG\SimpleBBISel.cpp"
555555 >
556556
557557
598598
599599
600600 RelativePath="..\..\lib\Transforms\Utils\InlineFunction.cpp"
601 >
602
603
604 RelativePath="..\..\lib\Transforms\Utils\InstructionNamer.cpp"
601605 >
602606
603607
313313
314314 Name="VCCustomBuildTool"
315315 Description="Performing TableGen Step"
316 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc "
316 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc echo Building $(InputFileName) Fast instruction selection with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc "
317317 AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
318 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
318 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
319319 />
320320
321321
324324
325325 Name="VCCustomBuildTool"
326326 Description="Performing TableGen Step"
327 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc "
327 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc echo Building $(InputFileName) Fast instruction selection with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc "
328328 AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
329 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
329 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
330330 />
331331
332332
335335
336336 Name="VCCustomBuildTool"
337337 Description="Performing TableGen Step"
338 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc "
338 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc echo Building $(InputFileName) Fast instruction selection with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc "
339339 AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
340 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
340 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
341341 />
342342
343343
346346
347347 Name="VCCustomBuildTool"
348348 Description="Performing TableGen Step"
349 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc "
349 CommandLine="echo Building $(InputFileName) register names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc echo Building $(InputFileName) register information header with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc echo Building $(InputFileName) register information implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc echo Building $(InputFileName) instruction names with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc echo Building $(InputFileName) instruction information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc echo Building $(InputFileName) assembly writer with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc echo Building $(InputFileName) assembly writer #1 with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc echo Building $(InputFileName) instruction selector implementation with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc echo Building $(InputFileName) subtarget information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc echo Building $(InputFileName) calling convention information with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc echo Building $(InputFileName) Fast instruction selection with tblgen $(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc "
350350 AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
351 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
351 Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
352352 />
353353
354354
391391 >
392392
393393
394 RelativePath="..\..\lib\Target\X86\X86FastISel.cpp"
395 >
396
397
398 RelativePath="..\..\lib\Target\X86\X86FastISel.h"
399 >
400
401
394402 RelativePath="..\..\lib\Target\X86\X86FloatingPoint.cpp"
395403 >
396404
557565 Name="Generated Tablegen Files"
558566 >
559567
568 RelativePath=".\X86GenFastISel.inc"
569 >
570
571
560572 RelativePath=".\X86GenAsmWriter.inc"
561573 >
562574