llvm.org GIT mirror llvm / a24262a
Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chance to test it with chapni's fix (-mattr=+avx). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166985 91177308-0d34-0410-b5e6-96231b3b80d8 Jakub Staszak 7 years ago
2 changed file(s) with 13 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
64376437 }
64386438
64396439 static bool MayFoldVectorLoad(SDValue V) {
6440 if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST)
6440 while (V.hasOneUse() && V.getOpcode() == ISD::BITCAST)
64416441 V = V.getOperand(0);
6442
64426443 if (V.hasOneUse() && V.getOpcode() == ISD::SCALAR_TO_VECTOR)
64436444 V = V.getOperand(0);
64446445 if (V.hasOneUse() && V.getOpcode() == ISD::BUILD_VECTOR &&
64456446 V.getNumOperands() == 2 && V.getOperand(1).getOpcode() == ISD::UNDEF)
64466447 // BUILD_VECTOR (load), undef
64476448 V = V.getOperand(0);
6448 if (MayFoldLoad(V))
6449 return true;
6450 return false;
6449
6450 return MayFoldLoad(V);
64516451 }
64526452
64536453 // FIXME: the version above should always be used. Since there's
None ; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
1 ; RUN: grep pshufhw %t | grep -- -95 | count 1
2 ; RUN: grep shufps %t | count 1
3 ; RUN: not grep pslldq %t
0 ; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
41
2 ; CHECK: test
53 ; Test case when creating pshufhw, we incorrectly set the higher order bit
64 ; for an undef,
75 define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind {
86 entry:
7 ; CHECK-NOT: vmovaps
8 ; CHECK: vmovlpd
9 ; CHECK: vpshufhw $-95
910 %0 = load <8 x i16>* %dest
1011 %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14>
1112 store <8 x i16> %1, <8 x i16>* %dest
1213 ret void
13 }
14 }
1415
16 ; CHECK: test2
1517 ; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq
1618 define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind {
1719 entry:
20 ; CHECK-NOT: pslldq
21 ; CHECK: shufps
1822 %0 = shufflevector <4 x i32> %in, <4 x i32> , <4 x i32> < i32 undef, i32 5, i32 undef, i32 2>
1923 store <4 x i32> %0, <4 x i32>* %dest
2024 ret void