llvm.org GIT mirror llvm / a1ffc68
Factor out target shuffle mask decoding from getShuffleScalarElt and use a SmallVector of int instead of unsigned for shuffle mask in decode functions. Preparation for another change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153079 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
4 changed file(s) with 95 addition(s) and 96 deletion(s). Raw diff Collapse all Expand all
2828 void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
2929 const char *(*getRegName)(unsigned)) {
3030 // If this is a shuffle operation, the switch should fill in this state.
31 SmallVector<unsigned, 8> ShuffleMask;
31 SmallVector<int, 8> ShuffleMask;
3232 const char *DestName = 0, *Src1Name = 0, *Src2Name = 0;
3333
3434 switch (MI->getOpcode()) {
499499 if (Src1Name == Src2Name) {
500500 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
501501 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
502 ShuffleMask[i] >= e) // From second mask.
502 ShuffleMask[i] >= (int)e) // From second mask.
503503 ShuffleMask[i] -= e;
504504 }
505505 }
510510 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
511511 if (i != 0)
512512 OS << ',';
513 if (ShuffleMask[i] == SM_SentinelZero) {
513 if (ShuffleMask[i] == (int)SM_SentinelZero) {
514514 OS << "zero";
515515 continue;
516516 }
517517
518518 // Otherwise, it must come from src1 or src2. Print the span of elements
519519 // that comes from this src.
520 bool isSrc1 = ShuffleMask[i] < ShuffleMask.size();
520 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
521521 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
522522 OS << (SrcName ? SrcName : "mem") << '[';
523523 bool IsFirst = true;
524524 while (i != e &&
525525 (int)ShuffleMask[i] >= 0 &&
526 (ShuffleMask[i] < ShuffleMask.size()) == isSrc1) {
526 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
527527 if (!IsFirst)
528528 OS << ',';
529529 else
1919
2020 namespace llvm {
2121
22 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<unsigned> &ShuffleMask) {
22 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
2323 // Defaults the copying the dest value.
2424 ShuffleMask.push_back(0);
2525 ShuffleMask.push_back(1);
4343 }
4444
4545 // <3,1> or <6,7,2,3>
46 void DecodeMOVHLPSMask(unsigned NElts,
47 SmallVectorImpl> &ShuffleMask) {
46 void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl> &ShuffleMask) {
4847 for (unsigned i = NElts/2; i != NElts; ++i)
4948 ShuffleMask.push_back(NElts+i);
5049
5352 }
5453
5554 // <0,2> or <0,1,4,5>
56 void DecodeMOVLHPSMask(unsigned NElts,
57 SmallVectorImpl> &ShuffleMask) {
55 void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl> &ShuffleMask) {
5856 for (unsigned i = 0; i != NElts/2; ++i)
5957 ShuffleMask.push_back(i);
6058
6563 /// DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*.
6664 /// VT indicates the type of the vector allowing it to handle different
6765 /// datatypes and vector widths.
68 void DecodePSHUFMask(EVT VT, unsigned Imm,
69 SmallVectorImpl> &ShuffleMask) {
66 void DecodePSHUFMask(EVT VT, unsigned Imm, SmallVectorImpl> &ShuffleMask) {
7067 unsigned NumElts = VT.getVectorNumElements();
7168
7269 unsigned NumLanes = VT.getSizeInBits() / 128;
8279 }
8380 }
8481
85 void DecodePSHUFHWMask(unsigned Imm,
86 SmallVectorImpl> &ShuffleMask) {
82 void DecodePSHUFHWMask(unsigned Imm, SmallVectorImpl> &ShuffleMask) {
8783 ShuffleMask.push_back(0);
8884 ShuffleMask.push_back(1);
8985 ShuffleMask.push_back(2);
9490 }
9591 }
9692
97 void DecodePSHUFLWMask(unsigned Imm,
98 SmallVectorImpl> &ShuffleMask) {
93 void DecodePSHUFLWMask(unsigned Imm, SmallVectorImpl> &ShuffleMask) {
9994 for (unsigned i = 0; i != 4; ++i) {
10095 ShuffleMask.push_back((Imm & 3));
10196 Imm >>= 2;
109104 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
110105 /// the type of the vector allowing it to handle different datatypes and vector
111106 /// widths.
112 void DecodeSHUFPMask(EVT VT, unsigned Imm,
113 SmallVectorImpl> &ShuffleMask) {
107 void DecodeSHUFPMask(EVT VT, unsigned Imm, SmallVectorImpl> &ShuffleMask) {
114108 unsigned NumElts = VT.getVectorNumElements();
115109
116110 unsigned NumLanes = VT.getSizeInBits() / 128;
135129 /// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
136130 /// and punpckh*. VT indicates the type of the vector allowing it to handle
137131 /// different datatypes and vector widths.
138 void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
132 void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) {
139133 unsigned NumElts = VT.getVectorNumElements();
140134
141135 // Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
155149 /// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
156150 /// and punpckl*. VT indicates the type of the vector allowing it to handle
157151 /// different datatypes and vector widths.
158 void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
152 void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) {
159153 unsigned NumElts = VT.getVectorNumElements();
160154
161155 // Handle 128 and 256-bit vector lengths. AVX defines UNPCK* to operate
173167 }
174168
175169 void DecodeVPERM2X128Mask(EVT VT, unsigned Imm,
176 SmallVectorImpl<unsigned> &ShuffleMask) {
170 SmallVectorImpl<int> &ShuffleMask) {
177171 unsigned HalfSize = VT.getVectorNumElements()/2;
178172 unsigned FstHalfBegin = (Imm & 0x3) * HalfSize;
179173 unsigned SndHalfBegin = ((Imm >> 4) & 0x3) * HalfSize;
2626 SM_SentinelZero = ~0U
2727 };
2828
29 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<unsigned> &ShuffleMask);
29 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
3030
3131 // <3,1> or <6,7,2,3>
32 void DecodeMOVHLPSMask(unsigned NElts,
33 SmallVectorImpl> &ShuffleMask);
32 void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl> &ShuffleMask);
3433
3534 // <0,2> or <0,1,4,5>
36 void DecodeMOVLHPSMask(unsigned NElts,
37 SmallVectorImpl> &ShuffleMask);
35 void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl> &ShuffleMask);
3836
39 void DecodePSHUFMask(EVT VT, unsigned Imm,
40 SmallVectorImpl> &ShuffleMask);
37 void DecodePSHUFMask(EVT VT, unsigned Imm, SmallVectorImpl> &ShuffleMask);
4138
42 void DecodePSHUFHWMask(unsigned Imm,
43 SmallVectorImpl> &ShuffleMask);
39 void DecodePSHUFHWMask(unsigned Imm, SmallVectorImpl> &ShuffleMask);
4440
45 void DecodePSHUFLWMask(unsigned Imm,
46 SmallVectorImpl> &ShuffleMask);
41 void DecodePSHUFLWMask(unsigned Imm, SmallVectorImpl> &ShuffleMask);
4742
4843 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
4944 /// the type of the vector allowing it to handle different datatypes and vector
5045 /// widths.
51 void DecodeSHUFPMask(EVT VT, unsigned Imm,
52 SmallVectorImpl> &ShuffleMask);
46 void DecodeSHUFPMask(EVT VT, unsigned Imm, SmallVectorImpl> &ShuffleMask);
5347
5448 /// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
5549 /// and punpckh*. VT indicates the type of the vector allowing it to handle
5650 /// different datatypes and vector widths.
57 void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
51 void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<int> &ShuffleMask);
5852
5953 /// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
6054 /// and punpckl*. VT indicates the type of the vector allowing it to handle
6155 /// different datatypes and vector widths.
62 void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
56 void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<int> &ShuffleMask);
6357
6458
6559 void DecodeVPERM2X128Mask(EVT VT, unsigned Imm,
66 SmallVectorImpl<unsigned> &ShuffleMask);
60 SmallVectorImpl<int> &ShuffleMask);
6761
6862 } // llvm namespace
6963
43434343 return DAG.getVectorShuffle(VT, V2.getDebugLoc(), V1, V2, &MaskVec[0]);
43444344 }
43454345
4346 /// getTargetShuffleMask - Calculates the shuffle mask corresponding to the
4347 /// target specific opcode. Returns true if the Mask could be calculated.
4348 static bool getTargetShuffleMask(SDNode *N, EVT VT,
4349 SmallVectorImpl &Mask) {
4350 unsigned NumElems = VT.getVectorNumElements();
4351 SDValue ImmN;
4352
4353 switch(N->getOpcode()) {
4354 case X86ISD::SHUFP:
4355 ImmN = N->getOperand(N->getNumOperands()-1);
4356 DecodeSHUFPMask(VT, cast(ImmN)->getZExtValue(), Mask);
4357 break;
4358 case X86ISD::UNPCKH:
4359 DecodeUNPCKHMask(VT, Mask);
4360 break;
4361 case X86ISD::UNPCKL:
4362 DecodeUNPCKLMask(VT, Mask);
4363 break;
4364 case X86ISD::MOVHLPS:
4365 DecodeMOVHLPSMask(NumElems, Mask);
4366 break;
4367 case X86ISD::MOVLHPS:
4368 DecodeMOVLHPSMask(NumElems, Mask);
4369 break;
4370 case X86ISD::PSHUFD:
4371 case X86ISD::VPERMILP:
4372 ImmN = N->getOperand(N->getNumOperands()-1);
4373 DecodePSHUFMask(VT, cast(ImmN)->getZExtValue(), Mask);
4374 break;
4375 case X86ISD::PSHUFHW:
4376 ImmN = N->getOperand(N->getNumOperands()-1);
4377 DecodePSHUFHWMask(cast(ImmN)->getZExtValue(), Mask);
4378 break;
4379 case X86ISD::PSHUFLW:
4380 ImmN = N->getOperand(N->getNumOperands()-1);
4381 DecodePSHUFLWMask(cast(ImmN)->getZExtValue(), Mask);
4382 break;
4383 case X86ISD::MOVSS:
4384 case X86ISD::MOVSD: {
4385 // The index 0 always comes from the first element of the second source,
4386 // this is why MOVSS and MOVSD are used in the first place. The other
4387 // elements come from the other positions of the first source vector
4388 Mask.push_back(NumElems);
4389 for (unsigned i = 1; i != NumElems; ++i) {
4390 Mask.push_back(i);
4391 }
4392 break;
4393 }
4394 case X86ISD::VPERM2X128:
4395 ImmN = N->getOperand(N->getNumOperands()-1);
4396 DecodeVPERM2X128Mask(VT, cast(ImmN)->getZExtValue(), Mask);
4397 break;
4398 case X86ISD::MOVDDUP:
4399 case X86ISD::MOVLHPD:
4400 case X86ISD::MOVLPD:
4401 case X86ISD::MOVLPS:
4402 case X86ISD::MOVSHDUP:
4403 case X86ISD::MOVSLDUP:
4404 case X86ISD::PALIGN:
4405 // Not yet implemented
4406 return false;
4407 default: llvm_unreachable("unknown target shuffle node");
4408 }
4409
4410 return true;
4411 }
4412
43464413 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
43474414 /// element of the result of the vector shuffle.
43484415 static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
43704437 // Recurse into target specific vector shuffles to find scalars.
43714438 if (isTargetShuffle(Opcode)) {
43724439 unsigned NumElems = VT.getVectorNumElements();
4373 SmallVector<unsigned, 16> ShuffleMask;
4440 SmallVector<int, 16> ShuffleMask;
43744441 SDValue ImmN;
43754442
4376 switch(Opcode) {
4377 case X86ISD::SHUFP:
4378 ImmN = N->getOperand(N->getNumOperands()-1);
4379 DecodeSHUFPMask(VT, cast(ImmN)->getZExtValue(),
4380 ShuffleMask);
4381 break;
4382 case X86ISD::UNPCKH:
4383 DecodeUNPCKHMask(VT, ShuffleMask);
4384 break;
4385 case X86ISD::UNPCKL:
4386 DecodeUNPCKLMask(VT, ShuffleMask);
4387 break;
4388 case X86ISD::MOVHLPS:
4389 DecodeMOVHLPSMask(NumElems, ShuffleMask);
4390 break;
4391 case X86ISD::MOVLHPS:
4392 DecodeMOVLHPSMask(NumElems, ShuffleMask);
4393 break;
4394 case X86ISD::PSHUFD:
4395 case X86ISD::VPERMILP:
4396 ImmN = N->getOperand(N->getNumOperands()-1);
4397 DecodePSHUFMask(VT, cast(ImmN)->getZExtValue(),
4398 ShuffleMask);
4399 break;
4400 case X86ISD::PSHUFHW:
4401 ImmN = N->getOperand(N->getNumOperands()-1);
4402 DecodePSHUFHWMask(cast(ImmN)->getZExtValue(),
4403 ShuffleMask);
4404 break;
4405 case X86ISD::PSHUFLW:
4406 ImmN = N->getOperand(N->getNumOperands()-1);
4407 DecodePSHUFLWMask(cast(ImmN)->getZExtValue(),
4408 ShuffleMask);
4409 break;
4410 case X86ISD::MOVSS:
4411 case X86ISD::MOVSD: {
4412 // The index 0 always comes from the first element of the second source,
4413 // this is why MOVSS and MOVSD are used in the first place. The other
4414 // elements come from the other positions of the first source vector.
4415 unsigned OpNum = (Index == 0) ? 1 : 0;
4416 return getShuffleScalarElt(V.getOperand(OpNum).getNode(), Index, DAG,
4417 Depth+1);
4418 }
4419 case X86ISD::VPERM2X128:
4420 ImmN = N->getOperand(N->getNumOperands()-1);
4421 DecodeVPERM2X128Mask(VT, cast(ImmN)->getZExtValue(),
4422 ShuffleMask);
4423 break;
4424 case X86ISD::MOVDDUP:
4425 case X86ISD::MOVLHPD:
4426 case X86ISD::MOVLPD:
4427 case X86ISD::MOVLPS:
4428 case X86ISD::MOVSHDUP:
4429 case X86ISD::MOVSLDUP:
4430 case X86ISD::PALIGN:
4431 return SDValue(); // Not yet implemented.
4432 default: llvm_unreachable("unknown target shuffle node");
4433 }
4443 if (!getTargetShuffleMask(N, VT, ShuffleMask))
4444 return SDValue();
44344445
44354446 Index = ShuffleMask[Index];
44364447 if (Index < 0)