llvm.org GIT mirror llvm / a1a323c
[TwoAddressInstructionPass] Try 3 Addr Conversion After Commuting. TwoAddressInstructionPass stops after a successful commuting but 3 Addr conversion might be good for some cases. Consider: int foo(int a, int b) { return a + b; } Before this commit, we emit: addl %esi, %edi movl %edi, %eax ret After this commit, we try 3 Addr conversion: leal (%rsi,%rdi), %eax ret Patch by Volkan Keles <vkeles@apple.com>! Differential Revision: http://reviews.llvm.org/D10851 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241206 91177308-0d34-0410-b5e6-96231b3b80d8 Quentin Colombet 4 years ago
5 changed file(s) with 24 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
12061206 }
12071207 }
12081208
1209 // If the instruction is convertible to 3 Addr, instead
1210 // of returning try 3 Addr transformation aggresively and
1211 // use this variable to check later. Because it might be better.
1212 // For example, we can just use `leal (%rsi,%rdi), %eax` and `ret`
1213 // instead of the following code.
1214 // addl %esi, %edi
1215 // movl %edi, %eax
1216 // ret
1217 bool commuted = false;
1218
12091219 // If it's profitable to commute, try to do so.
12101220 if (TryCommute && commuteInstruction(mi, regB, regC, Dist)) {
1221 commuted = true;
12111222 ++NumCommuted;
12121223 if (AggressiveCommute)
12131224 ++NumAggrCommuted;
1214 return false;
1225 if (!MI.isConvertibleTo3Addr())
1226 return false;
12151227 }
12161228
12171229 if (shouldOnlyCommute)
12191231
12201232 // If there is one more use of regB later in the same MBB, consider
12211233 // re-schedule this MI below it.
1222 if (EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {
1234 if (!commuted && EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {
12231235 ++NumReSchedDowns;
12241236 return true;
12251237 }
12351247 }
12361248 }
12371249 }
1250
1251 // Return if it is commuted but 3 addr conversion is failed.
1252 if (commuted)
1253 return false;
12381254
12391255 // If there is one more use of regB later in the same MBB, consider
12401256 // re-schedule it before this MI if it's legal.
3838 entry:
3939 ; DARWIN-LABEL: t3:
4040 ; DARWIN: shlq $32, %rcx
41 ; DARWIN-NEXT: orq %rcx, %rax
41 ; DARWIN-NEXT: leaq (%rax,%rcx), %rax
4242 ; DARWIN-NEXT: shll $8
4343 ; DARWIN-NOT: leaq
4444 %tmp21 = zext i32 %lb to i64
2424 entry:
2525 ; CHECK-LABEL: test2:
2626 ; CHECK: leal
27 ; CHECK-NOT: leal
28 ; CHECK-NOT: mov
27 ; CHECK-NEXT: addl
2928 ; CHECK-NEXT: addl
3029 ; CHECK-NEXT: ret
3130 %add = add i32 %b, %a
66 entry:
77 ; CHECK: movl 48(%rsp), %eax
88 ; CHECK: addl 40(%rsp), %eax
9 ; LINUX: addl %r9d, %r8d
10 ; LINUX: movl %r8d, %eax
9 ; LINUX: leal (%r8,%r9), %eax
1110 %add = add nsw i32 %p6, %p5
1211 ret i32 %add
1312 }
2625 ; on other platforms here (note the x86_64_sysvcc calling convention).
2726 define x86_64_sysvcc i32 @f8(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
2827 entry:
29 ; CHECK: addl %r9d, %r8d
30 ; CHECK: movl %r8d, %eax
31 ; LINUX: addl %r9d, %r8d
32 ; LINUX: movl %r8d, %eax
28 ; CHECK: leal (%r8,%r9), %eax
29 ; LINUX: leal (%r8,%r9), %eax
3330 %add = add nsw i32 %p6, %p5
3431 ret i32 %add
3532 }
2222 ; X32: add
2323 ; X32: add
2424 ; X32: add
25 ; X32: add
25 ; X32: leal
2626 ; X32: %for.body.3
2727 define void @sharedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c, i32 %s, i32 %len) nounwind ssp {
2828 entry: