llvm.org GIT mirror llvm / 9f998de
[C++11] Add 'override' keyword to virtual methods that override their base class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203220 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
83 changed file(s) with 377 addition(s) and 378 deletion(s). Raw diff Collapse all Expand all
171171
172172 /// getAnalysisUsage - Record analysis usage.
173173 ///
174 void getAnalysisUsage(AnalysisUsage &AU) const;
174 void getAnalysisUsage(AnalysisUsage &AU) const override;
175175
176176 /// doInitialization - Set up the AsmPrinter when we are working on a new
177177 /// module. If your pass overrides this, it must make sure to explicitly
178178 /// call this implementation.
179 bool doInitialization(Module &M);
179 bool doInitialization(Module &M) override;
180180
181181 /// doFinalization - Shut down the asmprinter. If you override this in your
182182 /// pass, you must make sure to call it explicitly.
183 bool doFinalization(Module &M);
183 bool doFinalization(Module &M) override;
184184
185185 /// runOnMachineFunction - Emit the specified function out to the
186186 /// OutStreamer.
187 virtual bool runOnMachineFunction(MachineFunction &MF) {
187 bool runOnMachineFunction(MachineFunction &MF) override {
188188 SetupMachineFunction(MF);
189189 EmitFunctionHeader();
190190 EmitFunctionBody();
5454 void view() const;
5555
5656 private:
57 virtual bool runOnMachineFunction(MachineFunction&);
58 virtual void getAnalysisUsage(AnalysisUsage&) const;
57 bool runOnMachineFunction(MachineFunction&) override;
58 void getAnalysisUsage(AnalysisUsage&) const override;
5959 };
6060
6161 /// Specialize WriteGraph, the standard implementation won't work.
5050 /// occurred, more memory is allocated, and we reemit the code into it.
5151 ///
5252 class JITCodeEmitter : public MachineCodeEmitter {
53 virtual void anchor();
53 void anchor() override;
5454 public:
5555 virtual ~JITCodeEmitter() {}
5656
5858 /// about to be code generated. This initializes the BufferBegin/End/Ptr
5959 /// fields.
6060 ///
61 virtual void startFunction(MachineFunction &F) = 0;
61 void startFunction(MachineFunction &F) override = 0;
6262
6363 /// finishFunction - This callback is invoked when the specified function has
6464 /// finished code generation. If a buffer overflow has occurred, this method
6565 /// returns true (the callee is required to try again), otherwise it returns
6666 /// false.
6767 ///
68 virtual bool finishFunction(MachineFunction &F) = 0;
69
68 bool finishFunction(MachineFunction &F) override = 0;
69
7070 /// allocIndirectGV - Allocates and fills storage for an indirect
7171 /// GlobalValue, and returns the address.
7272 virtual void *allocIndirectGV(const GlobalValue *GV,
247247
248248
249249 /// emitLabel - Emits a label
250 virtual void emitLabel(MCSymbol *Label) = 0;
250 void emitLabel(MCSymbol *Label) override = 0;
251251
252252 /// allocateSpace - Allocate a block of space in the current output buffer,
253253 /// returning null (and setting conditions to indicate buffer overflow) on
254254 /// failure. Alignment is the alignment in bytes of the buffer desired.
255 virtual void *allocateSpace(uintptr_t Size, unsigned Alignment) {
255 void *allocateSpace(uintptr_t Size, unsigned Alignment) override {
256256 emitAlignment(Alignment);
257257 void *Result;
258258
277277 /// StartMachineBasicBlock - This should be called by the target when a new
278278 /// basic block is about to be emitted. This way the MCE knows where the
279279 /// start of the block is, and can implement getMachineBasicBlockAddress.
280 virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) = 0;
281
280 void StartMachineBasicBlock(MachineBasicBlock *MBB) override = 0;
281
282282 /// getCurrentPCValue - This returns the address that the next emitted byte
283283 /// will be output to.
284284 ///
285 virtual uintptr_t getCurrentPCValue() const {
285 uintptr_t getCurrentPCValue() const override {
286286 return (uintptr_t)CurBufferPtr;
287287 }
288288
289289 /// getCurrentPCOffset - Return the offset from the start of the emitted
290290 /// buffer that we are currently writing to.
291 uintptr_t getCurrentPCOffset() const {
291 uintptr_t getCurrentPCOffset() const override {
292292 return CurBufferPtr-BufferBegin;
293293 }
294294
297297 /// creates jump tables or constant pools in memory on the fly while the
298298 /// object code emitters rely on a linker to have real addresses and should
299299 /// use relocations instead.
300 bool earlyResolveAddresses() const { return true; }
300 bool earlyResolveAddresses() const override { return true; }
301301
302302 /// addRelocation - Whenever a relocatable address is needed, it should be
303303 /// noted with this interface.
304 virtual void addRelocation(const MachineRelocation &MR) = 0;
305
304 void addRelocation(const MachineRelocation &MR) override = 0;
305
306306 /// FIXME: These should all be handled with relocations!
307307
308308 /// getConstantPoolEntryAddress - Return the address of the 'Index' entry in
309309 /// the constant pool that was last emitted with the emitConstantPool method.
310310 ///
311 virtual uintptr_t getConstantPoolEntryAddress(unsigned Index) const = 0;
311 uintptr_t getConstantPoolEntryAddress(unsigned Index) const override = 0;
312312
313313 /// getJumpTableEntryAddress - Return the address of the jump table with index
314314 /// 'Index' in the function that last called initJumpTableInfo.
315315 ///
316 virtual uintptr_t getJumpTableEntryAddress(unsigned Index) const = 0;
317
316 uintptr_t getJumpTableEntryAddress(unsigned Index) const override = 0;
317
318318 /// getMachineBasicBlockAddress - Return the address of the specified
319319 /// MachineBasicBlock, only usable after the label for the MBB has been
320320 /// emitted.
321321 ///
322 virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const= 0;
322 uintptr_t
323 getMachineBasicBlockAddress(MachineBasicBlock *MBB) const override = 0;
323324
324325 /// getLabelAddress - Return the address of the specified Label, only usable
325326 /// after the Label has been emitted.
326327 ///
327 virtual uintptr_t getLabelAddress(MCSymbol *Label) const = 0;
328
328 uintptr_t getLabelAddress(MCSymbol *Label) const override = 0;
329
329330 /// Specifies the MachineModuleInfo object. This is used for exception handling
330331 /// purposes.
331 virtual void setModuleInfo(MachineModuleInfo* Info) = 0;
332 void setModuleInfo(MachineModuleInfo* Info) override = 0;
332333
333334 /// getLabelLocations - Return the label locations map of the label IDs to
334335 /// their address.
4646 LatencyPriorityQueue() : Picker(this) {
4747 }
4848
49 bool isBottomUp() const { return false; }
49 bool isBottomUp() const override { return false; }
5050
51 void initNodes(std::vector &sunits) {
51 void initNodes(std::vector &sunits) override {
5252 SUnits = &sunits;
5353 NumNodesSolelyBlocking.resize(SUnits->size(), 0);
5454 }
5555
56 void addNode(const SUnit *SU) {
56 void addNode(const SUnit *SU) override {
5757 NumNodesSolelyBlocking.resize(SUnits->size(), 0);
5858 }
5959
60 void updateNode(const SUnit *SU) {
60 void updateNode(const SUnit *SU) override {
6161 }
6262
63 void releaseState() {
63 void releaseState() override {
6464 SUnits = 0;
6565 }
6666
7474 return NumNodesSolelyBlocking[NodeNum];
7575 }
7676
77 bool empty() const { return Queue.empty(); }
77 bool empty() const override { return Queue.empty(); }
7878
79 virtual void push(SUnit *U);
79 void push(SUnit *U) override;
8080
81 virtual SUnit *pop();
81 SUnit *pop() override;
8282
83 virtual void remove(SUnit *SU);
83 void remove(SUnit *SU) override;
8484
85 virtual void dump(ScheduleDAG* DAG) const;
85 void dump(ScheduleDAG* DAG) const override;
8686
8787 // scheduledNode - As nodes are scheduled, we look to see if there are any
8888 // successor nodes that have a single unscheduled predecessor. If so, that
8989 // single predecessor has a higher priority, since scheduling it will make
9090 // the node available.
91 void scheduledNode(SUnit *Node);
91 void scheduledNode(SUnit *Node) override;
9292
9393 private:
9494 void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
254254
255255 VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
256256
257 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
258 virtual void releaseMemory();
257 void getAnalysisUsage(AnalysisUsage &AU) const override;
258 void releaseMemory() override;
259259
260260 /// runOnMachineFunction - pass entry point
261 virtual bool runOnMachineFunction(MachineFunction&);
261 bool runOnMachineFunction(MachineFunction&) override;
262262
263263 /// print - Implement the dump method.
264 virtual void print(raw_ostream &O, const Module* = 0) const;
264 void print(raw_ostream &O, const Module* = 0) const override;
265265
266266 /// intervalIsInOneMBB - If LI is confined to a single basic block, return
267267 /// a pointer to that block. If LI is live in to or out of any block,
9898
9999 /// MachineRegisterInfo callback to notify when new virtual
100100 /// registers are created.
101 void MRI_NoteNewVirtualRegister(unsigned VReg);
101 void MRI_NoteNewVirtualRegister(unsigned VReg) override;
102102
103103 public:
104104 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
5858 BitVector RegMaskUsable;
5959
6060 // MachineFunctionPass boilerplate.
61 virtual void getAnalysisUsage(AnalysisUsage&) const;
62 virtual bool runOnMachineFunction(MachineFunction&);
63 virtual void releaseMemory();
61 void getAnalysisUsage(AnalysisUsage&) const override;
62 bool runOnMachineFunction(MachineFunction&) override;
63 void releaseMemory() override;
6464 public:
6565 static char ID;
6666 LiveRegMatrix();
8484
8585 VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
8686
87 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
88 virtual void releaseMemory();
87 void getAnalysisUsage(AnalysisUsage &AU) const override;
88 void releaseMemory() override;
8989
9090 /// runOnMachineFunction - pass entry point
91 virtual bool runOnMachineFunction(MachineFunction&);
91 bool runOnMachineFunction(MachineFunction&) override;
9292
9393 /// print - Implement the dump method.
94 virtual void print(raw_ostream &O, const Module* = 0) const;
94 void print(raw_ostream &O, const Module* = 0) const override;
9595 };
9696 }
9797
176176 void analyzePHINodes(const MachineFunction& Fn);
177177 public:
178178
179 virtual bool runOnMachineFunction(MachineFunction &MF);
179 bool runOnMachineFunction(MachineFunction &MF) override;
180180
181181 /// RegisterDefIsDead - Return true if the specified instruction defines the
182182 /// specified register, but that definition is dead.
257257 (void)Removed;
258258 return true;
259259 }
260
261 void getAnalysisUsage(AnalysisUsage &AU) const;
262
263 virtual void releaseMemory() {
260
261 void getAnalysisUsage(AnalysisUsage &AU) const override;
262
263 void releaseMemory() override {
264264 VirtRegInfo.clear();
265265 }
266266
3838
3939 ~MachineBlockFrequencyInfo();
4040
41 void getAnalysisUsage(AnalysisUsage &AU) const;
41 void getAnalysisUsage(AnalysisUsage &AU) const override;
4242
43 bool runOnMachineFunction(MachineFunction &F);
43 bool runOnMachineFunction(MachineFunction &F) override;
4444
4545 /// getblockFreq - Return block frequency. Return 0 if we don't have the
4646 /// information. Please note that initial frequency is equal to 1024. It means
3939 initializeMachineBranchProbabilityInfoPass(Registry);
4040 }
4141
42 void getAnalysisUsage(AnalysisUsage &AU) const {
42 void getAnalysisUsage(AnalysisUsage &AU) const override {
4343 AU.setPreservesAll();
4444 }
4545
4747
4848 DominatorTreeBase& getBase() { return *DT; }
4949
50 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
50 void getAnalysisUsage(AnalysisUsage &AU) const override;
5151
5252 /// getRoots - Return the root blocks of the current CFG. This may include
5353 /// multiple blocks if we are computing post dominators. For forward
6565 return DT->getRootNode();
6666 }
6767
68 virtual bool runOnMachineFunction(MachineFunction &F);
68 bool runOnMachineFunction(MachineFunction &F) override;
6969
7070 inline bool dominates(const MachineDomTreeNode* A,
7171 const MachineDomTreeNode* B) const {
165165 return DT->isReachableFromEntry(A);
166166 }
167167
168 virtual void releaseMemory();
169
170 virtual void print(raw_ostream &OS, const Module*) const;
168 void releaseMemory() override;
169
170 void print(raw_ostream &OS, const Module*) const override;
171171 };
172172
173173 //===-------------------------------------
3333 ~MachineFunctionAnalysis();
3434
3535 MachineFunction &getMF() const { return *MF; }
36
37 virtual const char* getPassName() const {
36
37 const char* getPassName() const override {
3838 return "Machine Function Analysis";
3939 }
4040
4141 private:
42 virtual bool doInitialization(Module &M);
43 virtual bool runOnFunction(Function &F);
44 virtual void releaseMemory();
45 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
42 bool doInitialization(Module &M) override;
43 bool runOnFunction(Function &F) override;
44 void releaseMemory() override;
45 void getAnalysisUsage(AnalysisUsage &AU) const override;
4646 };
4747
4848 } // End llvm namespace
4343 /// For MachineFunctionPasses, calling AU.preservesCFG() indicates that
4444 /// the pass does not modify the MachineBasicBlock CFG.
4545 ///
46 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
46 void getAnalysisUsage(AnalysisUsage &AU) const override;
4747
4848 private:
4949 /// createPrinterPass - Get a machine function printer pass.
50 virtual Pass *createPrinterPass(raw_ostream &O,
51 const std::string &Banner) const;
50 Pass *createPrinterPass(raw_ostream &O,
51 const std::string &Banner) const override;
5252
53 virtual bool runOnFunction(Function &F);
53 bool runOnFunction(Function &F) override;
5454 };
5555
5656 } // End llvm namespace
119119
120120 /// runOnFunction - Calculate the natural loop information.
121121 ///
122 virtual bool runOnMachineFunction(MachineFunction &F);
122 bool runOnMachineFunction(MachineFunction &F) override;
123123
124 virtual void releaseMemory() { LI.releaseMemory(); }
124 void releaseMemory() override { LI.releaseMemory(); }
125125
126 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
126 void getAnalysisUsage(AnalysisUsage &AU) const override;
127127
128128 /// removeLoop - This removes the specified top-level loop from this loop info
129129 /// object. The loop is not deleted, as it will presumably be inserted into
179179 ~MachineModuleInfo();
180180
181181 // Initialization and Finalization
182 virtual bool doInitialization(Module &);
183 virtual bool doFinalization(Module &);
182 bool doInitialization(Module &) override;
183 bool doFinalization(Module &) override;
184184
185185 /// EndFunction - Discard function meta information.
186186 ///
141141
142142 // Implement the MachinePassRegistryListener callbacks.
143143 //
144 virtual void NotifyAdd(const char *N,
145 MachinePassCtor C,
146 const char *D) {
144 void NotifyAdd(const char *N, MachinePassCtor C, const char *D) override {
147145 this->addLiteralOption(N, (typename RegistryClass::FunctionPassCtor)C, D);
148146 }
149 virtual void NotifyRemove(const char *N) {
147 void NotifyRemove(const char *N) override {
150148 this->removeLiteralOption(N);
151149 }
152150 };
7676 return DT->findNearestCommonDominator(A, B);
7777 }
7878
79 virtual bool runOnMachineFunction(MachineFunction &MF);
80 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
81 virtual void print(llvm::raw_ostream &OS, const Module *M = 0) const;
79 bool runOnMachineFunction(MachineFunction &MF) override;
80 void getAnalysisUsage(AnalysisUsage &AU) const override;
81 void print(llvm::raw_ostream &OS, const Module *M = 0) const override;
8282 };
8383 } //end of namespace llvm
8484
293293
294294 /// Implement ScheduleDAGInstrs interface for scheduling a sequence of
295295 /// reorderable instructions.
296 virtual void schedule();
296 void schedule() override;
297297
298298 /// Change the position of an instruction within the basic block and update
299299 /// live ranges and region boundary iterators.
383383 virtual ~ScheduleDAGMILive();
384384
385385 /// Return true if this DAG supports VReg liveness and RegPressure.
386 virtual bool hasVRegLiveness() const { return true; }
386 bool hasVRegLiveness() const override { return true; }
387387
388388 /// \brief Return true if register pressure tracking is enabled.
389389 bool isTrackingPressure() const { return ShouldTrackPressure; }
426426
427427 /// Implement ScheduleDAGInstrs interface for scheduling a sequence of
428428 /// reorderable instructions.
429 virtual void schedule();
429 void schedule() override;
430430
431431 /// Compute the cyclic critical path through the DAG.
432432 unsigned computeCyclicCriticalPath();
7676 class Trace;
7777 static char ID;
7878 MachineTraceMetrics();
79 void getAnalysisUsage(AnalysisUsage&) const;
80 bool runOnMachineFunction(MachineFunction&);
81 void releaseMemory();
82 void verifyAnalysis() const;
79 void getAnalysisUsage(AnalysisUsage&) const override;
80 bool runOnMachineFunction(MachineFunction&) override;
81 void releaseMemory() override;
82 void verifyAnalysis() const override;
8383
8484 friend class Ensemble;
8585 friend class Trace;
2828 /// printCustom - Implement printing for PseudoSourceValue. This is called
2929 /// from Value::print or Value's operator<<.
3030 ///
31 virtual void printCustom(raw_ostream &O) const;
31 void printCustom(raw_ostream &O) const override;
3232
3333 public:
3434 explicit PseudoSourceValue(enum ValueTy Subclass = PseudoSourceValueVal);
9292 return V->getValueID() == FixedStackPseudoSourceValueVal;
9393 }
9494
95 virtual bool isConstant(const MachineFrameInfo *MFI) const;
95 bool isConstant(const MachineFrameInfo *MFI) const override;
9696
97 virtual bool isAliased(const MachineFrameInfo *MFI) const;
97 bool isAliased(const MachineFrameInfo *MFI) const override;
9898
99 virtual bool mayAlias(const MachineFrameInfo *) const;
99 bool mayAlias(const MachineFrameInfo *) const override;
100100
101 virtual void printCustom(raw_ostream &OS) const;
101 void printCustom(raw_ostream &OS) const override;
102102
103103 int getFrameIndex() const { return FI; }
104104 };
141141
142142 /// Build a PBQP instance to represent the register allocation problem for
143143 /// the given MachineFunction.
144 virtual PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
145 const MachineBlockFrequencyInfo *mbfi,
146 const RegSet &vregs);
144 PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
145 const MachineBlockFrequencyInfo *mbfi,
146 const RegSet &vregs) override;
147147
148148 private:
149149
228228 /// the level of the whole MachineFunction. By default does nothing.
229229 virtual void finalizeSchedule() {}
230230
231 virtual void dumpNode(const SUnit *SU) const;
231 void dumpNode(const SUnit *SU) const override;
232232
233233 /// Return a label for a DAG node that points to an instruction.
234 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
234 std::string getGraphNodeLabel(const SUnit *SU) const override;
235235
236236 /// Return a label for the region of code covered by the DAG.
237 virtual std::string getDAGName() const;
237 std::string getDAGName() const override;
238238
239239 /// \brief Fix register kill flags that scheduling has made invalid.
240240 void fixupKills(MachineBasicBlock *MBB);
109109
110110 /// atIssueLimit - Return true if no more instructions may be issued in this
111111 /// cycle.
112 virtual bool atIssueLimit() const;
112 bool atIssueLimit() const override;
113113
114114 // Stalls provides an cycle offset at which SU will be scheduled. It will be
115115 // negative for bottom-up scheduling.
116 virtual HazardType getHazardType(SUnit *SU, int Stalls);
117 virtual void Reset();
118 virtual void EmitInstruction(SUnit *SU);
119 virtual void AdvanceCycle();
120 virtual void RecedeCycle();
116 HazardType getHazardType(SUnit *SU, int Stalls) override;
117 void Reset() override;
118 void EmitInstruction(SUnit *SU) override;
119 void AdvanceCycle() override;
120 void RecedeCycle() override;
121121 };
122122
123123 }
376376 initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
377377 }
378378
379 virtual void getAnalysisUsage(AnalysisUsage &au) const;
380 virtual void releaseMemory();
381
382 virtual bool runOnMachineFunction(MachineFunction &fn);
379 void getAnalysisUsage(AnalysisUsage &au) const override;
380 void releaseMemory() override;
381
382 bool runOnMachineFunction(MachineFunction &fn) override;
383383
384384 /// Dump the indexes.
385385 void dump() const;
4242
4343 /// \brief Tell the pass manager which passes we depend on and what
4444 /// information we preserve.
45 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
45 void getAnalysisUsage(AnalysisUsage &AU) const override;
4646
4747 /// \brief Calculate the liveness information for the given machine function.
48 virtual bool runOnMachineFunction(MachineFunction &MF);
48 bool runOnMachineFunction(MachineFunction &MF) override;
4949
5050 private:
5151 /// \brief Performs the actual liveness calculation for the function.
113113 initializeStackProtectorPass(*PassRegistry::getPassRegistry());
114114 }
115115
116 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
116 void getAnalysisUsage(AnalysisUsage &AU) const override {
117117 AU.addPreserved();
118118 }
119119
120120 SSPLayoutKind getSSPLayout(const AllocaInst *AI) const;
121121 void adjustForColoring(const AllocaInst *From, const AllocaInst *To);
122122
123 virtual bool runOnFunction(Function &Fn);
123 bool runOnFunction(Function &Fn) override;
124124 };
125125 } // end namespace llvm
126126
6969 static char ID;
7070 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
7171 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
72 virtual bool runOnMachineFunction(MachineFunction &MF);
72 bool runOnMachineFunction(MachineFunction &MF) override;
7373
74 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
74 void getAnalysisUsage(AnalysisUsage &AU) const override {
7575 AU.setPreservesAll();
7676 MachineFunctionPass::getAnalysisUsage(AU);
7777 }
176176 /// the specified stack slot
177177 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
178178
179 void print(raw_ostream &OS, const Module* M = 0) const;
179 void print(raw_ostream &OS, const Module* M = 0) const override;
180180 void dump() const;
181181 };
182182
144144 virtual SmallVectorImpl &getContents() = 0;
145145 virtual const SmallVectorImpl &getContents() const = 0;
146146
147 virtual uint8_t getBundlePadding() const {
147 uint8_t getBundlePadding() const override {
148148 return BundlePadding;
149149 }
150150
151 virtual void setBundlePadding(uint8_t N) {
151 void setBundlePadding(uint8_t N) override {
152152 BundlePadding = N;
153153 }
154154
169169 /// data and also have fixups registered.
170170 ///
171171 class MCEncodedFragmentWithFixups : public MCEncodedFragment {
172 virtual void anchor();
172 void anchor() override;
173173
174174 public:
175175 MCEncodedFragmentWithFixups(MCFragment::FragmentType FType,
200200 /// Fragment for data and encoded instructions.
201201 ///
202202 class MCDataFragment : public MCEncodedFragmentWithFixups {
203 virtual void anchor();
203 void anchor() override;
204204
205205 /// \brief Does this fragment contain encoded instructions anywhere in it?
206206 bool HasInstructions;
219219 {
220220 }
221221
222 virtual SmallVectorImpl &getContents() { return Contents; }
223 virtual const SmallVectorImpl &getContents() const { return Contents; }
224
225 SmallVectorImpl<MCFixup> &getFixups() {
222 SmallVectorImpl<char> &getContents() override { return Contents; }
223 virtual const SmallVectorImpl &getContents() const override {
224 return Contents;
225 }
226
227 SmallVectorImpl &getFixups() override {
226228 return Fixups;
227229 }
228230
229 const SmallVectorImpl &getFixups() const {
231 const SmallVectorImpl &getFixups() const override {
230232 return Fixups;
231233 }
232234
233 virtual bool hasInstructions() const { return HasInstructions; }
235 bool hasInstructions() const override { return HasInstructions; }
234236 virtual void setHasInstructions(bool V) { HasInstructions = V; }
235237
236 virtual bool alignToBundleEnd() const { return AlignToBundleEnd; }
237 virtual void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
238
239 fixup_iterator fixup_begin() { return Fixups.begin(); }
240 const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
241
242 fixup_iterator fixup_end() {return Fixups.end();}
243 const_fixup_iterator fixup_end() const {return Fixups.end();}
238 bool alignToBundleEnd() const override { return AlignToBundleEnd; }
239 void setAlignToBundleEnd(bool V) override { AlignToBundleEnd = V; }
240
241 fixup_iterator fixup_begin() override { return Fixups.begin(); }
242 const_fixup_iterator fixup_begin() const override { return Fixups.begin(); }
243
244 fixup_iterator fixup_end() override {return Fixups.end();}
245 const_fixup_iterator fixup_end() const override {return Fixups.end();}
244246
245247 static bool classof(const MCFragment *F) {
246248 return F->getKind() == MCFragment::FT_Data;
253255 /// consumption.
254256 ///
255257 class MCCompactEncodedInstFragment : public MCEncodedFragment {
256 virtual void anchor();
258 void anchor() override;
257259
258260 /// \brief Should this fragment be aligned to the end of a bundle?
259261 bool AlignToBundleEnd;
265267 {
266268 }
267269
268 virtual bool hasInstructions() const {
270 bool hasInstructions() const override {
269271 return true;
270272 }
271273
272 virtual SmallVectorImpl &getContents() { return Contents; }
273 virtual const SmallVectorImpl &getContents() const { return Contents; }
274
275 virtual bool alignToBundleEnd() const { return AlignToBundleEnd; }
276 virtual void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
274 SmallVectorImpl &getContents() override { return Contents; }
275 const SmallVectorImpl &getContents() const override { return Contents; }
276
277 bool alignToBundleEnd() const override { return AlignToBundleEnd; }
278 void setAlignToBundleEnd(bool V) override { AlignToBundleEnd = V; }
277279
278280 static bool classof(const MCFragment *F) {
279281 return F->getKind() == MCFragment::FT_CompactEncodedInst;
284286 /// relaxed during the assembler layout and relaxation stage.
285287 ///
286288 class MCRelaxableFragment : public MCEncodedFragmentWithFixups {
287 virtual void anchor();
289 void anchor() override;
288290
289291 /// Inst - The instruction this is a fragment for.
290292 MCInst Inst;
307309 : MCEncodedFragmentWithFixups(FT_Relaxable, SD), Inst(_Inst), STI(_STI) {
308310 }
309311
310 virtual SmallVectorImpl &getContents() { return Contents; }
311 virtual const SmallVectorImpl &getContents() const { return Contents; }
312 SmallVectorImpl &getContents() override { return Contents; }
313 const SmallVectorImpl &getContents() const override { return Contents; }
312314
313315 const MCInst &getInst() const { return Inst; }
314316 void setInst(const MCInst& Value) { Inst = Value; }
315317
316318 const MCSubtargetInfo &getSubtargetInfo() { return STI; }
317319
318 SmallVectorImpl &getFixups() {
320 SmallVectorImpl &getFixups() override {
319321 return Fixups;
320322 }
321323
322 const SmallVectorImpl &getFixups() const {
324 const SmallVectorImpl &getFixups() const override {
323325 return Fixups;
324326 }
325327
326 virtual bool hasInstructions() const { return true; }
327
328 fixup_iterator fixup_begin() { return Fixups.begin(); }
329 const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
330
331 fixup_iterator fixup_end() {return Fixups.end();}
332 const_fixup_iterator fixup_end() const {return Fixups.end();}
328 bool hasInstructions() const override { return true; }
329
330 fixup_iterator fixup_begin() override { return Fixups.begin(); }
331 const_fixup_iterator fixup_begin() const override { return Fixups.begin(); }
332
333 fixup_iterator fixup_end() override {return Fixups.end();}
334 const_fixup_iterator fixup_end() const override {return Fixups.end();}
333335
334336 static bool classof(const MCFragment *F) {
335337 return F->getKind() == MCFragment::FT_Relaxable;
6868 bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const;
6969
7070 StringRef getSectionName() const { return SectionName; }
71 virtual std::string getLabelBeginName() const {
71 std::string getLabelBeginName() const override {
7272 return SectionName.str() + "_begin";
7373 }
74 virtual std::string getLabelEndName() const {
74 std::string getLabelEndName() const override {
7575 return SectionName.str() + "_end";
7676 }
7777 unsigned getCharacteristics() const { return Characteristics; }
8080
8181 void setSelection(int Selection, const MCSectionCOFF *Assoc = 0) const;
8282
83 virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
84 raw_ostream &OS,
85 const MCExpr *Subsection) const;
86 virtual bool UseCodeAlign() const;
87 virtual bool isVirtualSection() const;
83 void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
84 const MCExpr *Subsection) const override;
85 bool UseCodeAlign() const override;
86 bool isVirtualSection() const override;
8887
8988 static bool classof(const MCSection *S) {
9089 return S->getVariant() == SV_COFF;
5959 bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const;
6060
6161 StringRef getSectionName() const { return SectionName; }
62 virtual std::string getLabelBeginName() const {
62 std::string getLabelBeginName() const override {
6363 if (Group)
6464 return (SectionName.str() + '_' + Group->getName() + "_begin").str();
6565 return SectionName.str() + "_begin";
6666 }
67 virtual std::string getLabelEndName() const {
67 std::string getLabelEndName() const override {
6868 if (Group)
6969 return (SectionName.str() + '_' + Group->getName() + "_end").str();
7070 return SectionName.str() + "_end";
7474 unsigned getEntrySize() const { return EntrySize; }
7575 const MCSymbol *getGroup() const { return Group; }
7676
77 void PrintSwitchToSection(const MCAsmInfo &MAI,
78 raw_ostream &OS,
79 const MCExpr *Subsection) const;
80 virtual bool UseCodeAlign() const;
81 virtual bool isVirtualSection() const;
77 void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
78 const MCExpr *Subsection) const override;
79 bool UseCodeAlign() const override;
80 bool isVirtualSection() const override;
8281
8382 /// isBaseAddressKnownZero - We know that non-allocatable sections (like
8483 /// debug info) have a base of zero.
85 virtual bool isBaseAddressKnownZero() const {
84 bool isBaseAddressKnownZero() const override {
8685 return (getFlags() & ELF::SHF_ALLOC) == 0;
8786 }
8887
5252 return StringRef(SectionName);
5353 }
5454
55 virtual std::string getLabelBeginName() const {
55 std::string getLabelBeginName() const override {
5656 return StringRef(getSegmentName().str() + getSectionName().str() + "_begin");
5757 }
5858
59 virtual std::string getLabelEndName() const {
59 std::string getLabelEndName() const override {
6060 return StringRef(getSegmentName().str() + getSectionName().str() + "_end");
6161 }
6262
8181 bool &TAAParsed, // Out.
8282 unsigned &StubSize); // Out.
8383
84 virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
85 raw_ostream &OS,
86 const MCExpr *Subsection) const;
87 virtual bool UseCodeAlign() const;
88 virtual bool isVirtualSection() const;
84 void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
85 const MCExpr *Subsection) const override;
86 bool UseCodeAlign() const override;
87 bool isVirtualSection() const override;
8988
9089 static bool classof(const MCSection *S) {
9190 return S->getVariant() == SV_MachO;
117117
118118 virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE);
119119
120 virtual void finish();
120 void finish() override;
121121
122122 /// Callback used to implement the ldr= pseudo.
123123 /// Add a new entry to the constant pool for the current section and return an
135135 ~AggressiveAntiDepBreaker();
136136
137137 /// Start - Initialize anti-dep breaking for a new basic block.
138 void StartBlock(MachineBasicBlock *BB);
138 void StartBlock(MachineBasicBlock *BB) override;
139139
140140 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
141141 /// path
145145 MachineBasicBlock::iterator Begin,
146146 MachineBasicBlock::iterator End,
147147 unsigned InsertPosIndex,
148 DbgValueVector &DbgValues);
148 DbgValueVector &DbgValues) override;
149149
150150 /// Observe - Update liveness information to account for the current
151151 /// instruction, which will not be scheduled.
152152 ///
153 void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
153 void Observe(MachineInstr *MI, unsigned Count,
154 unsigned InsertPosIndex) override;
154155
155156 /// Finish - Finish anti-dep breaking for a basic block.
156 void FinishBlock();
157 void FinishBlock() override;
157158
158159 private:
159160 /// Keep track of a position in the allocation order for each regclass.
6565 static char ID;
6666 explicit BranchFolderPass(): MachineFunctionPass(ID) {}
6767
68 virtual bool runOnMachineFunction(MachineFunction &MF);
69
70 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
68 bool runOnMachineFunction(MachineFunction &MF) override;
69
70 void getAnalysisUsage(AnalysisUsage &AU) const override {
7171 AU.addRequired();
7272 MachineFunctionPass::getAnalysisUsage(AU);
7373 }
109109 : FunctionPass(ID), TM(TM), TLI(0) {
110110 initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
111111 }
112 bool runOnFunction(Function &F);
113
114 const char *getPassName() const { return "CodeGen Prepare"; }
115
116 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
112 bool runOnFunction(Function &F) override;
113
114 const char *getPassName() const override { return "CodeGen Prepare"; }
115
116 void getAnalysisUsage(AnalysisUsage &AU) const override {
117117 AU.addPreserved();
118118 AU.addRequired();
119119 }
605605 namespace {
606606 class CodeGenPrepareFortifiedLibCalls : public SimplifyFortifiedLibCalls {
607607 protected:
608 void replaceCall(Value *With) {
608 void replaceCall(Value *With) override {
609609 CI->replaceAllUsesWith(With);
610610 CI->eraseFromParent();
611611 }
612 bool isFoldable(unsigned SizeCIOp, unsigned, bool) const {
612 bool isFoldable(unsigned SizeCIOp, unsigned, bool) const override {
613613 if (ConstantInt *SizeCI =
614614 dyn_cast(CI->getArgOperand(SizeCIOp)))
615615 return SizeCI->isAllOnesValue();
983983 }
984984
985985 /// \brief Move the instruction back to its original position.
986 void undo() {
986 void undo() override {
987987 DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
988988 Position.insert(Inst);
989989 }
10081008 }
10091009
10101010 /// \brief Restore the original value of the instruction.
1011 void undo() {
1011 void undo() override {
10121012 DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
10131013 << "for: " << *Inst << "\n"
10141014 << "with: " << *Origin << "\n");
10401040 }
10411041
10421042 /// \brief Restore the original list of uses.
1043 void undo() {
1043 void undo() override {
10441044 DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
10451045 for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
10461046 Inst->setOperand(It, OriginalValues[It]);
10631063 Instruction *getBuiltInstruction() { return Inst; }
10641064
10651065 /// \brief Remove the built instruction.
1066 void undo() {
1066 void undo() override {
10671067 DEBUG(dbgs() << "Undo: TruncBuilder: " << *Inst << "\n");
10681068 Inst->eraseFromParent();
10691069 }
10861086 Instruction *getBuiltInstruction() { return Inst; }
10871087
10881088 /// \brief Remove the built instruction.
1089 void undo() {
1089 void undo() override {
10901090 DEBUG(dbgs() << "Undo: SExtBuilder: " << *Inst << "\n");
10911091 Inst->eraseFromParent();
10921092 }
11071107 }
11081108
11091109 /// \brief Mutate the instruction back to its original type.
1110 void undo() {
1110 void undo() override {
11111111 DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
11121112 << "\n");
11131113 Inst->mutateType(OrigTy);
11471147 }
11481148
11491149 /// \brief Reassign the original uses of Inst to Inst.
1150 void undo() {
1150 void undo() override {
11511151 DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
11521152 for (use_iterator UseIt = OriginalUses.begin(),
11531153 EndIt = OriginalUses.end();
11831183 ~InstructionRemover() { delete Replacer; }
11841184
11851185 /// \brief Really remove the instruction.
1186 void commit() { delete Inst; }
1186 void commit() override { delete Inst; }
11871187
11881188 /// \brief Resurrect the instruction and reassign it to the proper uses if
11891189 /// new value was provided when build this action.
1190 void undo() {
1190 void undo() override {
11911191 DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
11921192 Inserter.insert(Inst);
11931193 if (Replacer)
7171 ~CriticalAntiDepBreaker();
7272
7373 /// Start - Initialize anti-dep breaking for a new basic block.
74 void StartBlock(MachineBasicBlock *BB);
74 void StartBlock(MachineBasicBlock *BB) override;
7575
7676 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
7777 /// path
8181 MachineBasicBlock::iterator Begin,
8282 MachineBasicBlock::iterator End,
8383 unsigned InsertPosIndex,
84 DbgValueVector &DbgValues);
84 DbgValueVector &DbgValues) override;
8585
8686 /// Observe - Update liveness information to account for the current
8787 /// instruction, which will not be scheduled.
8888 ///
89 void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
89 void Observe(MachineInstr *MI, unsigned Count,
90 unsigned InsertPosIndex) override;
9091
9192 /// Finish - Finish anti-dep breaking for a basic block.
92 void FinishBlock();
93 void FinishBlock() override;
9394
9495 private:
9596 void PrescanInstruction(MachineInstr *MI);
107107 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
108108 MachineDominatorTree &MDT, bool IsPostRA);
109109 // Schedule - Actual scheduling work.
110 void schedule();
110 void schedule() override;
111111 };
112112 }
113113
2626
2727 namespace {
2828 class DeadMachineInstructionElim : public MachineFunctionPass {
29 virtual bool runOnMachineFunction(MachineFunction &MF);
29 bool runOnMachineFunction(MachineFunction &MF) override;
3030
3131 const TargetRegisterInfo *TRI;
3232 const MachineRegisterInfo *MRI;
4646 initializeDominatorTreeWrapperPassPass(*PassRegistry::getPassRegistry());
4747 }
4848
49 virtual bool runOnFunction(Function &Fn);
49 bool runOnFunction(Function &Fn) override;
5050
51 virtual void getAnalysisUsage(AnalysisUsage &AU) const { }
51 void getAnalysisUsage(AnalysisUsage &AU) const override { }
5252
53 const char *getPassName() const {
53 const char *getPassName() const override {
5454 return "Exception handling preparation";
5555 }
5656 };
589589 public:
590590 static char ID;
591591 EarlyIfConverter() : MachineFunctionPass(ID) {}
592 void getAnalysisUsage(AnalysisUsage &AU) const;
593 bool runOnMachineFunction(MachineFunction &MF);
594 const char *getPassName() const { return "Early If-Conversion"; }
592 void getAnalysisUsage(AnalysisUsage &AU) const override;
593 bool runOnMachineFunction(MachineFunction &MF) override;
594 const char *getPassName() const override { return "Early If-Conversion"; }
595595
596596 private:
597597 bool tryConvertIf(MachineBasicBlock*);
3131 DebugLoc DL) const;
3232 public:
3333 ErlangGC();
34 bool findCustomSafePoints(GCFunctionInfo &FI, MachineFunction &MF);
34 bool findCustomSafePoints(GCFunctionInfo &FI, MachineFunction &MF) override;
3535 };
3636
3737 }
154154 ExeDepsFix(const TargetRegisterClass *rc)
155155 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
156156
157 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
157 void getAnalysisUsage(AnalysisUsage &AU) const override {
158158 AU.setPreservesAll();
159159 MachineFunctionPass::getAnalysisUsage(AU);
160160 }
161161
162 virtual bool runOnMachineFunction(MachineFunction &MF);
163
164 virtual const char *getPassName() const {
162 bool runOnMachineFunction(MachineFunction &MF) override;
163
164 const char *getPassName() const override {
165165 return "Execution dependency fix";
166166 }
167167
2929 ExpandISelPseudos() : MachineFunctionPass(ID) {}
3030
3131 private:
32 virtual bool runOnMachineFunction(MachineFunction &MF);
32 bool runOnMachineFunction(MachineFunction &MF) override;
3333
34 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
34 void getAnalysisUsage(AnalysisUsage &AU) const override {
3535 MachineFunctionPass::getAnalysisUsage(AU);
3636 }
3737 };
3434 static char ID; // Pass identification, replacement for typeid
3535 ExpandPostRA() : MachineFunctionPass(ID) {}
3636
37 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
37 void getAnalysisUsage(AnalysisUsage &AU) const override {
3838 AU.setPreservesCFG();
3939 AU.addPreservedID(MachineLoopInfoID);
4040 AU.addPreservedID(MachineDominatorsID);
4242 }
4343
4444 /// runOnMachineFunction - pass entry point
45 bool runOnMachineFunction(MachineFunction&);
45 bool runOnMachineFunction(MachineFunction&) override;
4646
4747 private:
4848 bool LowerSubregToReg(MachineInstr *MI);
3131 public:
3232 explicit Printer(raw_ostream &OS) : FunctionPass(ID), OS(OS) {}
3333
34
35 const char *getPassName() const;
36 void getAnalysisUsage(AnalysisUsage &AU) const;
37
38 bool runOnFunction(Function &F);
39 bool doFinalization(Module &M);
34
35 const char *getPassName() const override;
36 void getAnalysisUsage(AnalysisUsage &AU) const override;
37
38 bool runOnFunction(Function &F) override;
39 bool doFinalization(Module &M) override;
4040 };
4141
4242 }
5151 static char ID;
5252
5353 LowerIntrinsics();
54 const char *getPassName() const;
55 void getAnalysisUsage(AnalysisUsage &AU) const;
56
57 bool doInitialization(Module &M);
58 bool runOnFunction(Function &F);
54 const char *getPassName() const override;
55 void getAnalysisUsage(AnalysisUsage &AU) const override;
56
57 bool doInitialization(Module &M) override;
58 bool runOnFunction(Function &F) override;
5959 };
6060
6161
8181 static char ID;
8282
8383 GCMachineCodeAnalysis();
84 void getAnalysisUsage(AnalysisUsage &AU) const;
85
86 bool runOnMachineFunction(MachineFunction &MF);
84 void getAnalysisUsage(AnalysisUsage &AU) const override;
85
86 bool runOnMachineFunction(MachineFunction &MF) override;
8787 };
8888
8989 }
173173 initializeIfConverterPass(*PassRegistry::getPassRegistry());
174174 }
175175
176 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
176 void getAnalysisUsage(AnalysisUsage &AU) const override {
177177 AU.addRequired();
178178 MachineFunctionPass::getAnalysisUsage(AU);
179179 }
180180
181 virtual bool runOnMachineFunction(MachineFunction &MF);
181 bool runOnMachineFunction(MachineFunction &MF) override;
182182
183183 private:
184184 bool ReverseBranchCondition(BBInfo &BBI);
152152 TRI(*mf.getTarget().getRegisterInfo()),
153153 MBFI(pass.getAnalysis()) {}
154154
155 void spill(LiveRangeEdit &);
155 void spill(LiveRangeEdit &) override;
156156
157157 private:
158158 bool isSnippet(const LiveInterval &SnipLI);
6060
6161 private:
6262
63 virtual bool runOnMachineFunction(MachineFunction &);
64 virtual void releaseMemory();
65 virtual void getAnalysisUsage(AnalysisUsage &) const;
63 bool runOnMachineFunction(MachineFunction &) override;
64 void releaseMemory() override;
65 void getAnalysisUsage(AnalysisUsage &) const override;
6666
6767 };
6868
7777 explicit LocalStackSlotPass() : MachineFunctionPass(ID) {
7878 initializeLocalStackSlotPassPass(*PassRegistry::getPassRegistry());
7979 }
80 bool runOnMachineFunction(MachineFunction &MF);
81
82 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
80 bool runOnMachineFunction(MachineFunction &MF) override;
81
82 void getAnalysisUsage(AnalysisUsage &AU) const override {
8383 AU.setPreservesCFG();
8484 AU.addRequired();
8585 MachineFunctionPass::getAnalysisUsage(AU);
236236 initializeMachineBlockPlacementPass(*PassRegistry::getPassRegistry());
237237 }
238238
239 bool runOnMachineFunction(MachineFunction &F);
240
241 void getAnalysisUsage(AnalysisUsage &AU) const {
239 bool runOnMachineFunction(MachineFunction &F) override;
240
241 void getAnalysisUsage(AnalysisUsage &AU) const override {
242242 AU.addRequired();
243243 AU.addRequired();
244244 AU.addRequired();
11461146 initializeMachineBlockPlacementStatsPass(*PassRegistry::getPassRegistry());
11471147 }
11481148
1149 bool runOnMachineFunction(MachineFunction &F);
1150
1151 void getAnalysisUsage(AnalysisUsage &AU) const {
1149 bool runOnMachineFunction(MachineFunction &F) override;
1150
1151 void getAnalysisUsage(AnalysisUsage &AU) const override {
11521152 AU.addRequired();
11531153 AU.addRequired();
11541154 AU.setPreservesAll();
4848 initializeMachineCSEPass(*PassRegistry::getPassRegistry());
4949 }
5050
51 virtual bool runOnMachineFunction(MachineFunction &MF);
52
53 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
51 bool runOnMachineFunction(MachineFunction &MF) override;
52
53 void getAnalysisUsage(AnalysisUsage &AU) const override {
5454 AU.setPreservesCFG();
5555 MachineFunctionPass::getAnalysisUsage(AU);
5656 AU.addRequired();
5959 AU.addPreserved();
6060 }
6161
62 virtual void releaseMemory() {
62 void releaseMemory() override {
6363 ScopeMap.clear();
6464 Exps.clear();
6565 }
4141 initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
4242 }
4343
44 virtual bool runOnMachineFunction(MachineFunction &MF);
44 bool runOnMachineFunction(MachineFunction &MF) override;
4545
4646 private:
4747 typedef SmallVector DestList;
3333 MachineFunctionPrinterPass(raw_ostream &os, const std::string &banner)
3434 : MachineFunctionPass(ID), OS(os), Banner(banner) {}
3535
36 const char *getPassName() const { return "MachineFunction Printer"; }
36 const char *getPassName() const override { return "MachineFunction Printer"; }
3737
38 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
38 void getAnalysisUsage(AnalysisUsage &AU) const override {
3939 AU.setPreservesAll();
4040 MachineFunctionPass::getAnalysisUsage(AU);
4141 }
4242
43 bool runOnMachineFunction(MachineFunction &MF) {
43 bool runOnMachineFunction(MachineFunction &MF) override {
4444 OS << "# " << Banner << ":\n";
4545 MF.print(OS, getAnalysisIfAvailable());
4646 return false;
2525 initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
2626 }
2727
28 virtual bool runOnMachineFunction(MachineFunction &MF);
28 bool runOnMachineFunction(MachineFunction &MF) override;
2929 };
3030 } // end anonymous namespace
3131
7676 initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
7777 }
7878
79 virtual bool runOnMachineFunction(MachineFunction &MF);
79 bool runOnMachineFunction(MachineFunction &MF) override;
8080 };
8181 } // end anonymous namespace
8282
124124 initializeMachineLICMPass(*PassRegistry::getPassRegistry());
125125 }
126126
127 virtual bool runOnMachineFunction(MachineFunction &MF);
128
129 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
127 bool runOnMachineFunction(MachineFunction &MF) override;
128
129 void getAnalysisUsage(AnalysisUsage &AU) const override {
130130 AU.addRequired();
131131 AU.addRequired();
132132 AU.addRequired();
135135 MachineFunctionPass::getAnalysisUsage(AU);
136136 }
137137
138 virtual void releaseMemory() {
138 void releaseMemory() override {
139139 RegSeen.clear();
140140 RegPressure.clear();
141141 RegLimit.clear();
4444
4545 void setMap(MMIAddrLabelMap *map) { Map = map; }
4646
47 virtual void deleted();
48 virtual void allUsesReplacedWith(Value *V2);
47 void deleted() override;
48 void allUsesReplacedWith(Value *V2) override;
4949 };
5050
5151 class MMIAddrLabelMap {
9999 public:
100100 MachineSchedulerBase(char &ID): MachineFunctionPass(ID) {}
101101
102 virtual void print(raw_ostream &O, const Module* = 0) const;
102 void print(raw_ostream &O, const Module* = 0) const override;
103103
104104 protected:
105105 void scheduleRegions(ScheduleDAGInstrs &Scheduler);
110110 public:
111111 MachineScheduler();
112112
113 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
114
115 virtual bool runOnMachineFunction(MachineFunction&);
113 void getAnalysisUsage(AnalysisUsage &AU) const override;
114
115 bool runOnMachineFunction(MachineFunction&) override;
116116
117117 static char ID; // Class identification, replacement for typeinfo
118118
125125 public:
126126 PostMachineScheduler();
127127
128 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
129
130 virtual bool runOnMachineFunction(MachineFunction&);
128 void getAnalysisUsage(AnalysisUsage &AU) const override;
129
130 bool runOnMachineFunction(MachineFunction&) override;
131131
132132 static char ID; // Class identification, replacement for typeinfo
133133
12151215 const TargetRegisterInfo *tri)
12161216 : TII(tii), TRI(tri) {}
12171217
1218 virtual void apply(ScheduleDAGMI *DAG);
1218 void apply(ScheduleDAGMI *DAG) override;
12191219 protected:
12201220 void clusterNeighboringLoads(ArrayRef Loads, ScheduleDAGMI *DAG);
12211221 };
13181318 public:
13191319 MacroFusion(const TargetInstrInfo *tii): TII(tii) {}
13201320
1321 virtual void apply(ScheduleDAGMI *DAG);
1321 void apply(ScheduleDAGMI *DAG) override;
13221322 };
13231323 } // anonymous
13241324
13671367 public:
13681368 CopyConstrain(const TargetInstrInfo *, const TargetRegisterInfo *) {}
13691369
1370 virtual void apply(ScheduleDAGMI *DAG);
1370 void apply(ScheduleDAGMI *DAG) override;
13711371
13721372 protected:
13731373 void constrainLocalCopy(SUnit *CopySU, ScheduleDAGMILive *DAG);
32503250 public:
32513251 ILPScheduler(bool MaximizeILP): DAG(0), Cmp(MaximizeILP) {}
32523252
3253 virtual void initialize(ScheduleDAGMI *dag) {
3253 void initialize(ScheduleDAGMI *dag) override {
32543254 assert(dag->hasVRegLiveness() && "ILPScheduler needs vreg liveness");
32553255 DAG = static_cast(dag);
32563256 DAG->computeDFSResult();
32593259 ReadyQ.clear();
32603260 }
32613261
3262 virtual void registerRoots() {
3262 void registerRoots() override {
32633263 // Restore the heap in ReadyQ with the updated DFS results.
32643264 std::make_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
32653265 }
32683268 /// -----------------------------------------
32693269
32703270 /// Callback to select the highest priority node from the ready Q.
3271 virtual SUnit *pickNode(bool &IsTopNode) {
3271 SUnit *pickNode(bool &IsTopNode) override {
32723272 if (ReadyQ.empty()) return NULL;
32733273 std::pop_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
32743274 SUnit *SU = ReadyQ.back();
32843284 }
32853285
32863286 /// \brief Scheduler callback to notify that a new subtree is scheduled.
3287 virtual void scheduleTree(unsigned SubtreeID) {
3287 void scheduleTree(unsigned SubtreeID) override {
32883288 std::make_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
32893289 }
32903290
32913291 /// Callback after a node is scheduled. Mark a newly scheduled tree, notify
32923292 /// DFSResults, and resort the priority Q.
3293 virtual void schedNode(SUnit *SU, bool IsTopNode) {
3293 void schedNode(SUnit *SU, bool IsTopNode) override {
32943294 assert(!IsTopNode && "SchedDFSResult needs bottom-up");
32953295 }
32963296
3297 virtual void releaseTopNode(SUnit *) { /*only called for top roots*/ }
3298
3299 virtual void releaseBottomNode(SUnit *SU) {
3297 void releaseTopNode(SUnit *) override { /*only called for top roots*/ }
3298
3299 void releaseBottomNode(SUnit *SU) override {
33003300 ReadyQ.push_back(SU);
33013301 std::push_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
33023302 }
5959 initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
6060 }
6161
62 virtual bool runOnMachineFunction(MachineFunction &MF);
63
64 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
62 bool runOnMachineFunction(MachineFunction &MF) override;
63
64 void getAnalysisUsage(AnalysisUsage &AU) const override {
6565 AU.setPreservesCFG();
6666 MachineFunctionPass::getAnalysisUsage(AU);
6767 AU.addRequired();
7171 AU.addPreserved();
7272 }
7373
74 virtual void releaseMemory() {
74 void releaseMemory() override {
7575 CEBCandidates.clear();
7676 }
7777
301301 // instructions.
302302 namespace {
303303 class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble {
304 const char *getName() const { return "MinInstr"; }
305 const MachineBasicBlock *pickTracePred(const MachineBasicBlock*);
306 const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*);
304 const char *getName() const override { return "MinInstr"; }
305 const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) override;
306 const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) override;
307307
308308 public:
309309 MinInstrCountEnsemble(MachineTraceMetrics *mtm)
245245 initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry());
246246 }
247247
248 void getAnalysisUsage(AnalysisUsage &AU) const {
248 void getAnalysisUsage(AnalysisUsage &AU) const override {
249249 AU.setPreservesAll();
250250 MachineFunctionPass::getAnalysisUsage(AU);
251251 }
252252
253 bool runOnMachineFunction(MachineFunction &MF) {
253 bool runOnMachineFunction(MachineFunction &MF) override {
254254 MF.verify(this, Banner);
255255 return false;
256256 }
3636 initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
3737 }
3838
39 virtual bool runOnMachineFunction(MachineFunction &MF);
39 bool runOnMachineFunction(MachineFunction &MF) override;
4040
41 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
41 void getAnalysisUsage(AnalysisUsage &AU) const override {
4242 AU.setPreservesCFG();
4343 MachineFunctionPass::getAnalysisUsage(AU);
4444 }
5656 initializePHIEliminationPass(*PassRegistry::getPassRegistry());
5757 }
5858
59 virtual bool runOnMachineFunction(MachineFunction &Fn);
60 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
59 bool runOnMachineFunction(MachineFunction &Fn) override;
60 void getAnalysisUsage(AnalysisUsage &AU) const override;
6161
6262 private:
6363 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
109109 initializePeepholeOptimizerPass(*PassRegistry::getPassRegistry());
110110 }
111111
112 virtual bool runOnMachineFunction(MachineFunction &MF);
113
114 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
112 bool runOnMachineFunction(MachineFunction &MF) override;
113
114 void getAnalysisUsage(AnalysisUsage &AU) const override {
115115 AU.setPreservesCFG();
116116 MachineFunctionPass::getAnalysisUsage(AU);
117117 if (Aggressive) {
8484 static char ID;
8585 PostRAScheduler() : MachineFunctionPass(ID) {}
8686
87 void getAnalysisUsage(AnalysisUsage &AU) const {
87 void getAnalysisUsage(AnalysisUsage &AU) const override {
8888 AU.setPreservesCFG();
8989 AU.addRequired();
9090 AU.addRequired();
9595 MachineFunctionPass::getAnalysisUsage(AU);
9696 }
9797
98 bool runOnMachineFunction(MachineFunction &Fn);
98 bool runOnMachineFunction(MachineFunction &Fn) override;
9999 };
100100 char PostRAScheduler::ID = 0;
101101
140140 /// startBlock - Initialize register live-range state for scheduling in
141141 /// this block.
142142 ///
143 void startBlock(MachineBasicBlock *BB);
143 void startBlock(MachineBasicBlock *BB) override;
144144
145145 // Set the index of RegionEnd within the current BB.
146146 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; }
147147
148148 /// Initialize the scheduler state for the next scheduling region.
149 virtual void enterRegion(MachineBasicBlock *bb,
150 MachineBasicBlock::iterator begin,
151 MachineBasicBlock::iterator end,
152 unsigned regioninstrs);
149 void enterRegion(MachineBasicBlock *bb,
150 MachineBasicBlock::iterator begin,
151 MachineBasicBlock::iterator end,
152 unsigned regioninstrs) override;
153153
154154 /// Notify that the scheduler has finished scheduling the current region.
155 virtual void exitRegion();
155 void exitRegion() override;
156156
157157 /// Schedule - Schedule the instruction range using list scheduling.
158158 ///
159 void schedule();
159 void schedule() override;
160160
161161 void EmitSchedule();
162162
167167
168168 /// finishBlock - Clean up register live-range state.
169169 ///
170 void finishBlock();
170 void finishBlock() override;
171171
172172 private:
173173 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
4040 initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
4141 }
4242
43 virtual void getAnalysisUsage(AnalysisUsage &au) const;
43 void getAnalysisUsage(AnalysisUsage &au) const override;
4444
45 virtual bool runOnMachineFunction(MachineFunction &fn);
45 bool runOnMachineFunction(MachineFunction &fn) override;
4646 };
4747 } // end anonymous namespace
4848
3636 initializePEIPass(*PassRegistry::getPassRegistry());
3737 }
3838
39 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
39 void getAnalysisUsage(AnalysisUsage &AU) const override;
4040
4141 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
4242 /// frame indexes with appropriate references.
4343 ///
44 bool runOnMachineFunction(MachineFunction &Fn);
44 bool runOnMachineFunction(MachineFunction &Fn) override;
4545
4646 private:
4747 RegScavenger *RS;
7575 RABasic();
7676
7777 /// Return the pass name.
78 virtual const char* getPassName() const {
78 const char* getPassName() const override {
7979 return "Basic Register Allocator";
8080 }
8181
8282 /// RABasic analysis usage.
83 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
84
85 virtual void releaseMemory();
86
87 virtual Spiller &spiller() { return *SpillerInstance; }
83 void getAnalysisUsage(AnalysisUsage &AU) const override;
84
85 void releaseMemory() override;
86
87 Spiller &spiller() override { return *SpillerInstance; }
8888
8989 virtual float getPriority(LiveInterval *LI) { return LI->weight; }
9090
91 virtual void enqueue(LiveInterval *LI) {
91 void enqueue(LiveInterval *LI) override {
9292 Queue.push(LI);
9393 }
9494
95 virtual LiveInterval *dequeue() {
95 LiveInterval *dequeue() override {
9696 if (Queue.empty())
9797 return 0;
9898 LiveInterval *LI = Queue.top();
100100 return LI;
101101 }
102102
103 virtual unsigned selectOrSplit(LiveInterval &VirtReg,
104 SmallVectorImpl &SplitVRegs);
103 unsigned selectOrSplit(LiveInterval &VirtReg,
104 SmallVectorImpl &SplitVRegs) override;
105105
106106 /// Perform register allocation.
107 virtual bool runOnMachineFunction(MachineFunction &mf);
107 bool runOnMachineFunction(MachineFunction &mf) override;
108108
109109 // Helper for spilling all live virtual registers currently unified under preg
110110 // that interfere with the most recently queried lvr. Return true if spilling
149149 spillImpossible = ~0u
150150 };
151151 public:
152 virtual const char *getPassName() const {
152 const char *getPassName() const override {
153153 return "Fast Register Allocator";
154154 }
155155
156 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
156 void getAnalysisUsage(AnalysisUsage &AU) const override {
157157 AU.setPreservesCFG();
158158 MachineFunctionPass::getAnalysisUsage(AU);
159159 }
160160
161161 private:
162 bool runOnMachineFunction(MachineFunction &Fn);
162 bool runOnMachineFunction(MachineFunction &Fn) override;
163163 void AllocateBasicBlock();
164164 void handleThroughOperands(MachineInstr *MI,
165165 SmallVectorImpl &VirtDead);
255255 RAGreedy();
256256
257257 /// Return the pass name.
258 virtual const char* getPassName() const {
258 const char* getPassName() const override {
259259 return "Greedy Register Allocator";
260260 }
261261
262262 /// RAGreedy analysis usage.
263 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
264 virtual void releaseMemory();
265 virtual Spiller &spiller() { return *SpillerInstance; }
266 virtual void enqueue(LiveInterval *LI);
267 virtual LiveInterval *dequeue();
268 virtual unsigned selectOrSplit(LiveInterval&,
269 SmallVectorImpl&);
263 void getAnalysisUsage(AnalysisUsage &AU) const override;
264 void releaseMemory() override;
265 Spiller &spiller() override { return *SpillerInstance; }
266 void enqueue(LiveInterval *LI) override;
267 LiveInterval *dequeue() override;
268 unsigned selectOrSplit(LiveInterval&, SmallVectorImpl&) override;
270269
271270 /// Perform register allocation.
272 virtual bool runOnMachineFunction(MachineFunction &mf);
271 bool runOnMachineFunction(MachineFunction &mf) override;
273272
274273 static char ID;
275274
277276 unsigned selectOrSplitImpl(LiveInterval &, SmallVectorImpl &,
278277 SmallVirtRegSet &, unsigned = 0);
279278
280 bool LRE_CanEraseVirtReg(unsigned);
281 void LRE_WillShrinkVirtReg(unsigned);
282 void LRE_DidCloneVirtReg(unsigned, unsigned);
279 bool LRE_CanEraseVirtReg(unsigned) override;
280 void LRE_WillShrinkVirtReg(unsigned) override;
281 void LRE_DidCloneVirtReg(unsigned, unsigned) override;
283282 void enqueue(PQueue &CurQueue, LiveInterval *LI);
284283 LiveInterval *dequeue(PQueue &CurQueue);
285284
9595 }
9696
9797 /// Return the pass name.
98 virtual const char* getPassName() const {
98 const char* getPassName() const override {
9999 return "PBQP Register Allocator";
100100 }
101101
102102 /// PBQP analysis usage.
103 virtual void getAnalysisUsage(AnalysisUsage &au) const;
103 void getAnalysisUsage(AnalysisUsage &au) const override;
104104
105105 /// Perform register allocation
106 virtual bool runOnMachineFunction(MachineFunction &MF);
106 bool runOnMachineFunction(MachineFunction &MF) override;
107107
108108 private:
109109
110110 void eliminateDeadDefs();
111111
112112 /// LiveRangeEdit callback.
113 void LRE_WillEraseInstruction(MachineInstr *MI);
113 void LRE_WillEraseInstruction(MachineInstr *MI) override;
114114
115115 /// coalesceLocals - coalesce the LocalWorkList.
116116 void coalesceLocals();
186186 initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
187187 }
188188
189 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
190
191 virtual void releaseMemory();
189 void getAnalysisUsage(AnalysisUsage &AU) const override;
190
191 void releaseMemory() override;
192192
193193 /// runOnMachineFunction - pass entry point
194 virtual bool runOnMachineFunction(MachineFunction&);
194 bool runOnMachineFunction(MachineFunction&) override;
195195
196196 /// print - Implement the dump method.
197 virtual void print(raw_ostream &O, const Module* = 0) const;
197 void print(raw_ostream &O, const Module* = 0) const override;
198198 };
199199 } /// end anonymous namespace
200200
5454 public:
5555 ShadowStackGC();
5656
57 bool initializeCustomLowering(Module &M);
58 bool performCustomLowering(Function &F);
57 bool initializeCustomLowering(Module &M) override;
58 bool performCustomLowering(Function &F) override;
5959
6060 private:
6161 bool IsNullValue(Value *V);
5959 public:
6060 static char ID; // Pass identification, replacement for typeid
6161 explicit SjLjEHPrepare(const TargetMachine *TM) : FunctionPass(ID), TM(TM) {}
62 bool doInitialization(Module &M);
63 bool runOnFunction(Function &F);
64
65 virtual void getAnalysisUsage(AnalysisUsage &AU) const {}
66 const char *getPassName() const {
62 bool doInitialization(Module &M) override;
63 bool runOnFunction(Function &F) override;
64
65 void getAnalysisUsage(AnalysisUsage &AU) const override {}
66 const char *getPassName() const override {
6767 return "SJLJ Exception Handling preparation";
6868 }
6969
146146 }
147147
148148 private:
149 virtual bool runOnMachineFunction(MachineFunction&);
150 virtual void getAnalysisUsage(AnalysisUsage&) const;
151 virtual void releaseMemory();
149 bool runOnMachineFunction(MachineFunction&) override;
150 void getAnalysisUsage(AnalysisUsage&) const override;
151 void releaseMemory() override;
152152
153153 void activate(unsigned);
154154 };
163163 VirtRegMap &vrm)
164164 : SpillerBase(pass, mf, vrm) {}
165165
166 void spill(LiveRangeEdit &LRE) {
166 void spill(LiveRangeEdit &LRE) override {
167167 // Ignore spillIs - we don't use it.
168168 trivialSpillEverywhere(LRE);
169169 }
129129 StackColoring() : MachineFunctionPass(ID) {
130130 initializeStackColoringPass(*PassRegistry::getPassRegistry());
131131 }
132 void getAnalysisUsage(AnalysisUsage &AU) const;
133 bool runOnMachineFunction(MachineFunction &MF);
132 void getAnalysisUsage(AnalysisUsage &AU) const override;
133 bool runOnMachineFunction(MachineFunction &MF) override;
134134
135135 private:
136136 /// Debug.
8686 initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
8787 }
8888
89 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
89 void getAnalysisUsage(AnalysisUsage &AU) const override {
9090 AU.setPreservesCFG();
9191 AU.addRequired();
9292 AU.addPreserved();
9797 MachineFunctionPass::getAnalysisUsage(AU);
9898 }
9999
100 virtual bool runOnMachineFunction(MachineFunction &MF);
100 bool runOnMachineFunction(MachineFunction &MF) override;
101101
102102 private:
103103 void InitializeSlots();
7878 explicit TailDuplicatePass() :
7979 MachineFunctionPass(ID), PreRegAlloc(false) {}
8080
81 virtual bool runOnMachineFunction(MachineFunction &MF);
82
83 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
81 bool runOnMachineFunction(MachineFunction &MF) override;
82
83 void getAnalysisUsage(AnalysisUsage &AU) const override;
8484
8585 private:
8686 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
143143 initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
144144 }
145145
146 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
146 void getAnalysisUsage(AnalysisUsage &AU) const override {
147147 AU.setPreservesCFG();
148148 AU.addRequired();
149149 AU.addPreserved();
155155 }
156156
157157 /// runOnMachineFunction - Pass entry point.
158 bool runOnMachineFunction(MachineFunction&);
158 bool runOnMachineFunction(MachineFunction&) override;
159159 };
160160 } // end anonymous namespace
161161
3939
4040 namespace {
4141 class UnreachableBlockElim : public FunctionPass {
42 virtual bool runOnFunction(Function &F);
42 bool runOnFunction(Function &F) override;
4343 public:
4444 static char ID; // Pass identification, replacement for typeid
4545 UnreachableBlockElim() : FunctionPass(ID) {
4646 initializeUnreachableBlockElimPass(*PassRegistry::getPassRegistry());
4747 }
4848
49 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
49 void getAnalysisUsage(AnalysisUsage &AU) const override {
5050 AU.addPreserved();
5151 }
5252 };
9494
9595 namespace {
9696 class UnreachableMachineBlockElim : public MachineFunctionPass {
97 virtual bool runOnMachineFunction(MachineFunction &F);
98 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
97 bool runOnMachineFunction(MachineFunction &F) override;
98 void getAnalysisUsage(AnalysisUsage &AU) const override;
9999 MachineModuleInfo *MMI;
100100 public:
101101 static char ID; // Pass identification, replacement for typeid
168168 static char ID;
169169 VirtRegRewriter() : MachineFunctionPass(ID) {}
170170
171 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
172
173 virtual bool runOnMachineFunction(MachineFunction&);
171 void getAnalysisUsage(AnalysisUsage &AU) const override;
172
173 bool runOnMachineFunction(MachineFunction&) override;
174174 };
175175 } // end anonymous namespace
176176