llvm.org GIT mirror llvm / 9f76ed5
Move thumb and thumb2 tests into separate directories. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 10 years ago
56 changed file(s) with 1015 addition(s) and 632 deletion(s). Raw diff Collapse all Expand all
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test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll less more
None ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
1
2 %struct.rtx_def = type { i8 }
3 @str = external global [7 x i8]
4
5 define void @f1() {
6 %D = alloca %struct.rtx_def, align 1
7 %tmp1 = bitcast %struct.rtx_def* %D to i32*
8 %tmp7 = load i32* %tmp1
9 %tmp14 = lshr i32 %tmp7, 1
10 %tmp1415 = and i32 %tmp14, 1
11 call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
12 ret void
13 }
14
15 declare void @printf(i32, ...)
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-27
test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll less more
None ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
1
2 %struct.color_sample = type { i32 }
3 %struct.ref = type { %struct.color_sample, i16, i16 }
4
5 define void @zcvrs() {
6 br i1 false, label %bb22, label %UnifiedReturnBlock
7
8 bb22:
9 br i1 false, label %bb64, label %UnifiedReturnBlock
10
11 bb64:
12 %tmp67 = urem i32 0, 0
13 %tmp69 = icmp slt i32 %tmp67, 10
14 %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55
15 %tmp75 = add i8 %iftmp.13.0, 0
16 store i8 %tmp75, i8* null
17 %tmp81 = udiv i32 0, 0
18 %tmp83 = icmp eq i32 %tmp81, 0
19 br i1 %tmp83, label %bb85, label %bb64
20
21 bb85:
22 ret void
23
24 UnifiedReturnBlock:
25 ret void
26 }
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test/CodeGen/ARM/2007-03-06-AddR7.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \
2 ; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
3
4 %struct.__fooAllocator = type opaque
5 %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
6 %struct.__fooZ = type opaque
7 %struct.__fooU = type opaque
8 %struct.__fooString = type opaque
9 %struct.__fooV = type opaque
10 %struct.fooXBase = type { i32, [4 x i8] }
11 %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
12 %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
13 %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
14 %struct.aa_ivar = type { i8*, i8*, i32 }
15 %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
16 %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
17 %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
18 %struct.aa_object = type { %struct.aa_class* }
19 %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
20 %struct.aa_ss = type opaque
21 @__kfooYTypeID = external global i32 ; [#uses=3]
22 @__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1]
23 @__fooXClassTableSize = external global i32 ; [#uses=1]
24 @__fooXAaClassTable = external global i32* ; [#uses=1]
25 @s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2]
26 @str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
27
28
29 define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext {
30 entry:
31 %args = alloca i8*, align 4 ; [#uses=5]
32 %args4 = bitcast i8** %args to i8* ; [#uses=2]
33 call void @llvm.va_start( i8* %args4 )
34 %tmp6 = load i32* @__kfooYTypeID ; [#uses=1]
35 icmp eq i32 %tmp6, 0 ; :0 [#uses=1]
36 br i1 %0, label %cond_true, label %cond_next
37
38 cond_true: ; preds = %entry
39 %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; [#uses=1]
40 store i32 %tmp7, i32* @__kfooYTypeID
41 br label %cond_next
42
43 cond_next: ; preds = %cond_true, %entry
44 %tmp8 = load i32* @__kfooYTypeID ; [#uses=2]
45 %tmp15 = load i32* @__fooXClassTableSize ; [#uses=1]
46 icmp ugt i32 %tmp15, %tmp8 ; :1 [#uses=1]
47 br i1 %1, label %cond_next18, label %cond_true58
48
49 cond_next18: ; preds = %cond_next
50 %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; [#uses=1]
51 %tmp22 = load i32* %tmp21 ; [#uses=2]
52 %tmp29 = load i32** @__fooXAaClassTable ; [#uses=1]
53 %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; [#uses=1]
54 %tmp32 = load i32* %tmp31 ; [#uses=1]
55 icmp eq i32 %tmp22, %tmp32 ; :2 [#uses=1]
56 %.not = xor i1 %2, true ; [#uses=1]
57 icmp ugt i32 %tmp22, 4095 ; :3 [#uses=1]
58 %bothcond = and i1 %.not, %3 ; [#uses=1]
59 br i1 %bothcond, label %cond_true58, label %bb48
60
61 bb48: ; preds = %cond_next18
62 %tmp78 = call i32 @strlen( i8* %componentDesc ) ; [#uses=4]
63 %tmp92 = alloca i32, i32 %tmp78 ; [#uses=2]
64 icmp sgt i32 %tmp78, 0 ; :4 [#uses=1]
65 br i1 %4, label %cond_true111, label %bb114
66
67 cond_true58: ; preds = %cond_next18, %cond_next
68 %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2]
69 icmp eq %struct.aa_ss* %tmp59, null ; :5 [#uses=1]
70 %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; [#uses=2]
71 br i1 %5, label %cond_true60, label %cond_next64
72
73 cond_true60: ; preds = %cond_true58
74 %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2]
75 store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
76 %tmp66137 = volatile load i8** %args ; [#uses=1]
77 %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; [#uses=1]
78 ret i8 %tmp73138
79
80 cond_next64: ; preds = %cond_true58
81 %tmp66 = volatile load i8** %args ; [#uses=1]
82 %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; [#uses=1]
83 ret i8 %tmp73
84
85 cond_true111: ; preds = %cond_true111, %bb48
86 %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; [#uses=2]
87 %tmp95 = volatile load i8** %args ; [#uses=2]
88 %tmp97 = getelementptr i8* %tmp95, i32 4 ; [#uses=1]
89 volatile store i8* %tmp97, i8** %args
90 %tmp9899 = bitcast i8* %tmp95 to i32* ; [#uses=1]
91 %tmp100 = load i32* %tmp9899 ; [#uses=1]
92 %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; [#uses=1]
93 store i32 %tmp100, i32* %tmp104
94 %indvar.next = add i32 %idx.2132.0, 1 ; [#uses=2]
95 icmp eq i32 %indvar.next, %tmp78 ; :6 [#uses=1]
96 br i1 %6, label %bb114, label %cond_true111
97
98 bb114: ; preds = %cond_true111, %bb48
99 call void @llvm.va_end( i8* %args4 )
100 %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; [#uses=1]
101 ret i8 %tmp122
102 }
103
104 declare i32 @_fooXRegisterClass(%struct.fooXClass*)
105
106 declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext
107
108 declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
109
110 declare %struct.aa_ss* @sel_registerName(i8*)
111
112 declare void @llvm.va_start(i8*)
113
114 declare i32 @strlen(i8*)
115
116 declare void @llvm.va_end(i8*)
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test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll less more
None ; RUN: llvm-as < %s | llc | not grep r11
1
2 target triple = "thumb-linux-gnueabi"
3 %struct.__sched_param = type { i32 }
4 %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
5 @i.1882 = internal global i32 1 ; [#uses=2]
6 @.str = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1]
7 @.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1]
8
9 define i8* @f(i8* %a) {
10 entry:
11 %tmp1 = load i32* @i.1882 ; [#uses=1]
12 %tmp2 = add i32 %tmp1, 1 ; [#uses=2]
13 store i32 %tmp2, i32* @i.1882
14 %tmp34 = inttoptr i32 %tmp2 to i8* ; [#uses=1]
15 ret i8* %tmp34
16 }
17
18 define i32 @main() {
19 entry:
20 %t = alloca i32, align 4 ; [#uses=4]
21 %ret = alloca i32, align 4 ; [#uses=3]
22 %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0]
23 %tmp2 = load i32* %t ; [#uses=1]
24 %ret3 = bitcast i32* %ret to i8** ; [#uses=2]
25 %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; [#uses=0]
26 %tmp5 = load i32* %ret ; [#uses=1]
27 %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; [#uses=0]
28 %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0]
29 %tmp9 = load i32* %t ; [#uses=1]
30 %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; [#uses=0]
31 %tmp12 = load i32* %ret ; [#uses=1]
32 %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; [#uses=0]
33 ret i32 0
34 }
35
36 declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
37
38 declare i32 @pthread_join(i32, i8**)
39
40 declare i32 @printf(i8*, ...)
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-8
test/CodeGen/ARM/2009-06-18-ThumbCommuteMul.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb | grep r0 | count 1
1
2 define i32 @a(i32 %x, i32 %y) nounwind readnone {
3 entry:
4 %mul = mul i32 %y, %x ; [#uses=1]
5 ret i32 %mul
6 }
7
0 ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
2 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
3 ; RUN: not grep {sub.*r7}
4 ; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
51
62 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
73 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
1919 ; RUN: grep floatsidf %t
2020 ; RUN: grep floatunsisf %t
2121 ; RUN: grep floatunsidf %t
22 ; RUN: llvm-as < %s | llc -march=thumb
2322
2423 define float @f1(double %x) {
2524 entry:
0 ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=thumb
21
32 define double @t(double %x, double %y) nounwind optsize {
43 entry:
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test/CodeGen/ARM/frame_thumb.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \
1 ; RUN: -disable-fp-elim | not grep {r11}
2 ; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \
3 ; RUN: -disable-fp-elim | not grep {r11}
4
5 define i32 @f() {
6 entry:
7 ret i32 10
8 }
0 ; RUN: llvm-as < %s | llc -march=arm -stats |& \
11 ; RUN: grep {3 .*Number of machine instrs printed}
2 ; RUN: llvm-as < %s | llc -march=thumb -stats |& \
3 ; RUN: grep {4 .*Number of machine instrs printed}
42
53 ;; Integer absolute value, should produce something as good as: ARM:
64 ;; add r3, r0, r0, asr #31
75 ;; eor r0, r3, r0, asr #31
8 ;; bx lr
9 ;; Thumb:
10 ;; asr r2, r0, #31
11 ;; add r0, r0, r2
12 ;; eor r0, r2
136 ;; bx lr
147
158 define i32 @test(i32 %a) {
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-43
test/CodeGen/ARM/inlineasm-imm-thumb.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb
1
2 ; Test Thumb-mode "I" constraint, for ADD immediate.
3 define i32 @testI(i32 %x) {
4 %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind
5 ret i32 %y
6 }
7
8 ; Test Thumb-mode "J" constraint, for negated ADD immediates.
9 define void @testJ() {
10 tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind
11 ret void
12 }
13
14 ; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
15 define void @testK() {
16 tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind
17 ret void
18 }
19
20 ; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
21 define i32 @testL(i32 %x) {
22 %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind
23 ret i32 %y
24 }
25
26 ; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
27 define i32 @testM() {
28 %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
29 ret i32 %y
30 }
31
32 ; Test Thumb-mode "N" constraint, for values between 0 and 31.
33 define i32 @testN(i32 %x) {
34 %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind
35 ret i32 %y
36 }
37
38 ; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
39 define void @testO() {
40 tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind
41 ret void
42 }
0 ; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
1 ; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
21
32 define i32 @test1(i32 %X) {
43 entry:
0 ; RUN: llvm-as < %s | llc -march=arm
1 ; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5
21
32 define void @test1() {
43 %tmp = alloca [ 64 x i32 ] , align 4
11 ; RUN: llvm-as < %s | llc -march=arm | grep ldrh | count 1
22 ; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | count 1
33 ; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | count 1
4 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1
5 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1
6 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1
7 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1
84
95 define i32 @test1(i8* %v.pntr.s0.u1) {
106 %tmp.u = load i8* %v.pntr.s0.u1
0 ; RUN: llvm-as < %s | llc -march=arm | not grep mov
1 ; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2
21
32 define i32 @f1() {
43 %buf = alloca [32 x i32], align 4
0 ; RUN: llvm-as < %s | llc -march=arm | grep cmp | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1
21
32
43 define i1 @t1(i64 %x) {
88 ; RUN: grep smull | count 1
99 ; RUN: llvm-as < %s | llc -march=arm | \
1010 ; RUN: grep umull | count 1
11 ; RUN: llvm-as < %s | llc -march=thumb | \
12 ; RUN: grep mvn | count 1
13 ; RUN: llvm-as < %s | llc -march=thumb | \
14 ; RUN: grep adc | count 1
15 ; RUN: llvm-as < %s | llc -march=thumb | \
16 ; RUN: grep sbc | count 1
17 ; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3
1811
1912 define i64 @f1() {
2013 entry:
None ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -march=arm > %t
21 ; RUN: grep rrx %t | count 1
32 ; RUN: grep __ashldi3 %t
0 ; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2
11 ; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2
2 ; RUN: llvm-as < %s | llc -march=thumb | grep mul | count 3
3 ; RUN: llvm-as < %s | llc -march=thumb | grep lsl | count 1
42
53 define i32 @f1(i32 %u) {
64 %tmp = mul i32 %u, %u
55 ; RUN: llvm-as < %s | llc -march=arm | grep movhi | count 1
66 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
77 ; RUN: grep fcpydmi | count 1
8 ; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
9 ; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1
10 ; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3
11 ; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1
12 ; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1
13 ; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1
14 ; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
158
169 define i32 @f1(i32 %a.s) {
1710 entry:
0 ; RUN: llvm-as < %s | llc -march=arm
11 ; RUN: llvm-as < %s | llc -march=arm | grep add | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb
3 ; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1
42
53 define void @f1() {
64 %c = alloca i8, align 1
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test/CodeGen/ARM/thumb-imm.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb | not grep CPI
1
2
3 define i32 @test1() {
4 ret i32 1000
5 }
6
7 define i32 @test2() {
8 ret i32 -256
9 }
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-50
test/CodeGen/ARM/thumb2-add.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #255
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #256
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #257
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4094
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4095
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4096
6 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add
7 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
8
9 define i32 @t2ADDrc_255(i32 %lhs) {
10 %Rd = add i32 %lhs, 255;
11 ret i32 %Rd
12 }
13
14 define i32 @t2ADDrc_256(i32 %lhs) {
15 %Rd = add i32 %lhs, 256;
16 ret i32 %Rd
17 }
18
19 define i32 @t2ADDrc_257(i32 %lhs) {
20 %Rd = add i32 %lhs, 257;
21 ret i32 %Rd
22 }
23
24 define i32 @t2ADDrc_4094(i32 %lhs) {
25 %Rd = add i32 %lhs, 4094;
26 ret i32 %Rd
27 }
28
29 define i32 @t2ADDrc_4095(i32 %lhs) {
30 %Rd = add i32 %lhs, 4095;
31 ret i32 %Rd
32 }
33
34 define i32 @t2ADDrc_4096(i32 %lhs) {
35 %Rd = add i32 %lhs, 4096;
36 ret i32 %Rd
37 }
38
39 define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
40 %Rd = add i32 %lhs, %rhs;
41 ret i32 %Rd
42 }
43
44 define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
45 %tmp = shl i32 %rhs, 8
46 %Rd = add i32 %lhs, %tmp;
47 ret i32 %Rd
48 }
49
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-127
test/CodeGen/ARM/thumb2-mov.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #11206827
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #2868947712
6 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
7 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
8 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
9 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
10 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #2880154539
11 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
12 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
13 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
14 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
15 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #251658240
16 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #3948544
17 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
18 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #258
19 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #4026531840
20
21 ; Test #
22
23 ; var 2.1 - 0x00ab00ab
24 define i32 @t2_const_var2_1_ok_1(i32 %lhs) {
25 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab
26 ret i32 %ret
27 }
28
29 define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
30 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb
31 ret i32 %ret
32 }
33
34 define i32 @t2_const_var2_1_fail_2(i32 %lhs) {
35 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab
36 ret i32 %ret
37 }
38
39 define i32 @t2_const_var2_1_fail_3(i32 %lhs) {
40 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab
41 ret i32 %ret
42 }
43
44 define i32 @t2_const_var2_1_fail_4(i32 %lhs) {
45 %ret = add i32 %lhs, 28027649 ; 0x01abab01
46 ret i32 %ret
47 }
48
49 ; var 2.2 - 0xab00ab00
50 define i32 @t2_const_var2_2_ok_1(i32 %lhs) {
51 %ret = add i32 %lhs, 2868947712 ; 0xab00ab00
52 ret i32 %ret
53 }
54
55 define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
56 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00
57 ret i32 %ret
58 }
59
60 define i32 @t2_const_var2_2_fail_2(i32 %lhs) {
61 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10
62 ret i32 %ret
63 }
64
65 define i32 @t2_const_var2_2_fail_3(i32 %lhs) {
66 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10
67 ret i32 %ret
68 }
69
70 define i32 @t2_const_var2_2_fail_4(i32 %lhs) {
71 %ret = add i32 %lhs, 279685904 ; 0x10abab10
72 ret i32 %ret
73 }
74
75 ; var 2.3 - 0xabababab
76 define i32 @t2_const_var2_3_ok_1(i32 %lhs) {
77 %ret = add i32 %lhs, 2880154539 ; 0xabababab
78 ret i32 %ret
79 }
80
81 define i32 @t2_const_var2_3_fail_1(i32 %lhs) {
82 %ret = add i32 %lhs, 2880154554 ; 0xabababba
83 ret i32 %ret
84 }
85
86 define i32 @t2_const_var2_3_fail_2(i32 %lhs) {
87 %ret = add i32 %lhs, 2880158379 ; 0xababbaab
88 ret i32 %ret
89 }
90
91 define i32 @t2_const_var2_3_fail_3(i32 %lhs) {
92 %ret = add i32 %lhs, 2881137579 ; 0xabbaabab
93 ret i32 %ret
94 }
95
96 define i32 @t2_const_var2_3_fail_4(i32 %lhs) {
97 %ret = add i32 %lhs, 3131812779 ; 0xbaababab
98 ret i32 %ret
99 }
100
101 ; var 3 - 0x0F000000
102 define i32 @t2_const_var3_1_ok_1(i32 %lhs) {
103 %ret = add i32 %lhs, 251658240 ; 0x0F000000
104 ret i32 %ret
105 }
106
107 define i32 @t2_const_var3_2_ok_1(i32 %lhs) {
108 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000
109 ret i32 %ret
110 }
111
112 define i32 @t2_const_var3_2_fail_1(i32 %lhs) {
113 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
114 ret i32 %ret
115 }
116
117 define i32 @t2_const_var3_3_ok_1(i32 %lhs) {
118 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010
119 ret i32 %ret
120 }
121
122 define i32 @t2_const_var3_4_ok_1(i32 %lhs) {
123 %ret = add i32 %lhs, 4026531840 ; 0xF0000000
124 ret i32 %ret
125 }
126
+0
-65
test/CodeGen/ARM/thumb2-mov2.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
5
6 define i32 @t2MOVTi16_ok_1(i32 %a) {
7 %1 = and i32 %a, 65535
8 %2 = shl i32 1234, 16
9 %3 = or i32 %1, %2
10
11 ret i32 %3
12 }
13
14 define i32 @t2MOVTi16_test_1(i32 %a) {
15 %1 = shl i32 255, 8
16 %2 = shl i32 1234, 8
17 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
18 %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4
19 %5 = and i32 %a, %3
20 %6 = or i32 %4, %5
21
22 ret i32 %6
23 }
24
25 define i32 @t2MOVTi16_test_2(i32 %a) {
26 %1 = shl i32 255, 8
27 %2 = shl i32 1234, 8
28 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
29 %4 = shl i32 %2, 6
30 %5 = and i32 %a, %3
31 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
32 %7 = or i32 %5, %6
33
34 ret i32 %7
35 }
36
37 define i32 @t2MOVTi16_test_3(i32 %a) {
38 %1 = shl i32 255, 8
39 %2 = shl i32 1234, 8
40 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
41 %4 = shl i32 %2, 6
42 %5 = and i32 %a, %3
43 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
44 %7 = lshr i32 %6, 6
45 %8 = shl i32 %7, 6
46 %9 = or i32 %5, %8
47
48 ret i32 %9
49 }
50
51 define i32 @t2MOVTi16_test_nomatch_1(i32 %a) {
52 %1 = shl i32 255, 8
53 %2 = shl i32 1234, 8
54 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
55 %4 = shl i32 %2, 6
56 %5 = and i32 %a, %3
57 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
58 %7 = lshr i32 %6, 3
59 %8 = or i32 %5, %7
60
61 ret i32 %8
62 }
63
64
+0
-40
test/CodeGen/ARM/thumb2-shifter.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsl
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep asr
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ror
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mov
5
6 define i32 @t2ADDrs_lsl(i32 %X, i32 %Y) {
7 %A = shl i32 %Y, 16
8 %B = add i32 %X, %A
9 ret i32 %B
10 }
11
12 define i32 @t2ADDrs_lsr(i32 %X, i32 %Y) {
13 %A = lshr i32 %Y, 16
14 %B = add i32 %X, %A
15 ret i32 %B
16 }
17
18 define i32 @t2ADDrs_asr(i32 %X, i32 %Y) {
19 %A = ashr i32 %Y, 16
20 %B = add i32 %X, %A
21 ret i32 %B
22 }
23
24 ; i32 ror(n) = (x >> n) | (x << (32 - n))
25 define i32 @t2ADDrs_ror(i32 %X, i32 %Y) {
26 %A = lshr i32 %Y, 16
27 %B = shl i32 %Y, 16
28 %C = or i32 %B, %A
29 %R = add i32 %X, %C
30 ret i32 %R
31 }
32
33 define i32 @t2ADDrs_noRegShift(i32 %X, i32 %Y, i8 %sh) {
34 %shift.upgrd.1 = zext i8 %sh to i32
35 %A = shl i32 %Y, %shift.upgrd.1
36 %B = add i32 %X, %A
37 ret i32 %B
38 }
39
0 ; RUN: llvm-as < %s | llc -march=arm | grep tst
11 ; RUN: llvm-as < %s | llc -march=arm | grep teq
2 ; RUN: llvm-as < %s | llc -march=thumb | grep tst
32
43 define i32 @f(i32 %a) {
54 entry:
0 ; RUN: llvm-as < %s | llc -march=arm | grep movne | count 1
11 ; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1
3 ; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
42
53 define i32 @f1(float %X, float %Y) {
64 %tmp = fcmp uno float %X, %Y
+0
-36
test/CodeGen/ARM/vargs2.ll less more
None ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -mtriple=arm-linux -march=thumb | grep pop | count 1
2 ; RUN: llvm-as < %s | llc -mtriple=arm-darwin -march=thumb | grep pop | count 2
3
4 @str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
5
6 define void @f(i32 %a, ...) {
7 entry:
8 %va = alloca i8*, align 4 ; [#uses=4]
9 %va.upgrd.1 = bitcast i8** %va to i8* ; [#uses=1]
10 call void @llvm.va_start( i8* %va.upgrd.1 )
11 br label %bb
12
13 bb: ; preds = %bb, %entry
14 %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; [#uses=2]
15 %tmp = volatile load i8** %va ; [#uses=2]
16 %tmp2 = getelementptr i8* %tmp, i32 4 ; [#uses=1]
17 volatile store i8* %tmp2, i8** %va
18 %tmp5 = add i32 %a_addr.0, -1 ; [#uses=1]
19 %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; [#uses=1]
20 br i1 %tmp.upgrd.2, label %bb7, label %bb
21
22 bb7: ; preds = %bb
23 %tmp3 = bitcast i8* %tmp to i32* ; [#uses=1]
24 %tmp.upgrd.3 = load i32* %tmp3 ; [#uses=1]
25 %tmp10 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 ) ; [#uses=0]
26 %va.upgrd.4 = bitcast i8** %va to i8* ; [#uses=1]
27 call void @llvm.va_end( i8* %va.upgrd.4 )
28 ret void
29 }
30
31 declare void @llvm.va_start(i8*)
32
33 declare i32 @printf(i8*, ...)
34
35 declare void @llvm.va_end(i8*)
0 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
1
2 %struct.rtx_def = type { i8 }
3 @str = external global [7 x i8]
4
5 define void @f1() {
6 %D = alloca %struct.rtx_def, align 1
7 %tmp1 = bitcast %struct.rtx_def* %D to i32*
8 %tmp7 = load i32* %tmp1
9 %tmp14 = lshr i32 %tmp7, 1
10 %tmp1415 = and i32 %tmp14, 1
11 call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
12 ret void
13 }
14
15 declare void @printf(i32, ...)
0 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
1
2 %struct.color_sample = type { i32 }
3 %struct.ref = type { %struct.color_sample, i16, i16 }
4
5 define void @zcvrs() {
6 br i1 false, label %bb22, label %UnifiedReturnBlock
7
8 bb22:
9 br i1 false, label %bb64, label %UnifiedReturnBlock
10
11 bb64:
12 %tmp67 = urem i32 0, 0
13 %tmp69 = icmp slt i32 %tmp67, 10
14 %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55
15 %tmp75 = add i8 %iftmp.13.0, 0
16 store i8 %tmp75, i8* null
17 %tmp81 = udiv i32 0, 0
18 %tmp83 = icmp eq i32 %tmp81, 0
19 br i1 %tmp83, label %bb85, label %bb64
20
21 bb85:
22 ret void
23
24 UnifiedReturnBlock:
25 ret void
26 }
0 ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \
2 ; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
3
4 %struct.__fooAllocator = type opaque
5 %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
6 %struct.__fooZ = type opaque
7 %struct.__fooU = type opaque
8 %struct.__fooString = type opaque
9 %struct.__fooV = type opaque
10 %struct.fooXBase = type { i32, [4 x i8] }
11 %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
12 %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
13 %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
14 %struct.aa_ivar = type { i8*, i8*, i32 }
15 %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
16 %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
17 %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
18 %struct.aa_object = type { %struct.aa_class* }
19 %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
20 %struct.aa_ss = type opaque
21 @__kfooYTypeID = external global i32 ; [#uses=3]
22 @__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1]
23 @__fooXClassTableSize = external global i32 ; [#uses=1]
24 @__fooXAaClassTable = external global i32* ; [#uses=1]
25 @s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2]
26 @str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
27
28
29 define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext {
30 entry:
31 %args = alloca i8*, align 4 ; [#uses=5]
32 %args4 = bitcast i8** %args to i8* ; [#uses=2]
33 call void @llvm.va_start( i8* %args4 )
34 %tmp6 = load i32* @__kfooYTypeID ; [#uses=1]
35 icmp eq i32 %tmp6, 0 ; :0 [#uses=1]
36 br i1 %0, label %cond_true, label %cond_next
37
38 cond_true: ; preds = %entry
39 %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; [#uses=1]
40 store i32 %tmp7, i32* @__kfooYTypeID
41 br label %cond_next
42
43 cond_next: ; preds = %cond_true, %entry
44 %tmp8 = load i32* @__kfooYTypeID ; [#uses=2]
45 %tmp15 = load i32* @__fooXClassTableSize ; [#uses=1]
46 icmp ugt i32 %tmp15, %tmp8 ; :1 [#uses=1]
47 br i1 %1, label %cond_next18, label %cond_true58
48
49 cond_next18: ; preds = %cond_next
50 %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; [#uses=1]
51 %tmp22 = load i32* %tmp21 ; [#uses=2]
52 %tmp29 = load i32** @__fooXAaClassTable ; [#uses=1]
53 %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; [#uses=1]
54 %tmp32 = load i32* %tmp31 ; [#uses=1]
55 icmp eq i32 %tmp22, %tmp32 ; :2 [#uses=1]
56 %.not = xor i1 %2, true ; [#uses=1]
57 icmp ugt i32 %tmp22, 4095 ; :3 [#uses=1]
58 %bothcond = and i1 %.not, %3 ; [#uses=1]
59 br i1 %bothcond, label %cond_true58, label %bb48
60
61 bb48: ; preds = %cond_next18
62 %tmp78 = call i32 @strlen( i8* %componentDesc ) ; [#uses=4]
63 %tmp92 = alloca i32, i32 %tmp78 ; [#uses=2]
64 icmp sgt i32 %tmp78, 0 ; :4 [#uses=1]
65 br i1 %4, label %cond_true111, label %bb114
66
67 cond_true58: ; preds = %cond_next18, %cond_next
68 %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2]
69 icmp eq %struct.aa_ss* %tmp59, null ; :5 [#uses=1]
70 %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; [#uses=2]
71 br i1 %5, label %cond_true60, label %cond_next64
72
73 cond_true60: ; preds = %cond_true58
74 %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2]
75 store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
76 %tmp66137 = volatile load i8** %args ; [#uses=1]
77 %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; [#uses=1]
78 ret i8 %tmp73138
79
80 cond_next64: ; preds = %cond_true58
81 %tmp66 = volatile load i8** %args ; [#uses=1]
82 %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; [#uses=1]
83 ret i8 %tmp73
84
85 cond_true111: ; preds = %cond_true111, %bb48
86 %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; [#uses=2]
87 %tmp95 = volatile load i8** %args ; [#uses=2]
88 %tmp97 = getelementptr i8* %tmp95, i32 4 ; [#uses=1]
89 volatile store i8* %tmp97, i8** %args
90 %tmp9899 = bitcast i8* %tmp95 to i32* ; [#uses=1]
91 %tmp100 = load i32* %tmp9899 ; [#uses=1]
92 %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; [#uses=1]
93 store i32 %tmp100, i32* %tmp104
94 %indvar.next = add i32 %idx.2132.0, 1 ; [#uses=2]
95 icmp eq i32 %indvar.next, %tmp78 ; :6 [#uses=1]
96 br i1 %6, label %bb114, label %cond_true111
97
98 bb114: ; preds = %cond_true111, %bb48
99 call void @llvm.va_end( i8* %args4 )
100 %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; [#uses=1]
101 ret i8 %tmp122
102 }
103
104 declare i32 @_fooXRegisterClass(%struct.fooXClass*)
105
106 declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext
107
108 declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
109
110 declare %struct.aa_ss* @sel_registerName(i8*)
111
112 declare void @llvm.va_start(i8*)
113
114 declare i32 @strlen(i8*)
115
116 declare void @llvm.va_end(i8*)
0 ; RUN: llvm-as < %s | llc | not grep r11
1
2 target triple = "thumb-linux-gnueabi"
3 %struct.__sched_param = type { i32 }
4 %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
5 @i.1882 = internal global i32 1 ; [#uses=2]
6 @.str = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1]
7 @.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1]
8
9 define i8* @f(i8* %a) {
10 entry:
11 %tmp1 = load i32* @i.1882 ; [#uses=1]
12 %tmp2 = add i32 %tmp1, 1 ; [#uses=2]
13 store i32 %tmp2, i32* @i.1882
14 %tmp34 = inttoptr i32 %tmp2 to i8* ; [#uses=1]
15 ret i8* %tmp34
16 }
17
18 define i32 @main() {
19 entry:
20 %t = alloca i32, align 4 ; [#uses=4]
21 %ret = alloca i32, align 4 ; [#uses=3]
22 %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0]
23 %tmp2 = load i32* %t ; [#uses=1]
24 %ret3 = bitcast i32* %ret to i8** ; [#uses=2]
25 %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; [#uses=0]
26 %tmp5 = load i32* %ret ; [#uses=1]
27 %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; [#uses=0]
28 %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0]
29 %tmp9 = load i32* %t ; [#uses=1]
30 %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; [#uses=0]
31 %tmp12 = load i32* %ret ; [#uses=1]
32 %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; [#uses=0]
33 ret i32 0
34 }
35
36 declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
37
38 declare i32 @pthread_join(i32, i8**)
39
40 declare i32 @printf(i8*, ...)
0 ; RUN: llvm-as < %s | llc -march=thumb | grep r0 | count 1
1
2 define i32 @a(i32 %x, i32 %y) nounwind readnone {
3 entry:
4 %mul = mul i32 %y, %x ; [#uses=1]
5 ret i32 %mul
6 }
7
0 ; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
1 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
2 ; RUN: not grep {sub.*r7}
3 ; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
4
5 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
6 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
7
8 define void @t1(%struct.state* %v) {
9 %tmp6 = load i32* null
10 %tmp8 = alloca float, i32 %tmp6
11 store i32 1, i32* null
12 br i1 false, label %bb123.preheader, label %return
13
14 bb123.preheader:
15 br i1 false, label %bb43, label %return
16
17 bb43:
18 call fastcc void @f1( float* %tmp8, float* null, i32 0 )
19 %tmp70 = load i32* null
20 %tmp85 = getelementptr float* %tmp8, i32 0
21 call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
22 ret void
23
24 return:
25 ret void
26 }
27
28 declare fastcc void @f1(float*, float*, i32)
29
30 declare fastcc void @f2(float*, float*, float*, i32)
31
32 %struct.comment = type { i8**, i32*, i32, i8* }
33 @str215 = external global [2 x i8]
34
35 define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
36 %tmp1 = call i32 @strlen( i8* %tag )
37 %tmp3 = call i32 @strlen( i8* %contents )
38 %tmp4 = add i32 %tmp1, 2
39 %tmp5 = add i32 %tmp4, %tmp3
40 %tmp6 = alloca i8, i32 %tmp5
41 %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
42 %tmp6.len = call i32 @strlen( i8* %tmp6 )
43 %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
44 call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
45 %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
46 call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
47 ret void
48 }
49
50 declare i32 @strlen(i8*)
51
52 declare i8* @strcat(i8*, i8*)
53
54 declare fastcc void @comment_add(%struct.comment*, i8*)
55
56 declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
57
58 declare i8* @strcpy(i8*, i8*)
0 ; RUN: llvm-as < %s | llc -march=thumb
1
2 define float @f1(double %x) {
3 entry:
4 %tmp1 = fptrunc double %x to float ; [#uses=1]
5 ret float %tmp1
6 }
7
8 define double @f2(float %x) {
9 entry:
10 %tmp1 = fpext float %x to double ; [#uses=1]
11 ret double %tmp1
12 }
13
14 define i32 @f3(float %x) {
15 entry:
16 %tmp = fptosi float %x to i32 ; [#uses=1]
17 ret i32 %tmp
18 }
19
20 define i32 @f4(float %x) {
21 entry:
22 %tmp = fptoui float %x to i32 ; [#uses=1]
23 ret i32 %tmp
24 }
25
26 define i32 @f5(double %x) {
27 entry:
28 %tmp = fptosi double %x to i32 ; [#uses=1]
29 ret i32 %tmp
30 }
31
32 define i32 @f6(double %x) {
33 entry:
34 %tmp = fptoui double %x to i32 ; [#uses=1]
35 ret i32 %tmp
36 }
37
38 define float @f7(i32 %a) {
39 entry:
40 %tmp = sitofp i32 %a to float ; [#uses=1]
41 ret float %tmp
42 }
43
44 define double @f8(i32 %a) {
45 entry:
46 %tmp = sitofp i32 %a to double ; [#uses=1]
47 ret double %tmp
48 }
49
50 define float @f9(i32 %a) {
51 entry:
52 %tmp = uitofp i32 %a to float ; [#uses=1]
53 ret float %tmp
54 }
55
56 define double @f10(i32 %a) {
57 entry:
58 %tmp = uitofp i32 %a to double ; [#uses=1]
59 ret double %tmp
60 }
0 ; RUN: llvm-as < %s | llc -march=thumb
1
2 define double @t(double %x, double %y) nounwind optsize {
3 entry:
4 %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; [#uses=1]
5 ret double %0
6 }
7
8 declare double @llvm.pow.f64(double, double) nounwind readonly
0 ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin \
1 ; RUN: -disable-fp-elim | not grep {r11}
2 ; RUN: llvm-as < %s | llc -mtriple=thumb-linux-gnueabi \
3 ; RUN: -disable-fp-elim | not grep {r11}
4
5 define i32 @f() {
6 entry:
7 ret i32 10
8 }
0 ; RUN: llvm-as < %s | llc -march=thumb -stats |& \
1 ; RUN: grep {4 .*Number of machine instrs printed}
2
3 ;; Integer absolute value, should produce something as good as:
4 ;; Thumb:
5 ;; asr r2, r0, #31
6 ;; add r0, r0, r2
7 ;; eor r0, r2
8 ;; bx lr
9
10 define i32 @test(i32 %a) {
11 %tmp1neg = sub i32 0, %a
12 %b = icmp sgt i32 %a, -1
13 %abs = select i1 %b, i32 %a, i32 %tmp1neg
14 ret i32 %abs
15 }
16
0 ; RUN: llvm-as < %s | llc -march=thumb
1
2 ; Test Thumb-mode "I" constraint, for ADD immediate.
3 define i32 @testI(i32 %x) {
4 %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind
5 ret i32 %y
6 }
7
8 ; Test Thumb-mode "J" constraint, for negated ADD immediates.
9 define void @testJ() {
10 tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind
11 ret void
12 }
13
14 ; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
15 define void @testK() {
16 tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind
17 ret void
18 }
19
20 ; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
21 define i32 @testL(i32 %x) {
22 %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind
23 ret i32 %y
24 }
25
26 ; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
27 define i32 @testM() {
28 %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
29 ret i32 %y
30 }
31
32 ; Test Thumb-mode "N" constraint, for values between 0 and 31.
33 define i32 @testN(i32 %x) {
34 %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind
35 ret i32 %y
36 }
37
38 ; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
39 define void @testO() {
40 tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind
41 ret void
42 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
1
2 define i32 @test1(i32 %X) {
3 entry:
4 icmp slt i32 %X, 0 ; :0 [#uses=1]
5 zext i1 %0 to i32 ; :1 [#uses=1]
6 ret i32 %1
7 }
8
0 ; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5
1
2 define void @test1() {
3 %tmp = alloca [ 64 x i32 ] , align 4
4 ret void
5 }
6
7 define void @test2() {
8 %tmp = alloca [ 4168 x i8 ] , align 4
9 ret void
10 }
11
12 define i32 @test3() {
13 %retval = alloca i32, align 4
14 %tmp = alloca i32, align 4
15 %a = alloca [805306369 x i8], align 16
16 store i32 0, i32* %tmp
17 %tmp1 = load i32* %tmp
18 ret i32 %tmp1
19 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1
3 ; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1
4
5 define i32 @test1(i8* %v.pntr.s0.u1) {
6 %tmp.u = load i8* %v.pntr.s0.u1
7 %tmp1.s = zext i8 %tmp.u to i32
8 ret i32 %tmp1.s
9 }
10
11 define i32 @test2(i16* %v.pntr.s0.u1) {
12 %tmp.u = load i16* %v.pntr.s0.u1
13 %tmp1.s = zext i16 %tmp.u to i32
14 ret i32 %tmp1.s
15 }
16
17 define i32 @test3(i8* %v.pntr.s1.u0) {
18 %tmp.s = load i8* %v.pntr.s1.u0
19 %tmp1.s = sext i8 %tmp.s to i32
20 ret i32 %tmp1.s
21 }
22
23 define i32 @test4() {
24 %tmp.s = load i16* null
25 %tmp1.s = sext i16 %tmp.s to i32
26 ret i32 %tmp1.s
27 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2
1
2 define i32 @f1() {
3 %buf = alloca [32 x i32], align 4
4 %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
5 %tmp1 = load i32* %tmp
6 ret i32 %tmp1
7 }
8
9 define i32 @f2() {
10 %buf = alloca [32 x i8], align 4
11 %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
12 %tmp1 = load i8* %tmp
13 %tmp2 = zext i8 %tmp1 to i32
14 ret i32 %tmp2
15 }
16
17 define i32 @f3() {
18 %buf = alloca [32 x i32], align 4
19 %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
20 %tmp1 = load i32* %tmp
21 ret i32 %tmp1
22 }
23
24 define i32 @f4() {
25 %buf = alloca [32 x i8], align 4
26 %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
27 %tmp1 = load i8* %tmp
28 %tmp2 = zext i8 %tmp1 to i32
29 ret i32 %tmp2
30 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1
1
2
3 define i1 @t1(i64 %x) {
4 %B = icmp slt i64 %x, 0
5 ret i1 %B
6 }
7
8 define i1 @t2(i64 %x) {
9 %tmp = icmp ult i64 %x, 4294967296
10 ret i1 %tmp
11 }
12
13 define i1 @t3(i32 %x) {
14 %tmp = icmp ugt i32 %x, -1
15 ret i1 %tmp
16 }
0 ; RUN: llvm-as < %s | llc -march=thumb | \
1 ; RUN: grep mvn | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb | \
3 ; RUN: grep adc | count 1
4 ; RUN: llvm-as < %s | llc -march=thumb | \
5 ; RUN: grep sbc | count 1
6 ; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3
7
8 define i64 @f1() {
9 entry:
10 ret i64 0
11 }
12
13 define i64 @f2() {
14 entry:
15 ret i64 1
16 }
17
18 define i64 @f3() {
19 entry:
20 ret i64 2147483647
21 }
22
23 define i64 @f4() {
24 entry:
25 ret i64 2147483648
26 }
27
28 define i64 @f5() {
29 entry:
30 ret i64 9223372036854775807
31 }
32
33 define i64 @f6(i64 %x, i64 %y) {
34 entry:
35 %tmp1 = add i64 %y, 1 ; [#uses=1]
36 ret i64 %tmp1
37 }
38
39 define void @f7() {
40 entry:
41 %tmp = call i64 @f8( ) ; [#uses=0]
42 ret void
43 }
44
45 declare i64 @f8()
46
47 define i64 @f9(i64 %a, i64 %b) {
48 entry:
49 %tmp = sub i64 %a, %b ; [#uses=1]
50 ret i64 %tmp
51 }
52
53 define i64 @f(i32 %a, i32 %b) {
54 entry:
55 %tmp = sext i32 %a to i64 ; [#uses=1]
56 %tmp1 = sext i32 %b to i64 ; [#uses=1]
57 %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1]
58 ret i64 %tmp2
59 }
60
61 define i64 @g(i32 %a, i32 %b) {
62 entry:
63 %tmp = zext i32 %a to i64 ; [#uses=1]
64 %tmp1 = zext i32 %b to i64 ; [#uses=1]
65 %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1]
66 ret i64 %tmp2
67 }
68
69 define i64 @f10() {
70 entry:
71 %a = alloca i64, align 8 ; [#uses=1]
72 %retval = load i64* %a ; [#uses=1]
73 ret i64 %retval
74 }
75
0 ; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3
3 ; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1
4 ; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1
5 ; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1
6 ; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
7
8 define i32 @f1(i32 %a.s) {
9 entry:
10 %tmp = icmp eq i32 %a.s, 4
11 %tmp1.s = select i1 %tmp, i32 2, i32 3
12 ret i32 %tmp1.s
13 }
14
15 define i32 @f2(i32 %a.s) {
16 entry:
17 %tmp = icmp sgt i32 %a.s, 4
18 %tmp1.s = select i1 %tmp, i32 2, i32 3
19 ret i32 %tmp1.s
20 }
21
22 define i32 @f3(i32 %a.s, i32 %b.s) {
23 entry:
24 %tmp = icmp slt i32 %a.s, %b.s
25 %tmp1.s = select i1 %tmp, i32 2, i32 3
26 ret i32 %tmp1.s
27 }
28
29 define i32 @f4(i32 %a.s, i32 %b.s) {
30 entry:
31 %tmp = icmp sle i32 %a.s, %b.s
32 %tmp1.s = select i1 %tmp, i32 2, i32 3
33 ret i32 %tmp1.s
34 }
35
36 define i32 @f5(i32 %a.u, i32 %b.u) {
37 entry:
38 %tmp = icmp ule i32 %a.u, %b.u
39 %tmp1.s = select i1 %tmp, i32 2, i32 3
40 ret i32 %tmp1.s
41 }
42
43 define i32 @f6(i32 %a.u, i32 %b.u) {
44 entry:
45 %tmp = icmp ugt i32 %a.u, %b.u
46 %tmp1.s = select i1 %tmp, i32 2, i32 3
47 ret i32 %tmp1.s
48 }
49
50 define double @f7(double %a, double %b) {
51 %tmp = fcmp olt double %a, 1.234e+00
52 %tmp1 = select i1 %tmp, double -1.000e+00, double %b
53 ret double %tmp1
54 }
0 ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1
2
3 define void @f1() {
4 %c = alloca i8, align 1
5 ret void
6 }
7
8 define i32 @f2() {
9 ret i32 1
10 }
11
12
0 ; RUN: llvm-as < %s | llc -march=thumb | not grep CPI
1
2
3 define i32 @test1() {
4 ret i32 1000
5 }
6
7 define i32 @test2() {
8 ret i32 -256
9 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep tst
1
2 define i32 @f(i32 %a) {
3 entry:
4 %tmp2 = and i32 %a, 255 ; [#uses=1]
5 icmp eq i32 %tmp2, 0 ; :0 [#uses=1]
6 %retval = select i1 %0, i32 20, i32 10 ; [#uses=1]
7 ret i32 %retval
8 }
9
10 define i32 @g(i32 %a) {
11 entry:
12 %tmp2 = xor i32 %a, 255
13 icmp eq i32 %tmp2, 0 ; :0 [#uses=1]
14 %retval = select i1 %0, i32 20, i32 10 ; [#uses=1]
15 ret i32 %retval
16 }
0 ; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
2
3 define i32 @f1(float %X, float %Y) {
4 %tmp = fcmp uno float %X, %Y
5 %retval = select i1 %tmp, i32 1, i32 -1
6 ret i32 %retval
7 }
8
9 define i32 @f2(float %X, float %Y) {
10 %tmp = fcmp ord float %X, %Y
11 %retval = select i1 %tmp, i32 1, i32 -1
12 ret i32 %retval
13 }
0 ; RUN: llvm-as < %s | llc -march=thumb
1 ; RUN: llvm-as < %s | llc -mtriple=thumb-linux | grep pop | count 1
2 ; RUN: llvm-as < %s | llc -mtriple=thumb-darwin | grep pop | count 2
3
4 @str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
5
6 define void @f(i32 %a, ...) {
7 entry:
8 %va = alloca i8*, align 4 ; [#uses=4]
9 %va.upgrd.1 = bitcast i8** %va to i8* ; [#uses=1]
10 call void @llvm.va_start( i8* %va.upgrd.1 )
11 br label %bb
12
13 bb: ; preds = %bb, %entry
14 %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; [#uses=2]
15 %tmp = volatile load i8** %va ; [#uses=2]
16 %tmp2 = getelementptr i8* %tmp, i32 4 ; [#uses=1]
17 volatile store i8* %tmp2, i8** %va
18 %tmp5 = add i32 %a_addr.0, -1 ; [#uses=1]
19 %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; [#uses=1]
20 br i1 %tmp.upgrd.2, label %bb7, label %bb
21
22 bb7: ; preds = %bb
23 %tmp3 = bitcast i8* %tmp to i32* ; [#uses=1]
24 %tmp.upgrd.3 = load i32* %tmp3 ; [#uses=1]
25 %tmp10 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 ) ; [#uses=0]
26 %va.upgrd.4 = bitcast i8** %va to i8* ; [#uses=1]
27 call void @llvm.va_end( i8* %va.upgrd.4 )
28 ret void
29 }
30
31 declare void @llvm.va_start(i8*)
32
33 declare i32 @printf(i8*, ...)
34
35 declare void @llvm.va_end(i8*)
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #255
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #256
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #257
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4094
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4095
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep #4096
6 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add
7 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
8
9 define i32 @t2ADDrc_255(i32 %lhs) {
10 %Rd = add i32 %lhs, 255;
11 ret i32 %Rd
12 }
13
14 define i32 @t2ADDrc_256(i32 %lhs) {
15 %Rd = add i32 %lhs, 256;
16 ret i32 %Rd
17 }
18
19 define i32 @t2ADDrc_257(i32 %lhs) {
20 %Rd = add i32 %lhs, 257;
21 ret i32 %Rd
22 }
23
24 define i32 @t2ADDrc_4094(i32 %lhs) {
25 %Rd = add i32 %lhs, 4094;
26 ret i32 %Rd
27 }
28
29 define i32 @t2ADDrc_4095(i32 %lhs) {
30 %Rd = add i32 %lhs, 4095;
31 ret i32 %Rd
32 }
33
34 define i32 @t2ADDrc_4096(i32 %lhs) {
35 %Rd = add i32 %lhs, 4096;
36 ret i32 %Rd
37 }
38
39 define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
40 %Rd = add i32 %lhs, %rhs;
41 ret i32 %Rd
42 }
43
44 define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
45 %tmp = shl i32 %rhs, 8
46 %Rd = add i32 %lhs, %tmp;
47 ret i32 %Rd
48 }
49
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #11206827
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #2868947712
6 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
7 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
8 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
9 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
10 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #2880154539
11 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
12 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
13 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
14 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
15 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #251658240
16 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #3948544
17 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
18 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #258
19 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep #4026531840
20
21 ; Test #
22
23 ; var 2.1 - 0x00ab00ab
24 define i32 @t2_const_var2_1_ok_1(i32 %lhs) {
25 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab
26 ret i32 %ret
27 }
28
29 define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
30 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb
31 ret i32 %ret
32 }
33
34 define i32 @t2_const_var2_1_fail_2(i32 %lhs) {
35 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab
36 ret i32 %ret
37 }
38
39 define i32 @t2_const_var2_1_fail_3(i32 %lhs) {
40 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab
41 ret i32 %ret
42 }
43
44 define i32 @t2_const_var2_1_fail_4(i32 %lhs) {
45 %ret = add i32 %lhs, 28027649 ; 0x01abab01
46 ret i32 %ret
47 }
48
49 ; var 2.2 - 0xab00ab00
50 define i32 @t2_const_var2_2_ok_1(i32 %lhs) {
51 %ret = add i32 %lhs, 2868947712 ; 0xab00ab00
52 ret i32 %ret
53 }
54
55 define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
56 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00
57 ret i32 %ret
58 }
59
60 define i32 @t2_const_var2_2_fail_2(i32 %lhs) {
61 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10
62 ret i32 %ret
63 }
64
65 define i32 @t2_const_var2_2_fail_3(i32 %lhs) {
66 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10
67 ret i32 %ret
68 }
69
70 define i32 @t2_const_var2_2_fail_4(i32 %lhs) {
71 %ret = add i32 %lhs, 279685904 ; 0x10abab10
72 ret i32 %ret
73 }
74
75 ; var 2.3 - 0xabababab
76 define i32 @t2_const_var2_3_ok_1(i32 %lhs) {
77 %ret = add i32 %lhs, 2880154539 ; 0xabababab
78 ret i32 %ret
79 }
80
81 define i32 @t2_const_var2_3_fail_1(i32 %lhs) {
82 %ret = add i32 %lhs, 2880154554 ; 0xabababba
83 ret i32 %ret
84 }
85
86 define i32 @t2_const_var2_3_fail_2(i32 %lhs) {
87 %ret = add i32 %lhs, 2880158379 ; 0xababbaab
88 ret i32 %ret
89 }
90
91 define i32 @t2_const_var2_3_fail_3(i32 %lhs) {
92 %ret = add i32 %lhs, 2881137579 ; 0xabbaabab
93 ret i32 %ret
94 }
95
96 define i32 @t2_const_var2_3_fail_4(i32 %lhs) {
97 %ret = add i32 %lhs, 3131812779 ; 0xbaababab
98 ret i32 %ret
99 }
100
101 ; var 3 - 0x0F000000
102 define i32 @t2_const_var3_1_ok_1(i32 %lhs) {
103 %ret = add i32 %lhs, 251658240 ; 0x0F000000
104 ret i32 %ret
105 }
106
107 define i32 @t2_const_var3_2_ok_1(i32 %lhs) {
108 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000
109 ret i32 %ret
110 }
111
112 define i32 @t2_const_var3_2_fail_1(i32 %lhs) {
113 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
114 ret i32 %ret
115 }
116
117 define i32 @t2_const_var3_3_ok_1(i32 %lhs) {
118 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010
119 ret i32 %ret
120 }
121
122 define i32 @t2_const_var3_4_ok_1(i32 %lhs) {
123 %ret = add i32 %lhs, 4026531840 ; 0xF0000000
124 ret i32 %ret
125 }
126
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movt | grep #1234
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep movt
5
6 define i32 @t2MOVTi16_ok_1(i32 %a) {
7 %1 = and i32 %a, 65535
8 %2 = shl i32 1234, 16
9 %3 = or i32 %1, %2
10
11 ret i32 %3
12 }
13
14 define i32 @t2MOVTi16_test_1(i32 %a) {
15 %1 = shl i32 255, 8
16 %2 = shl i32 1234, 8
17 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
18 %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4
19 %5 = and i32 %a, %3
20 %6 = or i32 %4, %5
21
22 ret i32 %6
23 }
24
25 define i32 @t2MOVTi16_test_2(i32 %a) {
26 %1 = shl i32 255, 8
27 %2 = shl i32 1234, 8
28 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
29 %4 = shl i32 %2, 6
30 %5 = and i32 %a, %3
31 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
32 %7 = or i32 %5, %6
33
34 ret i32 %7
35 }
36
37 define i32 @t2MOVTi16_test_3(i32 %a) {
38 %1 = shl i32 255, 8
39 %2 = shl i32 1234, 8
40 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
41 %4 = shl i32 %2, 6
42 %5 = and i32 %a, %3
43 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
44 %7 = lshr i32 %6, 6
45 %8 = shl i32 %7, 6
46 %9 = or i32 %5, %8
47
48 ret i32 %9
49 }
50
51 define i32 @t2MOVTi16_test_nomatch_1(i32 %a) {
52 %1 = shl i32 255, 8
53 %2 = shl i32 1234, 8
54 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3
55 %4 = shl i32 %2, 6
56 %5 = and i32 %a, %3
57 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
58 %7 = lshr i32 %6, 3
59 %8 = or i32 %5, %7
60
61 ret i32 %8
62 }
63
64
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsl
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep asr
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ror
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mov
5
6 define i32 @t2ADDrs_lsl(i32 %X, i32 %Y) {
7 %A = shl i32 %Y, 16
8 %B = add i32 %X, %A
9 ret i32 %B
10 }
11
12 define i32 @t2ADDrs_lsr(i32 %X, i32 %Y) {
13 %A = lshr i32 %Y, 16
14 %B = add i32 %X, %A
15 ret i32 %B
16 }
17
18 define i32 @t2ADDrs_asr(i32 %X, i32 %Y) {
19 %A = ashr i32 %Y, 16
20 %B = add i32 %X, %A
21 ret i32 %B
22 }
23
24 ; i32 ror(n) = (x >> n) | (x << (32 - n))
25 define i32 @t2ADDrs_ror(i32 %X, i32 %Y) {
26 %A = lshr i32 %Y, 16
27 %B = shl i32 %Y, 16
28 %C = or i32 %B, %A
29 %R = add i32 %X, %C
30 ret i32 %R
31 }
32
33 define i32 @t2ADDrs_noRegShift(i32 %X, i32 %Y, i8 %sh) {
34 %shift.upgrd.1 = zext i8 %sh to i32
35 %A = shl i32 %Y, %shift.upgrd.1
36 %B = add i32 %X, %A
37 ret i32 %B
38 }
39