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[X86] Make sure the check for VEX.vvvv being all ones on instructions that don't use it doesn't ignore a bit in 32-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333717 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 2 years ago
2 changed file(s) with 7 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
16941694 return -1;
16951695
16961696 if (insn->mode != MODE_64BIT)
1697 vvvv &= 0x7;
1697 vvvv &= 0xf; // Can only clear bit 4. Bit 3 must be cleared later.
16981698
16991699 insn->vvvv = static_cast(vvvv);
17001700 return 0;
18591859 needVVVV = 0; /* Mark that we have found a VVVV operand. */
18601860 if (!hasVVVV)
18611861 return -1;
1862 if (insn->mode != MODE_64BIT)
1863 insn->vvvv = static_cast(insn->vvvv & 0x7);
18621864 if (fixupReg(insn, &Op))
18631865 return -1;
18641866 break;
0 # RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 2>&1 | grep "invalid instruction encoding"
1
2 # Make sure the VEX.vvvv being all 1s check doesn't ignore bit 3 in 32-bit mode.
3 0xc4 0xe1 0xb9 0x7e 0xc0