llvm.org GIT mirror llvm / 9f2e160
Fix assembling ARM vst2 instructions with double-spaced registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153099 91177308-0d34-0410-b5e6-96231b3b80d8 Kevin Enderby 8 years ago
3 changed file(s) with 9 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
11011101 }
11021102
11031103 bool isVecListDPairSpaced() const {
1104 if (!isSingleSpacedVectorList()) return false;
1104 if (isSingleSpacedVectorList()) return false;
11051105 return (ARMMCRegisterClasses[ARM::DPairSpcRegClassID]
11061106 .contains(VectorList.RegNum));
11071107 }
263263 @ CHECK: vst1.8 {d4, d5}, [r2] @ encoding: [0x0f,0x4a,0x02,0xf4]
264264 @ CHECK: vst1.8 {d4, d5}, [r2] @ encoding: [0x0f,0x4a,0x02,0xf4]
265265 @ CHECK: vst1.32 {d4, d5}, [r2] @ encoding: [0x8f,0x4a,0x02,0xf4]
266
267 @ rdar://11082188
268 vst2.8 {d8, d10}, [r4]
269 @ CHECK: vst2.8 {d8, d10}, [r4] @ encoding: [0x0f,0x89,0x04,0xf4]
100100 vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
101101 @ CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf9]
102102 vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
103
104 @ rdar://11082188
105 vst2.8 {d8, d10}, [r4]
106 @ CHECK: vst2.8 {d8, d10}, [r4] @ encoding: [0x04,0xf9,0x0f,0x89]