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Merging r367753: ------------------------------------------------------------------------ r367753 | nikic | 2019-08-03 08:47:23 +0200 (Sat, 03 Aug 2019) | 12 lines [Thumb] Fix invalid symbol redefinition due to duplicated jumptable (PR42760) Fix for https://bugs.llvm.org/show_bug.cgi?id=42760. A tBR_JTr instruction is duplicated by tail duplication, which results in the same jumptable with the same label being emitted twice. Fix this by marking tBR_JTr as not duplicable. The corresponding ARM/Thumb instructions are already marked as not duplicable. Additionally also mark tTBB_JT and tTBH_JT to be consistent with Thumb2, even though this shouldn't be strictly necessary. Differential Revision: https://reviews.llvm.org/D65606 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@367808 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 1 year, 3 months ago
2 changed file(s) with 58 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
591591 [(ARMbrjt tGPR:$target, tjumptable:$jt)]>,
592592 Sched<[WriteBrTbl]> {
593593 let Size = 2;
594 let isNotDuplicable = 1;
594595 list Predicates = [IsThumb, IsThumb1Only];
595596 }
596597 }
14641465 // Thumb-1 doesn't have the TBB or TBH instructions, but we can synthesize them
14651466 // and make use of the same compressed jump table format as Thumb-2.
14661467 let Size = 2, isBranch = 1, isTerminator = 1, isBarrier = 1,
1467 isIndirectBranch = 1 in {
1468 isIndirectBranch = 1, isNotDuplicable = 1 in {
14681469 def tTBB_JT : tPseudoInst<(outs),
14691470 (ins tGPRwithpc:$base, tGPR:$index, i32imm:$jt, i32imm:$pclbl), 0,
14701471 IIC_Br, []>, Sched<[WriteBr]>;
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc -mtriple=thumbv6m-none-unknown-eabi -tail-dup-placement-threshold=3 < %s | FileCheck %s
2
3 define hidden void @test() {
4 ; CHECK-LABEL: test:
5 ; CHECK: @ %bb.0: @ %entry
6 ; CHECK-NEXT: movs r0, #1
7 ; CHECK-NEXT: lsls r1, r0, #2
8 ; CHECK-NEXT: b .LBB0_2
9 ; CHECK-NEXT: .LBB0_1: @ %bb2
10 ; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
11 ; CHECK-NEXT: cmp r0, #0
12 ; CHECK-NEXT: bne .LBB0_6
13 ; CHECK-NEXT: .LBB0_2: @ %switch
14 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
15 ; CHECK-NEXT: adr r2, .LJTI0_0
16 ; CHECK-NEXT: ldr r2, [r2, r1]
17 ; CHECK-NEXT: mov pc, r2
18 ; CHECK-NEXT: @ %bb.3:
19 ; CHECK-NEXT: .p2align 2
20 ; CHECK-NEXT: .LJTI0_0:
21 ; CHECK-NEXT: .long .LBB0_6+1
22 ; CHECK-NEXT: .long .LBB0_4+1
23 ; CHECK-NEXT: .long .LBB0_6+1
24 ; CHECK-NEXT: .long .LBB0_5+1
25 ; CHECK-NEXT: .LBB0_4: @ %switch
26 ; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
27 ; CHECK-NEXT: b .LBB0_1
28 ; CHECK-NEXT: .LBB0_5: @ %bb
29 ; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
30 ; CHECK-NEXT: cmp r0, #0
31 ; CHECK-NEXT: beq .LBB0_1
32 ; CHECK-NEXT: .LBB0_6: @ %dead
33 entry:
34 br label %switch
35
36 switch: ; preds = %bb2, %entry
37 switch i32 undef, label %dead2 [
38 i32 0, label %dead
39 i32 1, label %bb2
40 i32 2, label %dead
41 i32 3, label %bb
42 ]
43
44 dead: ; preds = %bb2, %bb, %switch, %switch
45 unreachable
46
47 dead2: ; preds = %switch
48 unreachable
49
50 bb: ; preds = %switch
51 br i1 undef, label %dead, label %bb2
52
53 bb2: ; preds = %bb, %switch
54 br i1 undef, label %dead, label %switch
55 }