llvm.org GIT mirror llvm / 9ec8f37
[ReachingDefAnalysis] Fix what I assume to be a typo ReachingDedDefaultVal->ReachingDefDefaultVal. Unless Ded has some many I don't know about. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328043 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 2 years ago
2 changed file(s) with 5 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
6767 MBBReachingDefsInfo MBBReachingDefs;
6868
6969 /// Default values are 'nothing happened a long time ago'.
70 const int ReachingDedDefaultVal = -(1 << 20);
70 const int ReachingDefDefaultVal = -(1 << 20);
7171
7272 public:
7373 static char ID; // Pass identification, replacement for typeid
3333 // Set up LiveRegs to represent registers entering MBB.
3434 // Default values are 'nothing happened a long time ago'.
3535 if (LiveRegs.empty())
36 LiveRegs.assign(NumRegUnits, ReachingDedDefaultVal);
36 LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal);
3737
3838 // This is the entry block.
3939 if (MBB->pred_empty()) {
6363 for (unsigned Unit = 0; Unit != NumRegUnits; ++Unit) {
6464 // Use the most recent predecessor def for each register.
6565 LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]);
66 if ((LiveRegs[Unit] != ReachingDedDefaultVal))
66 if ((LiveRegs[Unit] != ReachingDefDefaultVal))
6767 MBBReachingDefs[MBBNumber][Unit].push_back(LiveRegs[Unit]);
6868 }
6969 }
172172 int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) {
173173 assert(InstIds.count(MI) && "Unexpected machine instuction.");
174174 int InstId = InstIds[MI];
175 int DefRes = ReachingDedDefaultVal;
175 int DefRes = ReachingDefDefaultVal;
176176 unsigned MBBNumber = MI->getParent()->getNumber();
177177 assert(MBBNumber < MBBReachingDefs.size() &&
178178 "Unexpected basic block number.");
179 int LatestDef = ReachingDedDefaultVal;
179 int LatestDef = ReachingDefDefaultVal;
180180 for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) {
181181 for (int Def : MBBReachingDefs[MBBNumber][*Unit]) {
182182 if (Def >= InstId)