llvm.org GIT mirror llvm / 9e71231
Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154999 91177308-0d34-0410-b5e6-96231b3b80d8 Silviu Baranga 7 years ago
2 changed file(s) with 40 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
11861186 let Inst{19-16} = Rn;
11871187 let Inst{15-12} = 0b0000;
11881188 let Inst{11-0} = imm;
1189
1190 let Unpredictable{15-12} = 0b1111;
11891191 }
11901192 def rr : AI1
11911193 opc, "\t$Rn, $Rm",
11991201 let Inst{15-12} = 0b0000;
12001202 let Inst{11-4} = 0b00000000;
12011203 let Inst{3-0} = Rm;
1204
1205 let Unpredictable{15-12} = 0b1111;
12021206 }
12031207 def rsi : AI1
12041208 (ins GPR:$Rn, so_reg_imm:$shift), DPSoRegImmFrm, iis,
12131217 let Inst{11-5} = shift{11-5};
12141218 let Inst{4} = 0;
12151219 let Inst{3-0} = shift{3-0};
1220
1221 let Unpredictable{15-12} = 0b1111;
12161222 }
12171223 def rsr : AI1
1218 (ins GPR:$Rn, so_reg_reg:$shift), DPSoRegRegFrm, iis,
1224 (ins GPRnopc:$Rn, so_reg_reg:$shift), DPSoRegRegFrm, iis,
12191225 opc, "\t$Rn, $shift",
1220 [(opnode GPR:$Rn, so_reg_reg:$shift)]> {
1226 [(opnode GPRnopc:$Rn, so_reg_reg:$shift)]> {
12211227 bits<4> Rn;
12221228 bits<12> shift;
12231229 let Inst{25} = 0;
12291235 let Inst{6-5} = shift{6-5};
12301236 let Inst{4} = 1;
12311237 let Inst{3-0} = shift{3-0};
1238
1239 let Unpredictable{15-12} = 0b1111;
12321240 }
12331241
12341242 }
0 # RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
1
2 # CHECK: potentially undefined
3 # CHECK: 0x01 0x10 0x50 0x03
4 0x01 0x10 0x50 0x03
5
6 # CHECK: potentially undefined
7 # CHECK: 0x82 0x10 0x50 0x01
8 0x82 0x10 0x50 0x01
9
10 # CHECK: potentially undefined
11 # CHECK: 0x02 0x10 0x50 0x01
12 0x02 0x10 0x50 0x01
13
14 # CHECK: potentially undefined
15 # CHECK: 0x1f 0x01 0x52 0x01
16 0x1f 0x01 0x52 0x01
17
18 # CHECK: potentially undefined
19 # CHECK: 0x10 0x11 0x52 0x01
20 0x10 0x11 0x52 0x01
21
22 # CHECK: potentially undefined
23 # CHECK: 0x10 0x0f 0x51 0x01
24 0x10 0x0f 0x51 0x01
25
26 # CHECK: potentially undefined
27 # CHECK: 0x10 0x01 0x5f 0x01
28 0x10 0x01 0x5f 0x01
29