llvm.org GIT mirror llvm / 9e639e8
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186098 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 7 years ago
11 changed file(s) with 26 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
388388 void join(LiveInterval &Other,
389389 const int *ValNoAssignments,
390390 const int *RHSValNoAssignments,
391 SmallVector> &NewVNInfo,
391 SmallVectorImpl> &NewVNInfo,
392392 MachineRegisterInfo *MRI);
393393
394394 /// isInOneLiveRange - Return true if the range specified is entirely in the
156156
157157 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
158158 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
159 SmallVector &Defs);
160 void UpdatePhysRegDefs(MachineInstr *MI, SmallVector> &Defs);
159 SmallVectorImpl> &Defs);
160 void UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl &Defs);
161161
162162 /// FindLastRefOrPartRef - Return the last reference or partial reference of
163163 /// the specified register.
8080 return false;
8181 }
8282
83 static bool isReverseVectorMask(SmallVector> &Mask) {
83 static bool isReverseVectorMask(SmallVectorImpl> &Mask) {
8484 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
8585 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i))
8686 return false;
13791379 ///
13801380 static bool
13811381 CollectAddOperandsWithScales(DenseMap &M,
1382 SmallVector> &NewOps,
1382 SmallVectorImpl> &NewOps,
13831383 APInt &AccumulatedConstant,
13841384 const SCEV *const *Ops, size_t NumOperands,
13851385 const APInt &Scale,
15251525 // struct. To is the result struct built so far, new insertvalue instructions
15261526 // build on that.
15271527 static Value *BuildSubAggregate(Value *From, Value* To, Type *IndexedType,
1528 SmallVector> &Idxs,
1528 SmallVectorImpl> &Idxs,
15291529 unsigned IdxSkip,
15301530 Instruction *InsertBefore) {
15311531 llvm::StructType *STy = dyn_cast(IndexedType);
257257 /// getValueTypePair - Read a value/type pair out of the specified record from
258258 /// slot 'Slot'. Increment Slot past the number of slots used in the record.
259259 /// Return true on failure.
260 bool getValueTypePair(SmallVector> &Record, unsigned &Slot,
260 bool getValueTypePair(SmallVectorImpl> &Record, unsigned &Slot,
261261 unsigned InstNum, Value *&ResVal) {
262262 if (Slot == Record.size()) return true;
263263 unsigned ValNo = (unsigned)Record[Slot++];
281281 /// popValue - Read a value out of the specified record from slot 'Slot'.
282282 /// Increment Slot past the number of slots used by the value in the record.
283283 /// Return true if there is an error.
284 bool popValue(SmallVector> &Record, unsigned &Slot,
284 bool popValue(SmallVectorImpl> &Record, unsigned &Slot,
285285 unsigned InstNum, Type *Ty, Value *&ResVal) {
286286 if (getValue(Record, Slot, InstNum, Ty, ResVal))
287287 return true;
291291 }
292292
293293 /// getValue -- Like popValue, but does not increment the Slot number.
294 bool getValue(SmallVector> &Record, unsigned Slot,
294 bool getValue(SmallVectorImpl> &Record, unsigned Slot,
295295 unsigned InstNum, Type *Ty, Value *&ResVal) {
296296 ResVal = getValue(Record, Slot, InstNum, Ty);
297297 return ResVal == 0;
299299
300300 /// getValue -- Version of getValue that returns ResVal directly,
301301 /// or 0 if there is an error.
302 Value *getValue(SmallVector> &Record, unsigned Slot,
302 Value *getValue(SmallVectorImpl> &Record, unsigned Slot,
303303 unsigned InstNum, Type *Ty) {
304304 if (Slot == Record.size()) return 0;
305305 unsigned ValNo = (unsigned)Record[Slot];
310310 }
311311
312312 /// getValueSigned -- Like getValue, but decodes signed VBRs.
313 Value *getValueSigned(SmallVector> &Record, unsigned Slot,
313 Value *getValueSigned(SmallVectorImpl> &Record, unsigned Slot,
314314 unsigned InstNum, Type *Ty) {
315315 if (Slot == Record.size()) return 0;
316316 unsigned ValNo = (unsigned)decodeSignRotatedValue(Record[Slot]);
613613 static void WriteMDNode(const MDNode *N,
614614 const ValueEnumerator &VE,
615615 BitstreamWriter &Stream,
616 SmallVector> &Record) {
616 SmallVectorImpl> &Record) {
617617 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
618618 if (N->getOperand(i)) {
619619 Record.push_back(VE.getTypeID(N->getOperand(i)->getType()));
700700 BitstreamWriter &Stream) {
701701 bool StartedMetadataBlock = false;
702702 SmallVector Record;
703 const SmallVector> &Vals = VE.getFunctionLocalMDValues();
703 const SmallVectorImpl> &Vals = VE.getFunctionLocalMDValues();
704704 for (unsigned i = 0, e = Vals.size(); i != e; ++i)
705705 if (const MDNode *N = Vals[i])
706706 if (N->isFunctionLocal() && N->getFunction() == &F) {
10771077 /// instruction ID, then it is a forward reference, and it also includes the
10781078 /// type ID. The value ID that is written is encoded relative to the InstID.
10791079 static bool PushValueAndType(const Value *V, unsigned InstID,
1080 SmallVector> &Vals,
1080 SmallVectorImpl> &Vals,
10811081 ValueEnumerator &VE) {
10821082 unsigned ValID = VE.getValueID(V);
10831083 // Make encoding relative to the InstID.
10921092 /// pushValue - Like PushValueAndType, but where the type of the value is
10931093 /// omitted (perhaps it was already encoded in an earlier operand).
10941094 static void pushValue(const Value *V, unsigned InstID,
1095 SmallVector> &Vals,
1095 SmallVectorImpl> &Vals,
10961096 ValueEnumerator &VE) {
10971097 unsigned ValID = VE.getValueID(V);
10981098 Vals.push_back(InstID - ValID);
10991099 }
11001100
11011101 static void pushValue64(const Value *V, unsigned InstID,
1102 SmallVector> &Vals,
1102 SmallVectorImpl> &Vals,
11031103 ValueEnumerator &VE) {
11041104 uint64_t ValID = VE.getValueID(V);
11051105 Vals.push_back(InstID - ValID);
11061106 }
11071107
11081108 static void pushValueSigned(const Value *V, unsigned InstID,
1109 SmallVector> &Vals,
1109 SmallVectorImpl> &Vals,
11101110 ValueEnumerator &VE) {
11111111 unsigned ValID = VE.getValueID(V);
11121112 int64_t diff = ((int32_t)InstID - (int32_t)ValID);
11161116 /// WriteInstruction - Emit an instruction to the specified stream.
11171117 static void WriteInstruction(const Instruction &I, unsigned InstID,
11181118 ValueEnumerator &VE, BitstreamWriter &Stream,
1119 SmallVector> &Vals) {
1119 SmallVectorImpl> &Vals) {
11201120 unsigned Code = 0;
11211121 unsigned AbbrevToUse = 0;
11221122 VE.setInstructionID(&I);
124124
125125 const ValueList &getValues() const { return Values; }
126126 const ValueList &getMDValues() const { return MDValues; }
127 const SmallVector> &getFunctionLocalMDValues() const {
127 const SmallVectorImpl> &getFunctionLocalMDValues() const {
128128 return FunctionLocalMDs;
129129 }
130130 const TypeList &getTypes() const { return Types; }
414414 void LiveInterval::join(LiveInterval &Other,
415415 const int *LHSValNoAssignments,
416416 const int *RHSValNoAssignments,
417 SmallVector> &NewVNInfo,
417 SmallVectorImpl> &NewVNInfo,
418418 MachineRegisterInfo *MRI) {
419419 verify();
420420
440440 }
441441
442442 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
443 SmallVector> &Defs) {
443 SmallVectorImpl> &Defs) {
444444 // What parts of the register are previously defined?
445445 SmallSet Live;
446446 if (PhysRegDef[Reg] || PhysRegUse[Reg]) {
483483 }
484484
485485 void LiveVariables::UpdatePhysRegDefs(MachineInstr *MI,
486 SmallVector> &Defs) {
486 SmallVectorImpl> &Defs) {
487487 while (!Defs.empty()) {
488488 unsigned Reg = Defs.back();
489489 Defs.pop_back();
171171 BitVector &PhysRegDefs,
172172 BitVector &PhysRegClobbers,
173173 SmallSet &StoredFIs,
174 SmallVector> &Candidates);
174 SmallVectorImpl> &Candidates);
175175
176176 /// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
177177 /// current loop.
403403 BitVector &PhysRegDefs,
404404 BitVector &PhysRegClobbers,
405405 SmallSet &StoredFIs,
406 SmallVector> &Candidates) {
406 SmallVectorImpl> &Candidates) {
407407 bool RuledOut = false;
408408 bool HasNonInvariantUse = false;
409409 unsigned Def = 0;
10831083 return true;
10841084
10851085 for (unsigned i = BackTrace.size(); i != 0; --i) {
1086 SmallVector> &RP = BackTrace[i-1];
1086 SmallVectorImpl> &RP = BackTrace[i-1];
10871087 if (RP[RCId] + Cost >= Limit)
10881088 return true;
10891089 }
11291129
11301130 // Update register pressure of blocks from loop header to current block.
11311131 for (unsigned i = 0, e = BackTrace.size(); i != e; ++i) {
1132 SmallVector> &RP = BackTrace[i];
1132 SmallVectorImpl> &RP = BackTrace[i];
11331133 for (DenseMap::iterator CI = Cost.begin(), CE = Cost.end();
11341134 CI != CE; ++CI) {
11351135 unsigned RCId = CI->first;