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RuntimeDyldELF: add LDST128_ABS_LO12_NC reloc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292788 91177308-0d34-0410-b5e6-96231b3b80d8 Eugene Leviant 3 years ago
2 changed file(s) with 9 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
441441 // Immediate goes in bits 21:10 of LD/ST instruction, taken
442442 // from bits 11:3 of X
443443 or32AArch64Imm(TargetPtr, getBits(Value + Addend, 3, 11));
444 break;
445 case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
446 // Operation: S + A
447 // Immediate goes in bits 21:10 of LD/ST instruction, taken
448 // from bits 11:4 of X
449 or32AArch64Imm(TargetPtr, getBits(Value + Addend, 4, 11));
444450 break;
445451 }
446452 }
2727 ldr s4, [x5, :lo12:a]
2828 # R_AARCH64_LDST64_ABS_LO12_NC
2929 ldr x4, [x5, :lo12:a]
30 # R_AARCH64_LDST128_ABS_LO12_NC
31 ldr q4, [x5, :lo12:a]
3032 p:
3133 # R_AARCH64_ADR_PREL_PG_HI21
3234 # Test both low and high immediate values
6567 # rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
6668 # rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
6769 # rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
70 # rtdyld-check: (*{4}(l+16))[21:10] = a[11:4]
6871
6972 ## Check ADR_PREL_PG_HI21. Low order bits of immediate value
7073 ## go to bits 30:29. High order bits go to bits 23:5