llvm.org GIT mirror llvm / 9bc96a5
Create DebugLoc information in FastISel. Several temporary methods were created. Specifically, those BuildMIs which use "DebugLoc::getUnknownLoc()". I'll remove them soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 10 years ago
8 changed file(s) with 111 addition(s) and 46 deletion(s). Raw diff Collapse all Expand all
1515
1616 #include "llvm/ADT/DenseMap.h"
1717 #include "llvm/ADT/SmallSet.h"
18 #include "llvm/CodeGen/DebugLoc.h"
1819 #include "llvm/CodeGen/SelectionDAGNodes.h"
1920
2021 namespace llvm {
5455 MachineRegisterInfo &MRI;
5556 MachineFrameInfo &MFI;
5657 MachineConstantPool &MCP;
58 DebugLoc DL;
5759 const TargetMachine &TM;
5860 const TargetData &TD;
5961 const TargetInstrInfo &TII;
6062 const TargetLowering &TLI;
6163
6264 public:
63 /// startNewBlock - Set the current block, to which generated
64 /// machine instructions will be appended, and clear the local
65 /// CSE map.
65 /// startNewBlock - Set the current block to which generated machine
66 /// instructions will be appended, and clear the local CSE map.
6667 ///
6768 void startNewBlock(MachineBasicBlock *mbb) {
6869 setCurrentBlock(mbb);
6970 LocalValueMap.clear();
7071 }
7172
72 /// setCurrentBlock - Set the current block, to which generated
73 /// machine instructions will be appended.
73 /// setCurrentBlock - Set the current block to which generated machine
74 /// instructions will be appended.
7475 ///
7576 void setCurrentBlock(MachineBasicBlock *mbb) {
7677 MBB = mbb;
7778 }
79
80 /// setCurDebugLoc - Set the current debug location information, which is used
81 /// when creating a machine instruction.
82 ///
83 void setCurDebugLoc(DebugLoc dl) { DL = dl; }
7884
7985 /// SelectInstruction - Do "fast" instruction selection for the given
8086 /// LLVM IR instruction, and append generated machine instructions to
285285 /// of `new MachineInstr'.
286286 ///
287287 MachineInstr *CreateMachineInstr(const TargetInstrDesc &TID,
288 DebugLoc DL,
288289 bool NoImp = false);
289290
290291 /// CloneMachineInstr - Create a new MachineInstr which is a copy of the
9999 ///
100100 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
101101 const TargetInstrDesc &TID) {
102 return MachineInstrBuilder(MF.CreateMachineInstr(TID));
102 return MachineInstrBuilder(MF.CreateMachineInstr(TID,
103 DebugLoc::getUnknownLoc()));
104 }
105 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
106 DebugLoc DL,
107 const TargetInstrDesc &TID) {
108 return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
103109 }
104110
105111 /// BuildMI - This version of the builder sets up the first operand as a
106112 /// destination virtual register.
107113 ///
108 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
109 const TargetInstrDesc &TID,
110 unsigned DestReg) {
111 return MachineInstrBuilder(MF.CreateMachineInstr(TID)).addReg(DestReg, true);
114 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
115 const TargetInstrDesc &TID,
116 unsigned DestReg) {
117 return MachineInstrBuilder(MF.CreateMachineInstr(TID,
118 DebugLoc::getUnknownLoc()))
119 .addReg(DestReg, true);
120 }
121 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
122 DebugLoc DL,
123 const TargetInstrDesc &TID,
124 unsigned DestReg) {
125 return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
126 .addReg(DestReg, true);
112127 }
113128
114129 /// BuildMI - This version of the builder inserts the newly-built
119134 MachineBasicBlock::iterator I,
120135 const TargetInstrDesc &TID,
121136 unsigned DestReg) {
122 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
137 MachineInstr *MI =
138 BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
139 BB.insert(I, MI);
140 return MachineInstrBuilder(MI).addReg(DestReg, true);
141 }
142 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
143 MachineBasicBlock::iterator I,
144 DebugLoc DL,
145 const TargetInstrDesc &TID,
146 unsigned DestReg) {
147 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
123148 BB.insert(I, MI);
124149 return MachineInstrBuilder(MI).addReg(DestReg, true);
125150 }
131156 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
132157 MachineBasicBlock::iterator I,
133158 const TargetInstrDesc &TID) {
134 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
159 MachineInstr *MI =
160 BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
161 BB.insert(I, MI);
162 return MachineInstrBuilder(MI);
163 }
164 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
165 MachineBasicBlock::iterator I,
166 DebugLoc DL,
167 const TargetInstrDesc &TID) {
168 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
135169 BB.insert(I, MI);
136170 return MachineInstrBuilder(MI);
137171 }
144178 const TargetInstrDesc &TID) {
145179 return BuildMI(*BB, BB->end(), TID);
146180 }
181 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
182 DebugLoc DL,
183 const TargetInstrDesc &TID) {
184 return BuildMI(*BB, BB->end(), DL, TID);
185 }
147186
148187 /// BuildMI - This version of the builder inserts the newly-built
149188 /// instruction at the end of the given MachineBasicBlock, and sets up the first
154193 unsigned DestReg) {
155194 return BuildMI(*BB, BB->end(), TID, DestReg);
156195 }
196 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
197 DebugLoc DL,
198 const TargetInstrDesc &TID,
199 unsigned DestReg) {
200 return BuildMI(*BB, BB->end(), DL, TID, DestReg);
201 }
157202
158203 } // End llvm namespace
159204
191191 /// of `new MachineInstr'.
192192 ///
193193 MachineInstr *
194 MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID, bool NoImp) {
194 MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID,
195 DebugLoc DL, bool NoImp) {
195196 return new (InstructionRecycler.Allocate(Allocator))
196 MachineInstr(TID, NoImp);
197 MachineInstr(TID, DL, NoImp);
197198 }
198199
199200 /// CloneMachineInstr - Create a new MachineInstr which is a copy of the
113113 Reg = LocalValueMap[CE];
114114 } else if (isa(V)) {
115115 Reg = createResultReg(TLI.getRegClassFor(VT));
116 BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
116 BuildMI(MBB, DL, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
117117 }
118118
119119 // If target-independent code couldn't handle the value, give target-specific
323323 unsigned Line = SPI->getLine();
324324 unsigned Col = SPI->getColumn();
325325 unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
326 unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col);
327 setCurDebugLoc(DebugLoc::get(Idx));
326328 const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
327 BuildMI(MBB, II).addImm(ID);
329 BuildMI(MBB, DL, II).addImm(ID);
328330 }
329331 return true;
330332 }
334336 unsigned ID =
335337 DW->RecordRegionStart(cast(RSI->getContext()));
336338 const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
337 BuildMI(MBB, II).addImm(ID);
339 BuildMI(MBB, DL, II).addImm(ID);
338340 }
339341 return true;
340342 }
344346 unsigned ID =
345347 DW->RecordRegionEnd(cast(REI->getContext()));
346348 const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
347 BuildMI(MBB, II).addImm(ID);
349 BuildMI(MBB, DL, II).addImm(ID);
348350 }
349351 return true;
350352 }
352354 if (!DW) return true;
353355 DbgFuncStartInst *FSI = cast(I);
354356 Value *SP = FSI->getSubprogram();
357
355358 if (DW->ValidDebugInfo(SP)) {
356 // llvm.dbg.func.start implicitly defines a dbg_stoppoint which is
357 // what (most?) gdb expects.
359 // llvm.dbg.func.start implicitly defines a dbg_stoppoint which is what
360 // (most?) gdb expects.
358361 DISubprogram Subprogram(cast(SP));
359362 DICompileUnit CompileUnit = Subprogram.getCompileUnit();
360363 unsigned SrcFile = DW->RecordSource(CompileUnit.getDirectory(),
361364 CompileUnit.getFilename());
365
362366 // Record the source line but does not create a label for the normal
363367 // function start. It will be emitted at asm emission time. However,
364368 // create a label if this is a beginning of inlined function.
365 unsigned LabelID =
366 DW->RecordSourceLine(Subprogram.getLineNumber(), 0, SrcFile);
369 unsigned Line = Subprogram.getLineNumber();
370 unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
371 setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0)));
372
367373 if (DW->getRecordSourceLineCount() != 1) {
368374 const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
369 BuildMI(MBB, II).addImm(LabelID);
375 BuildMI(MBB, DL, II).addImm(LabelID);
370376 }
371377 }
378
372379 return true;
373380 }
374381 case Intrinsic::dbg_declare: {
392399
393400 // Build the DECLARE instruction.
394401 const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
395 BuildMI(MBB, II).addFrameIndex(FI).addGlobalAddress(GV);
402 BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
396403 }
397404 return true;
398405 }
829836 unsigned ResultReg = createResultReg(RC);
830837 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
831838
832 BuildMI(MBB, II, ResultReg);
839 BuildMI(MBB, DL, II, ResultReg);
833840 return ResultReg;
834841 }
835842
840847 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
841848
842849 if (II.getNumDefs() >= 1)
843 BuildMI(MBB, II, ResultReg).addReg(Op0);
850 BuildMI(MBB, DL, II, ResultReg).addReg(Op0);
844851 else {
845 BuildMI(MBB, II).addReg(Op0);
852 BuildMI(MBB, DL, II).addReg(Op0);
846853 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
847854 II.ImplicitDefs[0], RC, RC);
848855 if (!InsertedCopy)
859866 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
860867
861868 if (II.getNumDefs() >= 1)
862 BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1);
869 BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1);
863870 else {
864 BuildMI(MBB, II).addReg(Op0).addReg(Op1);
871 BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1);
865872 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
866873 II.ImplicitDefs[0], RC, RC);
867874 if (!InsertedCopy)
877884 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
878885
879886 if (II.getNumDefs() >= 1)
880 BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Imm);
887 BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Imm);
881888 else {
882 BuildMI(MBB, II).addReg(Op0).addImm(Imm);
889 BuildMI(MBB, DL, II).addReg(Op0).addImm(Imm);
883890 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
884891 II.ImplicitDefs[0], RC, RC);
885892 if (!InsertedCopy)
895902 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
896903
897904 if (II.getNumDefs() >= 1)
898 BuildMI(MBB, II, ResultReg).addReg(Op0).addFPImm(FPImm);
905 BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addFPImm(FPImm);
899906 else {
900 BuildMI(MBB, II).addReg(Op0).addFPImm(FPImm);
907 BuildMI(MBB, DL, II).addReg(Op0).addFPImm(FPImm);
901908 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
902909 II.ImplicitDefs[0], RC, RC);
903910 if (!InsertedCopy)
913920 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
914921
915922 if (II.getNumDefs() >= 1)
916 BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
923 BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
917924 else {
918 BuildMI(MBB, II).addReg(Op0).addReg(Op1).addImm(Imm);
925 BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1).addImm(Imm);
919926 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
920927 II.ImplicitDefs[0], RC, RC);
921928 if (!InsertedCopy)
931938 const TargetInstrDesc &II = TII.get(MachineInstOpcode);
932939
933940 if (II.getNumDefs() >= 1)
934 BuildMI(MBB, II, ResultReg).addImm(Imm);
941 BuildMI(MBB, DL, II, ResultReg).addImm(Imm);
935942 else {
936 BuildMI(MBB, II).addImm(Imm);
943 BuildMI(MBB, DL, II).addImm(Imm);
937944 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
938945 II.ImplicitDefs[0], RC, RC);
939946 if (!InsertedCopy)
950957 const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG);
951958
952959 if (II.getNumDefs() >= 1)
953 BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Idx);
960 BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Idx);
954961 else {
955 BuildMI(MBB, II).addReg(Op0).addImm(Idx);
962 BuildMI(MBB, DL, II).addReg(Op0).addImm(Idx);
956963 bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
957964 II.ImplicitDefs[0], RC, RC);
958965 if (!InsertedCopy)
38833883 DICompileUnit CompileUnit = Subprogram.getCompileUnit();
38843884 unsigned SrcFile = DW->RecordSource(CompileUnit.getDirectory(),
38853885 CompileUnit.getFilename());
3886
38863887 // Record the source line but does not create a label for the normal
38873888 // function start. It will be emitted at asm emission time. However,
38883889 // create a label if this is a beginning of inlined function.
38893890 unsigned Line = Subprogram.getLineNumber();
3890 unsigned LabelID =
3891 DW->RecordSourceLine(Line, 0, SrcFile);
3891 unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
3892
38923893 if (DW->getRecordSourceLineCount() != 1)
38933894 DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getRoot(), LabelID));
3895
38943896 setCurDebugLoc(DebugLoc::get(DAG.getMachineFunction().
38953897 getOrCreateDebugLocID(SrcFile, Line, 0)));
38963898 }
648648 return false;
649649
650650 bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
651 MachineInstr *PopMI = MF.CreateMachineInstr(get(ARM::tPOP));
651 MachineInstr *PopMI = MF.CreateMachineInstr(get(ARM::tPOP),MI->getDebugLoc());
652652 MBB.insert(MI, PopMI);
653653 for (unsigned i = CSI.size(); i != 0; --i) {
654654 unsigned Reg = CSI[i-1].getReg();
19371937
19381938 static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
19391939 const SmallVectorImpl &MOs,
1940 MachineInstr *MI, const TargetInstrInfo &TII) {
1940 MachineInstr *MI,
1941 const TargetInstrInfo &TII) {
19411942 // Create the base instruction with the memory operand as the first part.
1942 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
1943 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
1944 MI->getDebugLoc(), true);
19431945 MachineInstrBuilder MIB(NewMI);
19441946 unsigned NumAddrOps = MOs.size();
19451947 for (unsigned i = 0; i != NumAddrOps; ++i)
19641966 unsigned Opcode, unsigned OpNo,
19651967 const SmallVectorImpl &MOs,
19661968 MachineInstr *MI, const TargetInstrInfo &TII) {
1967 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
1969 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
1970 MI->getDebugLoc(), true);
19681971 MachineInstrBuilder MIB(NewMI);
19691972
19701973 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
22972300 }
22982301
22992302 // Emit the data processing instruction.
2300 MachineInstr *DataMI = MF.CreateMachineInstr(TID, true);
2303 MachineInstr *DataMI = MF.CreateMachineInstr(TID, MI->getDebugLoc(), true);
23012304 MachineInstrBuilder MIB(DataMI);
23022305
23032306 if (FoldedStore)