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Merging r316035: ------------------------------------------------------------------------ r316035 | tnorthover | 2017-10-17 14:43:52 -0700 (Tue, 17 Oct 2017) | 6 lines AArch64: account for possible frame index operand in compares. If the address of a local is used in a comparison, AArch64 can fold the address-calculation into the comparison via "adds". Unfortunately, a couple of places (both hit in this one test) are not ready to deal with that yet and just assume the first source operand is a register. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@319231 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 1 year, 8 months ago
3 changed file(s) with 28 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
939939 bool AArch64InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
940940 unsigned &SrcReg2, int &CmpMask,
941941 int &CmpValue) const {
942 // The first operand can be a frame index where we'd normally expect a
943 // register.
944 assert(MI.getNumOperands() >= 2 && "All AArch64 cmps should have 2 operands");
945 if (!MI.getOperand(1).isReg())
946 return false;
947
942948 switch (MI.getOpcode()) {
943949 default:
944950 break;
166166 // CMP is an alias for SUBS with a dead destination register.
167167 case AArch64::SUBSWri:
168168 case AArch64::SUBSXri: {
169 // Sometimes the first operand is a FrameIndex. Bail if tht happens.
170 if (!PredI.getOperand(1).isReg())
171 return None;
169172 MCPhysReg SrcReg = PredI.getOperand(1).getReg();
170173
171174 // Must not be a symbolic immediate.
0 ; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
1
2 ; CHECK: test_frameindex_cmp:
3 ; CHECK: cmn sp, #{{[0-9]+}}
4 define void @test_frameindex_cmp() {
5 %stack = alloca i8
6 %stack.int = ptrtoint i8* %stack to i64
7 %cmp = icmp ne i64 %stack.int, 0
8 br i1 %cmp, label %bb1, label %bb2
9
10 bb1:
11 call void @bar()
12 ret void
13
14 bb2:
15 ret void
16 }
17
18 declare void @bar()