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x86 -- add the XTEST instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177888 91177308-0d34-0410-b5e6-96231b3b80d8 Dave Zarzycki 7 years ago
6 changed file(s) with 43 addition(s) and 39 deletion(s). Raw diff Collapse all Expand all
275275 MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36,
276276 MRM_C8 = 37, MRM_C9 = 38, MRM_E8 = 39, MRM_F0 = 40,
277277 MRM_F8 = 41, MRM_F9 = 42, MRM_D0 = 45, MRM_D1 = 46,
278 MRM_D4 = 47, MRM_D5 = 48, MRM_D8 = 49, MRM_D9 = 50,
279 MRM_DA = 51, MRM_DB = 52, MRM_DC = 53, MRM_DD = 54,
280 MRM_DE = 55, MRM_DF = 56,
278 MRM_D4 = 47, MRM_D5 = 48, MRM_D6 = 49, MRM_D8 = 50,
279 MRM_D9 = 51, MRM_DA = 52, MRM_DB = 53, MRM_DC = 54,
280 MRM_DD = 55, MRM_DE = 56, MRM_DF = 57,
281281
282282 /// RawFrmImm8 - This is used for the ENTER instruction, which has two
283283 /// immediates, the first of which is a 16-bit immediate (specified by
573573 ++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV).
574574 return FirstMemOp;
575575 }
576 case X86II::MRM_C1: case X86II::MRM_C2:
577 case X86II::MRM_C3: case X86II::MRM_C4:
578 case X86II::MRM_C8: case X86II::MRM_C9:
579 case X86II::MRM_E8: case X86II::MRM_F0:
580 case X86II::MRM_F8: case X86II::MRM_F9:
581 case X86II::MRM_D0: case X86II::MRM_D1:
582 case X86II::MRM_D4: case X86II::MRM_D5:
583 case X86II::MRM_D8: case X86II::MRM_D9:
584 case X86II::MRM_DA: case X86II::MRM_DB:
585 case X86II::MRM_DC: case X86II::MRM_DD:
576 case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3:
577 case X86II::MRM_C4: case X86II::MRM_C8: case X86II::MRM_C9:
578 case X86II::MRM_E8: case X86II::MRM_F0: case X86II::MRM_F8:
579 case X86II::MRM_F9: case X86II::MRM_D0: case X86II::MRM_D1:
580 case X86II::MRM_D4: case X86II::MRM_D5: case X86II::MRM_D6:
581 case X86II::MRM_D8: case X86II::MRM_D9: case X86II::MRM_DA:
582 case X86II::MRM_DB: case X86II::MRM_DC: case X86II::MRM_DD:
586583 case X86II::MRM_DE: case X86II::MRM_DF:
587584 return -1;
588585 }
11351135 TSFlags, CurByte, OS, Fixups);
11361136 CurOp += X86::AddrNumOperands;
11371137 break;
1138 case X86II::MRM_C1: case X86II::MRM_C2:
1139 case X86II::MRM_C3: case X86II::MRM_C4:
1140 case X86II::MRM_C8: case X86II::MRM_C9:
1141 case X86II::MRM_D0: case X86II::MRM_D1:
1142 case X86II::MRM_D4: case X86II::MRM_D5:
1143 case X86II::MRM_D8: case X86II::MRM_D9:
1144 case X86II::MRM_DA: case X86II::MRM_DB:
1145 case X86II::MRM_DC: case X86II::MRM_DD:
1146 case X86II::MRM_DE: case X86II::MRM_DF:
1147 case X86II::MRM_E8: case X86II::MRM_F0:
1138 case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3:
1139 case X86II::MRM_C4: case X86II::MRM_C8: case X86II::MRM_C9:
1140 case X86II::MRM_D0: case X86II::MRM_D1: case X86II::MRM_D4:
1141 case X86II::MRM_D5: case X86II::MRM_D6: case X86II::MRM_D8:
1142 case X86II::MRM_D9: case X86II::MRM_DA: case X86II::MRM_DB:
1143 case X86II::MRM_DC: case X86II::MRM_DD: case X86II::MRM_DE:
1144 case X86II::MRM_DF: case X86II::MRM_E8: case X86II::MRM_F0:
11481145 case X86II::MRM_F8: case X86II::MRM_F9:
11491146 EmitByte(BaseOpcode, CurByte, OS);
11501147
11611158 case X86II::MRM_D1: MRM = 0xD1; break;
11621159 case X86II::MRM_D4: MRM = 0xD4; break;
11631160 case X86II::MRM_D5: MRM = 0xD5; break;
1161 case X86II::MRM_D6: MRM = 0xD6; break;
11641162 case X86II::MRM_D8: MRM = 0xD8; break;
11651163 case X86II::MRM_D9: MRM = 0xD9; break;
11661164 case X86II::MRM_DA: MRM = 0xDA; break;
4444 def MRM_D1 : Format<46>;
4545 def MRM_D4 : Format<47>;
4646 def MRM_D5 : Format<48>;
47 def MRM_D8 : Format<49>;
48 def MRM_D9 : Format<50>;
49 def MRM_DA : Format<51>;
50 def MRM_DB : Format<52>;
51 def MRM_DC : Format<53>;
52 def MRM_DD : Format<54>;
53 def MRM_DE : Format<55>;
54 def MRM_DF : Format<56>;
47 def MRM_D6 : Format<49>;
48 def MRM_D8 : Format<50>;
49 def MRM_D9 : Format<51>;
50 def MRM_DA : Format<52>;
51 def MRM_DB : Format<53>;
52 def MRM_DC : Format<54>;
53 def MRM_DD : Format<55>;
54 def MRM_DE : Format<56>;
55 def MRM_DF : Format<57>;
5556
5657 // ImmType - This specifies the immediate type used by an instruction. This is
5758 // part of the ad-hoc solution used to emit machine instruction encodings by our
2626 def XEND : I<0x01, MRM_D5, (outs), (ins),
2727 "xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
2828
29 let Defs = [EFLAGS] in
30 def XTEST : I<0x01, MRM_D6, (outs), (ins), "xtest", []>, TB, Requires<[HasRTM]>;
31
2932 def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm),
3033 "xabort\t$imm",
3134 [(int_x86_xabort imm:$imm)]>, Requires<[HasRTM]>;
77 // CHECK: encoding: [0x0f,0x01,0xd5]
88 xend
99
10 // CHECK: xtest
11 // CHECK: encoding: [0x0f,0x01,0xd6]
12 xtest
13
1014 // CHECK: xabort
1115 // CHECK: encoding: [0xc6,0xf8,0x0d]
1216 xabort $13
3636 MAP(D1, 46) \
3737 MAP(D4, 47) \
3838 MAP(D5, 48) \
39 MAP(D8, 49) \
40 MAP(D9, 50) \
41 MAP(DA, 51) \
42 MAP(DB, 52) \
43 MAP(DC, 53) \
44 MAP(DD, 54) \
45 MAP(DE, 55) \
46 MAP(DF, 56)
39 MAP(D6, 49) \
40 MAP(D8, 50) \
41 MAP(D9, 51) \
42 MAP(DA, 52) \
43 MAP(DB, 53) \
44 MAP(DC, 54) \
45 MAP(DD, 55) \
46 MAP(DE, 56) \
47 MAP(DF, 57)
4748
4849 // A clone of X86 since we can't depend on something that is generated.
4950 namespace X86Local {