llvm.org GIT mirror llvm / 9b108a3
Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off. This happens all the time when a smul is promoted to a larger type. On x86-64 we now compile "int test(int x) { return x/10; }" into movslq %edi, %rax imulq $1717986919, %rax, %rax movq %rax, %rcx shrq $63, %rcx sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax" addl %ecx, %eax This fires 96 times in gcc.c on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124559 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 9 years ago
3 changed file(s) with 32 addition(s) and 21 deletion(s). Raw diff Collapse all Expand all
31533153 }
31543154 }
31553155
3156 // fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2))
3157 // if c1 is equal to the number of bits the trunc removes
3158 if (N0.getOpcode() == ISD::TRUNCATE &&
3159 (N0.getOperand(0).getOpcode() == ISD::SRL ||
3160 N0.getOperand(0).getOpcode() == ISD::SRA) &&
3161 N0.getOperand(0).hasOneUse() &&
3162 N0.getOperand(0).getOperand(1).hasOneUse() &&
3163 N1C && isa(N0.getOperand(0).getOperand(1))) {
3164 EVT LargeVT = N0.getOperand(0).getValueType();
3165 ConstantSDNode *LargeShiftAmt =
3166 cast(N0.getOperand(0).getOperand(1));
3167
3168 if (LargeVT.getScalarType().getSizeInBits() - OpSizeInBits ==
3169 LargeShiftAmt->getZExtValue()) {
3170 SDValue Amt =
3171 DAG.getConstant(LargeShiftAmt->getZExtValue() + N1C->getZExtValue(),
3172 getShiftAmountTy());
3173 SDValue SRA = DAG.getNode(ISD::SRA, N->getDebugLoc(), LargeVT,
3174 N0.getOperand(0).getOperand(0), Amt);
3175 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, SRA);
3176 }
3177 }
3178
31563179 // Simplify, based on bits shifted out of the LHS.
31573180 if (N1C && SimplifyDemandedBits(SDValue(N, 0)))
31583181 return SDValue(N, 0);
22732273 avoids partial register stalls in some important cases.
22742274
22752275 //===---------------------------------------------------------------------===//
2276
2277 We miss an optzn when lowering divide by some constants. For example:
2278 int test(int x) { return x/10; }
2279
2280 We produce:
2281
2282 _test: ## @test
2283 ## BB#0: ## %entry
2284 movslq %edi, %rax
2285 imulq $1717986919, %rax, %rax ## imm = 0x66666667
2286 movq %rax, %rcx
2287 shrq $63, %rcx
2288 ** shrq $32, %rax
2289 ** sarl $2, %eax
2290 addl %ecx, %eax
2291 ret
2292
2293 The two starred instructions could be replaced with a "sarl $34, %rax". This
2294 occurs in 186.crafty very frequently.
2295
2296 //===---------------------------------------------------------------------===//
5050 ; CHECK: mull 4(%esp)
5151 }
5252
53 define signext i16 @test6(i16 signext %x) nounwind {
54 entry:
55 %div = sdiv i16 %x, 10
56 ret i16 %div
57 ; CHECK: test6:
58 ; CHECK: imull $26215, %eax, %eax
59 ; CHECK: shrl $31, %ecx
60 ; CHECK: sarl $18, %eax
61 }