llvm.org GIT mirror llvm / 9a59c1b
[X86] Add F16C scheduling tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308138 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 years ago
1 changed file(s) with 144 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=IVY
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
6
7 define <4 x float> @test_vcvtph2ps_128(<8 x i16> %a0, <8 x i16> *%a1) {
8 ; IVY-LABEL: test_vcvtph2ps_128:
9 ; IVY: # BB#0:
10 ; IVY-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [7:1.00]
11 ; IVY-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
12 ; IVY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
13 ; IVY-NEXT: retq # sched: [1:1.00]
14 ;
15 ; HASWELL-LABEL: test_vcvtph2ps_128:
16 ; HASWELL: # BB#0:
17 ; HASWELL-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [7:1.00]
18 ; HASWELL-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [4:1.00]
19 ; HASWELL-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
20 ; HASWELL-NEXT: retq # sched: [1:1.00]
21 ;
22 ; BTVER2-LABEL: test_vcvtph2ps_128:
23 ; BTVER2: # BB#0:
24 ; BTVER2-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00]
25 ; BTVER2-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
26 ; BTVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
27 ; BTVER2-NEXT: retq # sched: [4:1.00]
28 ;
29 ; ZNVER1-LABEL: test_vcvtph2ps_128:
30 ; ZNVER1: # BB#0:
31 ; ZNVER1-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00]
32 ; ZNVER1-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
33 ; ZNVER1-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
34 ; ZNVER1-NEXT: retq # sched: [4:1.00]
35 %1 = load <8 x i16>, <8 x i16> *%a1
36 %2 = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %1)
37 %3 = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0)
38 %4 = fadd <4 x float> %2, %3
39 ret <4 x float> %4
40 }
41 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>)
42
43 define <8 x float> @test_vcvtph2ps_256(<8 x i16> %a0, <8 x i16> *%a1) {
44 ; IVY-LABEL: test_vcvtph2ps_256:
45 ; IVY: # BB#0:
46 ; IVY-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [7:1.00]
47 ; IVY-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00]
48 ; IVY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
49 ; IVY-NEXT: retq # sched: [1:1.00]
50 ;
51 ; HASWELL-LABEL: test_vcvtph2ps_256:
52 ; HASWELL: # BB#0:
53 ; HASWELL-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [7:1.00]
54 ; HASWELL-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [4:1.00]
55 ; HASWELL-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
56 ; HASWELL-NEXT: retq # sched: [1:1.00]
57 ;
58 ; BTVER2-LABEL: test_vcvtph2ps_256:
59 ; BTVER2: # BB#0:
60 ; BTVER2-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:1.00]
61 ; BTVER2-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00]
62 ; BTVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:2.00]
63 ; BTVER2-NEXT: retq # sched: [4:1.00]
64 ;
65 ; ZNVER1-LABEL: test_vcvtph2ps_256:
66 ; ZNVER1: # BB#0:
67 ; ZNVER1-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:1.00]
68 ; ZNVER1-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00]
69 ; ZNVER1-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:2.00]
70 ; ZNVER1-NEXT: retq # sched: [4:1.00]
71 %1 = load <8 x i16>, <8 x i16> *%a1
72 %2 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %1)
73 %3 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0)
74 %4 = fadd <8 x float> %2, %3
75 ret <8 x float> %4
76 }
77 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>)
78
79 define <8 x i16> @test_vcvtps2ph_128(<4 x float> %a0, <4 x float> %a1, <4 x i16> *%a2) {
80 ; IVY-LABEL: test_vcvtps2ph_128:
81 ; IVY: # BB#0:
82 ; IVY-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
83 ; IVY-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [7:1.00]
84 ; IVY-NEXT: retq # sched: [1:1.00]
85 ;
86 ; HASWELL-LABEL: test_vcvtps2ph_128:
87 ; HASWELL: # BB#0:
88 ; HASWELL-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [4:1.00]
89 ; HASWELL-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [8:1.00]
90 ; HASWELL-NEXT: retq # sched: [1:1.00]
91 ;
92 ; BTVER2-LABEL: test_vcvtps2ph_128:
93 ; BTVER2: # BB#0:
94 ; BTVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
95 ; BTVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [8:1.00]
96 ; BTVER2-NEXT: retq # sched: [4:1.00]
97 ;
98 ; ZNVER1-LABEL: test_vcvtps2ph_128:
99 ; ZNVER1: # BB#0:
100 ; ZNVER1-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
101 ; ZNVER1-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [8:1.00]
102 ; ZNVER1-NEXT: retq # sched: [4:1.00]
103 %1 = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0)
104 %2 = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a1, i32 0)
105 %3 = shufflevector <8 x i16> %2, <8 x i16> undef, <4 x i32>
106 store <4 x i16> %3, <4 x i16> *%a2
107 ret <8 x i16> %1
108 }
109 declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32)
110
111 define <8 x i16> @test_vcvtps2ph_256(<8 x float> %a0, <8 x float> %a1, <8 x i16> *%a2) {
112 ; IVY-LABEL: test_vcvtps2ph_256:
113 ; IVY: # BB#0:
114 ; IVY-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00]
115 ; IVY-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [7:1.00]
116 ; IVY-NEXT: vzeroupper # sched: [?:0.000000e+00]
117 ; IVY-NEXT: retq # sched: [1:1.00]
118 ;
119 ; HASWELL-LABEL: test_vcvtps2ph_256:
120 ; HASWELL: # BB#0:
121 ; HASWELL-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [4:1.00]
122 ; HASWELL-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [8:1.00]
123 ; HASWELL-NEXT: vzeroupper # sched: [1:0.00]
124 ; HASWELL-NEXT: retq # sched: [1:1.00]
125 ;
126 ; BTVER2-LABEL: test_vcvtps2ph_256:
127 ; BTVER2: # BB#0:
128 ; BTVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00]
129 ; BTVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [8:1.00]
130 ; BTVER2-NEXT: retq # sched: [4:1.00]
131 ;
132 ; ZNVER1-LABEL: test_vcvtps2ph_256:
133 ; ZNVER1: # BB#0:
134 ; ZNVER1-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00]
135 ; ZNVER1-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [8:1.00]
136 ; ZNVER1-NEXT: vzeroupper # sched: [?:0.000000e+00]
137 ; ZNVER1-NEXT: retq # sched: [4:1.00]
138 %1 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0)
139 %2 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a1, i32 0)
140 store <8 x i16> %2, <8 x i16> *%a2
141 ret <8 x i16> %1
142 }
143 declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32)