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Instead of adding an isSS field to LiveInterval to denote stack slot. Use top bit of 'reg' instead. If the top bit is set, than the LiveInterval represents a stack slot live interval. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52639 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
3 changed file(s) with 12 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
100100 typedef SmallVector Ranges;
101101 typedef SmallVector VNInfoList;
102102
103 bool isSS; // True if this represents a stack slot
104103 unsigned reg; // the register or stack slot of this interval
104 // if the top bits is set, it represents a stack slot.
105105 unsigned preference; // preferred register to allocate for this interval
106106 float weight; // weight of this interval
107107 Ranges ranges; // the ranges in which this register is live
109109
110110 public:
111111 LiveInterval(unsigned Reg, float Weight, bool IsSS = false)
112 : isSS(IsSS), reg(Reg), preference(0), weight(Weight) {
112 : reg(Reg), preference(0), weight(Weight) {
113 if (IsSS)
114 reg = reg | (1U << (sizeof(unsigned)*8-1));
113115 }
114116
115117 typedef Ranges::iterator iterator;
142144
143145 /// isStackSlot - Return true if this is a stack slot interval.
144146 ///
145 bool isStackSlot() const { return isSS; }
147 bool isStackSlot() const {
148 return reg & (1U << (sizeof(unsigned)*8-1));
149 }
146150
147151 /// getStackSlotIndex - Return stack slot index if this is a stack slot
148152 /// interval.
149153 int getStackSlotIndex() const {
150154 assert(isStackSlot() && "Interval is not a stack slot interval!");
151 return reg;
155 return reg & ~(1U << (sizeof(unsigned)*8-1));
152156 }
153157
154158 bool containsOneValue() const { return valnos.size() == 1; }
677677
678678 void LiveInterval::print(std::ostream &OS,
679679 const TargetRegisterInfo *TRI) const {
680 if (isSS)
681 OS << "SS#" << reg;
680 if (isStackSlot())
681 OS << "SS#" << getStackSlotIndex();
682682 else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg))
683683 OS << TRI->getName(reg);
684684 else
None //===-- StackSlotColoring.cpp - Sinking for machine instructions ----------===//
0 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1111 //===----------------------------------------------------------------------===//
1212
1313 #define DEBUG_TYPE "stackcoloring"
14 #include "llvm/CodeGen/Passes.h"
1415 #include "llvm/CodeGen/LiveStackAnalysis.h"
1516 #include "llvm/CodeGen/MachineFrameInfo.h"
16 #include "llvm/CodeGen/Passes.h"
1717 #include "llvm/Support/CommandLine.h"
1818 #include "llvm/Support/Compiler.h"
1919 #include "llvm/Support/Debug.h"
200200 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
201201 unsigned NumObjs = MFI->getObjectIndexEnd();
202202 std::vector SlotMapping(NumObjs, -1);
203 SlotMapping.resize(NumObjs, -1);
204203
205204 bool Changed = false;
206205 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {